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arm: omap3: add common twl configurations for vdd1 and vdd2
[deliverable/linux.git] / arch / arm / mach-omap2 / twl-common.c
CommitLineData
a53b8e3b
PU		 1/*
2 * twl-common.c
3 *
4 * Copyright (C) 2011 Texas Instruments, Inc..
5 * Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * version 2 as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
19 * 02110-1301 USA
20 *
21 */
22
23#include <linux/i2c.h>
24#include <linux/i2c/twl.h>
25#include <linux/gpio.h>
b22f954b
PU		 26#include <linux/regulator/machine.h>
27#include <linux/regulator/fixed.h>
a53b8e3b
PU		 28
29#include <plat/i2c.h>
b22f954b 30#include <plat/usb.h>
a53b8e3b
PU		 31
32#include "twl-common.h"
46232a36 33#include "pm.h"
a53b8e3b
PU		 34
35static struct i2c_board_info __initdata pmic_i2c_board_info = {
36 .addr = 0x48,
37 .flags = I2C_CLIENT_WAKE,
38};
39
40void __init omap_pmic_init(int bus, u32 clkrate,
41 const char *pmic_type, int pmic_irq,
42 struct twl4030_platform_data *pmic_data)
43{
44 strncpy(pmic_i2c_board_info.type, pmic_type,
45 sizeof(pmic_i2c_board_info.type));
46 pmic_i2c_board_info.irq = pmic_irq;
47 pmic_i2c_board_info.platform_data = pmic_data;
48
49 omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1);
50}
b22f954b 51
46232a36
KH		 52void __init omap_pmic_late_init(void)
53{
54 /* Init the OMAP TWL parameters (if PMIC has been registerd) */
55 if (!pmic_i2c_board_info.irq)
56 return;
57
58 omap3_twl_init();
59 omap4_twl_init();
60}
61
d12d1fca 62#if defined(CONFIG_ARCH_OMAP3)
827ed9ae
PU		 63static struct twl4030_usb_data omap3_usb_pdata = {
64 .usb_mode = T2_USB_MODE_ULPI,
65};
66
67static int omap3_batt_table[] = {
68/* 0 C */
6930800, 29500, 28300, 27100,
7026000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900,
7117200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100,
7211600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310,
738020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830,
745640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170,
754040, 3910, 3790, 3670, 3550
76};
77
78static struct twl4030_bci_platform_data omap3_bci_pdata = {
79 .battery_tmp_tbl = omap3_batt_table,
80 .tblsize = ARRAY_SIZE(omap3_batt_table),
81};
82
83static struct twl4030_madc_platform_data omap3_madc_pdata = {
84 .irq_line = 1,
85};
86
4ae6df5e 87static struct twl4030_codec_data omap3_codec;
827ed9ae 88
4ae6df5e 89static struct twl4030_audio_data omap3_audio_pdata = {
827ed9ae 90 .audio_mclk = 26000000,
4ae6df5e 91 .codec = &omap3_codec,
827ed9ae
PU		 92};
93
b252b0ef
PU		 94static struct regulator_consumer_supply omap3_vdda_dac_supplies[] = {
95 REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"),
96};
97
98static struct regulator_init_data omap3_vdac_idata = {
99 .constraints = {
100 .min_uV = 1800000,
101 .max_uV = 1800000,
102 .valid_modes_mask = REGULATOR_MODE_NORMAL
103 | REGULATOR_MODE_STANDBY,
104 .valid_ops_mask = REGULATOR_CHANGE_MODE
105 | REGULATOR_CHANGE_STATUS,
106 },
107 .num_consumer_supplies = ARRAY_SIZE(omap3_vdda_dac_supplies),
108 .consumer_supplies = omap3_vdda_dac_supplies,
109};
110
111static struct regulator_consumer_supply omap3_vpll2_supplies[] = {
112 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
7c68dd96 113 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.0"),
b252b0ef
PU		 114};
115
116static struct regulator_init_data omap3_vpll2_idata = {
117 .constraints = {
118 .min_uV = 1800000,
119 .max_uV = 1800000,
120 .valid_modes_mask = REGULATOR_MODE_NORMAL
121 | REGULATOR_MODE_STANDBY,
122 .valid_ops_mask = REGULATOR_CHANGE_MODE
123 | REGULATOR_CHANGE_STATUS,
124 },
125 .num_consumer_supplies = ARRAY_SIZE(omap3_vpll2_supplies),
126 .consumer_supplies = omap3_vpll2_supplies,
127};
128
23e22a5e
TK		 129static struct regulator_consumer_supply omap3_vdd1_supply[] = {
130 REGULATOR_SUPPLY("vcc", "mpu.0"),
131};
132
133static struct regulator_consumer_supply omap3_vdd2_supply[] = {
134 REGULATOR_SUPPLY("vcc", "l3_main.0"),
135};
136
137static struct regulator_init_data omap3_vdd1 = {
138 .constraints = {
139 .name = "vdd_mpu_iva",
140 .min_uV = 600000,
141 .max_uV = 1450000,
142 .valid_modes_mask = REGULATOR_MODE_NORMAL,
143 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
144 },
145 .num_consumer_supplies = ARRAY_SIZE(omap3_vdd1_supply),
146 .consumer_supplies = omap3_vdd1_supply,
147};
148
149static struct regulator_init_data omap3_vdd2 = {
150 .constraints = {
151 .name = "vdd_core",
152 .min_uV = 600000,
153 .max_uV = 1450000,
154 .valid_modes_mask = REGULATOR_MODE_NORMAL,
155 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
156 },
157 .num_consumer_supplies = ARRAY_SIZE(omap3_vdd2_supply),
158 .consumer_supplies = omap3_vdd2_supply,
159};
160
d12d1fca
PU		 161void __init omap3_pmic_get_config(struct twl4030_platform_data *pmic_data,
162 u32 pdata_flags, u32 regulators_flags)
163{
164 if (!pmic_data->irq_base)
165 pmic_data->irq_base = TWL4030_IRQ_BASE;
166 if (!pmic_data->irq_end)
167 pmic_data->irq_end = TWL4030_IRQ_END;
23e22a5e
TK		 168 if (!pmic_data->vdd1)
169 pmic_data->vdd1 = &omap3_vdd1;
170 if (!pmic_data->vdd2)
171 pmic_data->vdd2 = &omap3_vdd2;
d12d1fca
PU		 172
173 /* Common platform data configurations */
174 if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb)
175 pmic_data->usb = &omap3_usb_pdata;
176
177 if (pdata_flags & TWL_COMMON_PDATA_BCI && !pmic_data->bci)
178 pmic_data->bci = &omap3_bci_pdata;
179
180 if (pdata_flags & TWL_COMMON_PDATA_MADC && !pmic_data->madc)
181 pmic_data->madc = &omap3_madc_pdata;
182
183 if (pdata_flags & TWL_COMMON_PDATA_AUDIO && !pmic_data->audio)
184 pmic_data->audio = &omap3_audio_pdata;
185
186 /* Common regulator configurations */
187 if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac)
188 pmic_data->vdac = &omap3_vdac_idata;
189
190 if (regulators_flags & TWL_COMMON_REGULATOR_VPLL2 && !pmic_data->vpll2)
191 pmic_data->vpll2 = &omap3_vpll2_idata;
192}
193#endif /* CONFIG_ARCH_OMAP3 */
194
195#if defined(CONFIG_ARCH_OMAP4)
196static struct twl4030_usb_data omap4_usb_pdata = {
197 .phy_init = omap4430_phy_init,
198 .phy_exit = omap4430_phy_exit,
199 .phy_power = omap4430_phy_power,
200 .phy_set_clock = omap4430_phy_set_clk,
201 .phy_suspend = omap4430_phy_suspend,
202};
203
b22f954b
PU		 204static struct regulator_init_data omap4_vdac_idata = {
205 .constraints = {
206 .min_uV = 1800000,
207 .max_uV = 1800000,
208 .valid_modes_mask = REGULATOR_MODE_NORMAL
209 | REGULATOR_MODE_STANDBY,
210 .valid_ops_mask = REGULATOR_CHANGE_MODE
211 | REGULATOR_CHANGE_STATUS,
212 },
213};
214
215static struct regulator_init_data omap4_vaux2_idata = {
216 .constraints = {
217 .min_uV = 1200000,
218 .max_uV = 2800000,
219 .apply_uV = true,
220 .valid_modes_mask = REGULATOR_MODE_NORMAL
221 | REGULATOR_MODE_STANDBY,
222 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
223 | REGULATOR_CHANGE_MODE
224 | REGULATOR_CHANGE_STATUS,
225 },
226};
227
228static struct regulator_init_data omap4_vaux3_idata = {
229 .constraints = {
230 .min_uV = 1000000,
231 .max_uV = 3000000,
232 .apply_uV = true,
233 .valid_modes_mask = REGULATOR_MODE_NORMAL
234 | REGULATOR_MODE_STANDBY,
235 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
236 | REGULATOR_CHANGE_MODE
237 | REGULATOR_CHANGE_STATUS,
238 },
239};
240
241static struct regulator_consumer_supply omap4_vmmc_supply[] = {
242 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
243};
244
245/* VMMC1 for MMC1 card */
246static struct regulator_init_data omap4_vmmc_idata = {
247 .constraints = {
248 .min_uV = 1200000,
249 .max_uV = 3000000,
250 .apply_uV = true,
251 .valid_modes_mask = REGULATOR_MODE_NORMAL
252 | REGULATOR_MODE_STANDBY,
253 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
254 | REGULATOR_CHANGE_MODE
255 | REGULATOR_CHANGE_STATUS,
256 },
257 .num_consumer_supplies = ARRAY_SIZE(omap4_vmmc_supply),
258 .consumer_supplies = omap4_vmmc_supply,
259};
260
261static struct regulator_init_data omap4_vpp_idata = {
262 .constraints = {
263 .min_uV = 1800000,
264 .max_uV = 2500000,
265 .apply_uV = true,
266 .valid_modes_mask = REGULATOR_MODE_NORMAL
267 | REGULATOR_MODE_STANDBY,
268 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
269 | REGULATOR_CHANGE_MODE
270 | REGULATOR_CHANGE_STATUS,
271 },
272};
273
274static struct regulator_init_data omap4_vana_idata = {
275 .constraints = {
276 .min_uV = 2100000,
277 .max_uV = 2100000,
278 .valid_modes_mask = REGULATOR_MODE_NORMAL
279 | REGULATOR_MODE_STANDBY,
280 .valid_ops_mask = REGULATOR_CHANGE_MODE
281 | REGULATOR_CHANGE_STATUS,
282 },
283};
284
4e6a0ab0
TV		 285static struct regulator_consumer_supply omap4_vcxio_supply[] = {
286 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dss"),
287 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.0"),
288 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.1"),
289};
290
b22f954b
PU		 291static struct regulator_init_data omap4_vcxio_idata = {
292 .constraints = {
293 .min_uV = 1800000,
294 .max_uV = 1800000,
295 .valid_modes_mask = REGULATOR_MODE_NORMAL
296 | REGULATOR_MODE_STANDBY,
297 .valid_ops_mask = REGULATOR_CHANGE_MODE
298 | REGULATOR_CHANGE_STATUS,
4e6a0ab0 299 .always_on = true,
b22f954b 300 },
4e6a0ab0
TV		 301 .num_consumer_supplies = ARRAY_SIZE(omap4_vcxio_supply),
302 .consumer_supplies = omap4_vcxio_supply,
b22f954b
PU		 303};
304
305static struct regulator_init_data omap4_vusb_idata = {
306 .constraints = {
307 .min_uV = 3300000,
308 .max_uV = 3300000,
309 .apply_uV = true,
310 .valid_modes_mask = REGULATOR_MODE_NORMAL
311 | REGULATOR_MODE_STANDBY,
312 .valid_ops_mask = REGULATOR_CHANGE_MODE
313 | REGULATOR_CHANGE_STATUS,
314 },
315};
316
317static struct regulator_init_data omap4_clk32kg_idata = {
318 .constraints = {
319 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
320 },
321};
322
323void __init omap4_pmic_get_config(struct twl4030_platform_data *pmic_data,
324 u32 pdata_flags, u32 regulators_flags)
325{
326 if (!pmic_data->irq_base)
327 pmic_data->irq_base = TWL6030_IRQ_BASE;
328 if (!pmic_data->irq_end)
329 pmic_data->irq_end = TWL6030_IRQ_END;
330
331 /* Common platform data configurations */
332 if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb)
333 pmic_data->usb = &omap4_usb_pdata;
334
335 /* Common regulator configurations */
336 if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac)
337 pmic_data->vdac = &omap4_vdac_idata;
338
339 if (regulators_flags & TWL_COMMON_REGULATOR_VAUX2 && !pmic_data->vaux2)
340 pmic_data->vaux2 = &omap4_vaux2_idata;
341
342 if (regulators_flags & TWL_COMMON_REGULATOR_VAUX3 && !pmic_data->vaux3)
343 pmic_data->vaux3 = &omap4_vaux3_idata;
344
345 if (regulators_flags & TWL_COMMON_REGULATOR_VMMC && !pmic_data->vmmc)
346 pmic_data->vmmc = &omap4_vmmc_idata;
347
348 if (regulators_flags & TWL_COMMON_REGULATOR_VPP && !pmic_data->vpp)
349 pmic_data->vpp = &omap4_vpp_idata;
350
351 if (regulators_flags & TWL_COMMON_REGULATOR_VANA && !pmic_data->vana)
352 pmic_data->vana = &omap4_vana_idata;
353
354 if (regulators_flags & TWL_COMMON_REGULATOR_VCXIO && !pmic_data->vcxio)
355 pmic_data->vcxio = &omap4_vcxio_idata;
356
357 if (regulators_flags & TWL_COMMON_REGULATOR_VUSB && !pmic_data->vusb)
358 pmic_data->vusb = &omap4_vusb_idata;
359
360 if (regulators_flags & TWL_COMMON_REGULATOR_CLK32KG &&
361 !pmic_data->clk32kg)
362 pmic_data->clk32kg = &omap4_clk32kg_idata;
363}
d12d1fca 364#endif /* CONFIG_ARCH_OMAP4 */
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