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arm: omap2: usb: rename usb-ehci.c to usb-host.c
[deliverable/linux.git] / arch / arm / mach-omap2 / usb-host.c
CommitLineData
58a5491c 1/*
a8480ea0 2 * usb-host.c - OMAP USB Host
58a5491c
FB		 3 *
4 * This file will contain the board specific details for the
a8480ea0 5 * Synopsys EHCI/OHCI host controller on OMAP3430 and onwards
58a5491c 6 *
a8480ea0 7 * Copyright (C) 2007-2011 Texas Instruments
58a5491c
FB		 8 * Author: Vikram Pandita <vikram.pandita@ti.com>
9 *
10 * Generalization by:
a8480ea0 11 * Felipe Balbi <balbi@ti.com>
58a5491c
FB		 12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 */
17
18#include <linux/types.h>
19#include <linux/errno.h>
20#include <linux/delay.h>
21#include <linux/platform_device.h>
22#include <linux/clk.h>
bfb01197
AK		 23#include <linux/dma-mapping.h>
24
58a5491c 25#include <asm/io.h>
58a5491c
FB		 26
27#include <mach/hardware.h>
28#include <mach/irqs.h>
29#include <plat/usb.h>
30
4896e394
TL		 31#include "mux.h"
32
58a5491c
FB		 33#if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_EHCI_HCD_MODULE)
34
35static struct resource ehci_resources[] = {
36 {
58a5491c
FB		 37 .flags = IORESOURCE_MEM,
38 },
39 {
58a5491c
FB		 40 .flags = IORESOURCE_MEM,
41 },
42 {
58a5491c
FB		 43 .flags = IORESOURCE_MEM,
44 },
45 { /* general IRQ */
58a5491c
FB		 46 .flags = IORESOURCE_IRQ,
47 }
48};
49
50static u64 ehci_dmamask = ~(u32)0;
51static struct platform_device ehci_device = {
52 .name = "ehci-omap",
53 .id = 0,
54 .dev = {
55 .dma_mask = &ehci_dmamask,
56 .coherent_dma_mask = 0xffffffff,
57 .platform_data = NULL,
58 },
59 .num_resources = ARRAY_SIZE(ehci_resources),
60 .resource = ehci_resources,
61};
62
63/* MUX settings for EHCI pins */
64/*
65 * setup_ehci_io_mux - initialize IO pad mux for USBHOST
66 */
6f69a181 67static void setup_ehci_io_mux(const enum ehci_hcd_omap_mode *port_mode)
58a5491c
FB		 68{
69 switch (port_mode[0]) {
70 case EHCI_HCD_OMAP_MODE_PHY:
4896e394
TL		 71 omap_mux_init_signal("hsusb1_stp", OMAP_PIN_OUTPUT);
72 omap_mux_init_signal("hsusb1_clk", OMAP_PIN_OUTPUT);
73 omap_mux_init_signal("hsusb1_dir", OMAP_PIN_INPUT_PULLDOWN);
74 omap_mux_init_signal("hsusb1_nxt", OMAP_PIN_INPUT_PULLDOWN);
75 omap_mux_init_signal("hsusb1_data0", OMAP_PIN_INPUT_PULLDOWN);
76 omap_mux_init_signal("hsusb1_data1", OMAP_PIN_INPUT_PULLDOWN);
77 omap_mux_init_signal("hsusb1_data2", OMAP_PIN_INPUT_PULLDOWN);
78 omap_mux_init_signal("hsusb1_data3", OMAP_PIN_INPUT_PULLDOWN);
79 omap_mux_init_signal("hsusb1_data4", OMAP_PIN_INPUT_PULLDOWN);
80 omap_mux_init_signal("hsusb1_data5", OMAP_PIN_INPUT_PULLDOWN);
81 omap_mux_init_signal("hsusb1_data6", OMAP_PIN_INPUT_PULLDOWN);
82 omap_mux_init_signal("hsusb1_data7", OMAP_PIN_INPUT_PULLDOWN);
58a5491c
FB		 83 break;
84 case EHCI_HCD_OMAP_MODE_TLL:
4896e394
TL		 85 omap_mux_init_signal("hsusb1_tll_stp",
86 OMAP_PIN_INPUT_PULLUP);
87 omap_mux_init_signal("hsusb1_tll_clk",
88 OMAP_PIN_INPUT_PULLDOWN);
89 omap_mux_init_signal("hsusb1_tll_dir",
90 OMAP_PIN_INPUT_PULLDOWN);
91 omap_mux_init_signal("hsusb1_tll_nxt",
92 OMAP_PIN_INPUT_PULLDOWN);
93 omap_mux_init_signal("hsusb1_tll_data0",
94 OMAP_PIN_INPUT_PULLDOWN);
95 omap_mux_init_signal("hsusb1_tll_data1",
96 OMAP_PIN_INPUT_PULLDOWN);
97 omap_mux_init_signal("hsusb1_tll_data2",
98 OMAP_PIN_INPUT_PULLDOWN);
99 omap_mux_init_signal("hsusb1_tll_data3",
100 OMAP_PIN_INPUT_PULLDOWN);
101 omap_mux_init_signal("hsusb1_tll_data4",
102 OMAP_PIN_INPUT_PULLDOWN);
103 omap_mux_init_signal("hsusb1_tll_data5",
104 OMAP_PIN_INPUT_PULLDOWN);
105 omap_mux_init_signal("hsusb1_tll_data6",
106 OMAP_PIN_INPUT_PULLDOWN);
107 omap_mux_init_signal("hsusb1_tll_data7",
108 OMAP_PIN_INPUT_PULLDOWN);
58a5491c
FB		 109 break;
110 case EHCI_HCD_OMAP_MODE_UNKNOWN:
111 /* FALLTHROUGH */
112 default:
113 break;
114 }
115
116 switch (port_mode[1]) {
117 case EHCI_HCD_OMAP_MODE_PHY:
4896e394
TL		 118 omap_mux_init_signal("hsusb2_stp", OMAP_PIN_OUTPUT);
119 omap_mux_init_signal("hsusb2_clk", OMAP_PIN_OUTPUT);
120 omap_mux_init_signal("hsusb2_dir", OMAP_PIN_INPUT_PULLDOWN);
121 omap_mux_init_signal("hsusb2_nxt", OMAP_PIN_INPUT_PULLDOWN);
122 omap_mux_init_signal("hsusb2_data0",
123 OMAP_PIN_INPUT_PULLDOWN);
124 omap_mux_init_signal("hsusb2_data1",
125 OMAP_PIN_INPUT_PULLDOWN);
126 omap_mux_init_signal("hsusb2_data2",
127 OMAP_PIN_INPUT_PULLDOWN);
128 omap_mux_init_signal("hsusb2_data3",
129 OMAP_PIN_INPUT_PULLDOWN);
130 omap_mux_init_signal("hsusb2_data4",
131 OMAP_PIN_INPUT_PULLDOWN);
132 omap_mux_init_signal("hsusb2_data5",
133 OMAP_PIN_INPUT_PULLDOWN);
134 omap_mux_init_signal("hsusb2_data6",
135 OMAP_PIN_INPUT_PULLDOWN);
136 omap_mux_init_signal("hsusb2_data7",
137 OMAP_PIN_INPUT_PULLDOWN);
58a5491c
FB		 138 break;
139 case EHCI_HCD_OMAP_MODE_TLL:
4896e394
TL		 140 omap_mux_init_signal("hsusb2_tll_stp",
141 OMAP_PIN_INPUT_PULLUP);
142 omap_mux_init_signal("hsusb2_tll_clk",
143 OMAP_PIN_INPUT_PULLDOWN);
144 omap_mux_init_signal("hsusb2_tll_dir",
145 OMAP_PIN_INPUT_PULLDOWN);
146 omap_mux_init_signal("hsusb2_tll_nxt",
147 OMAP_PIN_INPUT_PULLDOWN);
148 omap_mux_init_signal("hsusb2_tll_data0",
149 OMAP_PIN_INPUT_PULLDOWN);
150 omap_mux_init_signal("hsusb2_tll_data1",
151 OMAP_PIN_INPUT_PULLDOWN);
152 omap_mux_init_signal("hsusb2_tll_data2",
153 OMAP_PIN_INPUT_PULLDOWN);
154 omap_mux_init_signal("hsusb2_tll_data3",
155 OMAP_PIN_INPUT_PULLDOWN);
156 omap_mux_init_signal("hsusb2_tll_data4",
157 OMAP_PIN_INPUT_PULLDOWN);
158 omap_mux_init_signal("hsusb2_tll_data5",
159 OMAP_PIN_INPUT_PULLDOWN);
160 omap_mux_init_signal("hsusb2_tll_data6",
161 OMAP_PIN_INPUT_PULLDOWN);
162 omap_mux_init_signal("hsusb2_tll_data7",
163 OMAP_PIN_INPUT_PULLDOWN);
58a5491c
FB		 164 break;
165 case EHCI_HCD_OMAP_MODE_UNKNOWN:
166 /* FALLTHROUGH */
167 default:
168 break;
169 }
170
171 switch (port_mode[2]) {
172 case EHCI_HCD_OMAP_MODE_PHY:
173 printk(KERN_WARNING "Port3 can't be used in PHY mode\n");
174 break;
175 case EHCI_HCD_OMAP_MODE_TLL:
4896e394
TL		 176 omap_mux_init_signal("hsusb3_tll_stp",
177 OMAP_PIN_INPUT_PULLUP);
178 omap_mux_init_signal("hsusb3_tll_clk",
179 OMAP_PIN_INPUT_PULLDOWN);
180 omap_mux_init_signal("hsusb3_tll_dir",
181 OMAP_PIN_INPUT_PULLDOWN);
182 omap_mux_init_signal("hsusb3_tll_nxt",
183 OMAP_PIN_INPUT_PULLDOWN);
184 omap_mux_init_signal("hsusb3_tll_data0",
185 OMAP_PIN_INPUT_PULLDOWN);
186 omap_mux_init_signal("hsusb3_tll_data1",
187 OMAP_PIN_INPUT_PULLDOWN);
188 omap_mux_init_signal("hsusb3_tll_data2",
189 OMAP_PIN_INPUT_PULLDOWN);
190 omap_mux_init_signal("hsusb3_tll_data3",
191 OMAP_PIN_INPUT_PULLDOWN);
192 omap_mux_init_signal("hsusb3_tll_data4",
193 OMAP_PIN_INPUT_PULLDOWN);
194 omap_mux_init_signal("hsusb3_tll_data5",
195 OMAP_PIN_INPUT_PULLDOWN);
196 omap_mux_init_signal("hsusb3_tll_data6",
197 OMAP_PIN_INPUT_PULLDOWN);
198 omap_mux_init_signal("hsusb3_tll_data7",
199 OMAP_PIN_INPUT_PULLDOWN);
58a5491c
FB		 200 break;
201 case EHCI_HCD_OMAP_MODE_UNKNOWN:
202 /* FALLTHROUGH */
203 default:
204 break;
205 }
206
207 return;
208}
209
becf0737
AG		 210static void setup_4430ehci_io_mux(const enum ehci_hcd_omap_mode *port_mode)
211{
212 switch (port_mode[0]) {
213 case EHCI_HCD_OMAP_MODE_PHY:
214 omap_mux_init_signal("usbb1_ulpiphy_stp",
215 OMAP_PIN_OUTPUT);
216 omap_mux_init_signal("usbb1_ulpiphy_clk",
217 OMAP_PIN_INPUT_PULLDOWN);
218 omap_mux_init_signal("usbb1_ulpiphy_dir",
219 OMAP_PIN_INPUT_PULLDOWN);
220 omap_mux_init_signal("usbb1_ulpiphy_nxt",
221 OMAP_PIN_INPUT_PULLDOWN);
222 omap_mux_init_signal("usbb1_ulpiphy_dat0",
223 OMAP_PIN_INPUT_PULLDOWN);
224 omap_mux_init_signal("usbb1_ulpiphy_dat1",
225 OMAP_PIN_INPUT_PULLDOWN);
226 omap_mux_init_signal("usbb1_ulpiphy_dat2",
227 OMAP_PIN_INPUT_PULLDOWN);
228 omap_mux_init_signal("usbb1_ulpiphy_dat3",
229 OMAP_PIN_INPUT_PULLDOWN);
230 omap_mux_init_signal("usbb1_ulpiphy_dat4",
231 OMAP_PIN_INPUT_PULLDOWN);
232 omap_mux_init_signal("usbb1_ulpiphy_dat5",
233 OMAP_PIN_INPUT_PULLDOWN);
234 omap_mux_init_signal("usbb1_ulpiphy_dat6",
235 OMAP_PIN_INPUT_PULLDOWN);
236 omap_mux_init_signal("usbb1_ulpiphy_dat7",
237 OMAP_PIN_INPUT_PULLDOWN);
238 break;
239 case EHCI_HCD_OMAP_MODE_TLL:
240 omap_mux_init_signal("usbb1_ulpitll_stp",
241 OMAP_PIN_INPUT_PULLUP);
242 omap_mux_init_signal("usbb1_ulpitll_clk",
243 OMAP_PIN_INPUT_PULLDOWN);
244 omap_mux_init_signal("usbb1_ulpitll_dir",
245 OMAP_PIN_INPUT_PULLDOWN);
246 omap_mux_init_signal("usbb1_ulpitll_nxt",
247 OMAP_PIN_INPUT_PULLDOWN);
248 omap_mux_init_signal("usbb1_ulpitll_dat0",
249 OMAP_PIN_INPUT_PULLDOWN);
250 omap_mux_init_signal("usbb1_ulpitll_dat1",
251 OMAP_PIN_INPUT_PULLDOWN);
252 omap_mux_init_signal("usbb1_ulpitll_dat2",
253 OMAP_PIN_INPUT_PULLDOWN);
254 omap_mux_init_signal("usbb1_ulpitll_dat3",
255 OMAP_PIN_INPUT_PULLDOWN);
256 omap_mux_init_signal("usbb1_ulpitll_dat4",
257 OMAP_PIN_INPUT_PULLDOWN);
258 omap_mux_init_signal("usbb1_ulpitll_dat5",
259 OMAP_PIN_INPUT_PULLDOWN);
260 omap_mux_init_signal("usbb1_ulpitll_dat6",
261 OMAP_PIN_INPUT_PULLDOWN);
262 omap_mux_init_signal("usbb1_ulpitll_dat7",
263 OMAP_PIN_INPUT_PULLDOWN);
264 break;
265 case EHCI_HCD_OMAP_MODE_UNKNOWN:
266 default:
267 break;
268 }
269 switch (port_mode[1]) {
270 case EHCI_HCD_OMAP_MODE_PHY:
271 omap_mux_init_signal("usbb2_ulpiphy_stp",
272 OMAP_PIN_OUTPUT);
273 omap_mux_init_signal("usbb2_ulpiphy_clk",
274 OMAP_PIN_INPUT_PULLDOWN);
275 omap_mux_init_signal("usbb2_ulpiphy_dir",
276 OMAP_PIN_INPUT_PULLDOWN);
277 omap_mux_init_signal("usbb2_ulpiphy_nxt",
278 OMAP_PIN_INPUT_PULLDOWN);
279 omap_mux_init_signal("usbb2_ulpiphy_dat0",
280 OMAP_PIN_INPUT_PULLDOWN);
281 omap_mux_init_signal("usbb2_ulpiphy_dat1",
282 OMAP_PIN_INPUT_PULLDOWN);
283 omap_mux_init_signal("usbb2_ulpiphy_dat2",
284 OMAP_PIN_INPUT_PULLDOWN);
285 omap_mux_init_signal("usbb2_ulpiphy_dat3",
286 OMAP_PIN_INPUT_PULLDOWN);
287 omap_mux_init_signal("usbb2_ulpiphy_dat4",
288 OMAP_PIN_INPUT_PULLDOWN);
289 omap_mux_init_signal("usbb2_ulpiphy_dat5",
290 OMAP_PIN_INPUT_PULLDOWN);
291 omap_mux_init_signal("usbb2_ulpiphy_dat6",
292 OMAP_PIN_INPUT_PULLDOWN);
293 omap_mux_init_signal("usbb2_ulpiphy_dat7",
294 OMAP_PIN_INPUT_PULLDOWN);
295 break;
296 case EHCI_HCD_OMAP_MODE_TLL:
297 omap_mux_init_signal("usbb2_ulpitll_stp",
298 OMAP_PIN_INPUT_PULLUP);
299 omap_mux_init_signal("usbb2_ulpitll_clk",
300 OMAP_PIN_INPUT_PULLDOWN);
301 omap_mux_init_signal("usbb2_ulpitll_dir",
302 OMAP_PIN_INPUT_PULLDOWN);
303 omap_mux_init_signal("usbb2_ulpitll_nxt",
304 OMAP_PIN_INPUT_PULLDOWN);
305 omap_mux_init_signal("usbb2_ulpitll_dat0",
306 OMAP_PIN_INPUT_PULLDOWN);
307 omap_mux_init_signal("usbb2_ulpitll_dat1",
308 OMAP_PIN_INPUT_PULLDOWN);
309 omap_mux_init_signal("usbb2_ulpitll_dat2",
310 OMAP_PIN_INPUT_PULLDOWN);
311 omap_mux_init_signal("usbb2_ulpitll_dat3",
312 OMAP_PIN_INPUT_PULLDOWN);
313 omap_mux_init_signal("usbb2_ulpitll_dat4",
314 OMAP_PIN_INPUT_PULLDOWN);
315 omap_mux_init_signal("usbb2_ulpitll_dat5",
316 OMAP_PIN_INPUT_PULLDOWN);
317 omap_mux_init_signal("usbb2_ulpitll_dat6",
318 OMAP_PIN_INPUT_PULLDOWN);
319 omap_mux_init_signal("usbb2_ulpitll_dat7",
320 OMAP_PIN_INPUT_PULLDOWN);
321 break;
322 case EHCI_HCD_OMAP_MODE_UNKNOWN:
323 default:
324 break;
325 }
326}
327
6f69a181 328void __init usb_ehci_init(const struct ehci_hcd_omap_platform_data *pdata)
58a5491c
FB		 329{
330 platform_device_add_data(&ehci_device, pdata, sizeof(*pdata));
331
332 /* Setup Pin IO MUX for EHCI */
becf0737
AG		 333 if (cpu_is_omap34xx()) {
334 ehci_resources[0].start = OMAP34XX_EHCI_BASE;
335 ehci_resources[0].end = OMAP34XX_EHCI_BASE + SZ_1K - 1;
336 ehci_resources[1].start = OMAP34XX_UHH_CONFIG_BASE;
337 ehci_resources[1].end = OMAP34XX_UHH_CONFIG_BASE + SZ_1K - 1;
338 ehci_resources[2].start = OMAP34XX_USBTLL_BASE;
339 ehci_resources[2].end = OMAP34XX_USBTLL_BASE + SZ_4K - 1;
340 ehci_resources[3].start = INT_34XX_EHCI_IRQ;
58a5491c 341 setup_ehci_io_mux(pdata->port_mode);
becf0737
AG		 342 } else if (cpu_is_omap44xx()) {
343 ehci_resources[0].start = OMAP44XX_HSUSB_EHCI_BASE;
344 ehci_resources[0].end = OMAP44XX_HSUSB_EHCI_BASE + SZ_1K - 1;
345 ehci_resources[1].start = OMAP44XX_UHH_CONFIG_BASE;
346 ehci_resources[1].end = OMAP44XX_UHH_CONFIG_BASE + SZ_2K - 1;
347 ehci_resources[2].start = OMAP44XX_USBTLL_BASE;
348 ehci_resources[2].end = OMAP44XX_USBTLL_BASE + SZ_4K - 1;
349 ehci_resources[3].start = OMAP44XX_IRQ_EHCI;
350 setup_4430ehci_io_mux(pdata->port_mode);
351 }
58a5491c 352
a9031e5f
FB		 353 ehci_resources[0].name = "ehci";
354 ehci_resources[1].name = "uhh";
355 ehci_resources[2].name = "tll";
356 ehci_resources[3].name = "irq";
357
58a5491c
FB		 358 if (platform_device_register(&ehci_device) < 0) {
359 printk(KERN_ERR "Unable to register HS-USB (EHCI) device\n");
360 return;
361 }
362}
363
364#else
365
6f69a181 366void __init usb_ehci_init(const struct ehci_hcd_omap_platform_data *pdata)
58a5491c
FB		 367
368{
369}
370
371#endif /* CONFIG_USB_EHCI_HCD */
372
95344fcc
AG		 373#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
374
375static struct resource ohci_resources[] = {
376 {
a9031e5f 377 .name = "ohci",
95344fcc
AG		 378 .start = OMAP34XX_OHCI_BASE,
379 .end = OMAP34XX_OHCI_BASE + SZ_1K - 1,
380 .flags = IORESOURCE_MEM,
381 },
382 {
a9031e5f 383 .name = "uhh",
95344fcc
AG		 384 .start = OMAP34XX_UHH_CONFIG_BASE,
385 .end = OMAP34XX_UHH_CONFIG_BASE + SZ_1K - 1,
386 .flags = IORESOURCE_MEM,
387 },
388 {
a9031e5f 389 .name = "tll",
95344fcc
AG		 390 .start = OMAP34XX_USBTLL_BASE,
391 .end = OMAP34XX_USBTLL_BASE + SZ_4K - 1,
392 .flags = IORESOURCE_MEM,
393 },
394 { /* general IRQ */
a9031e5f 395 .name = "irq",
95344fcc
AG		 396 .start = INT_34XX_OHCI_IRQ,
397 .flags = IORESOURCE_IRQ,
398 }
399};
400
401static u64 ohci_dmamask = DMA_BIT_MASK(32);
402
403static struct platform_device ohci_device = {
404 .name = "ohci-omap3",
405 .id = 0,
406 .dev = {
407 .dma_mask = &ohci_dmamask,
408 .coherent_dma_mask = 0xffffffff,
409 },
410 .num_resources = ARRAY_SIZE(ohci_resources),
411 .resource = ohci_resources,
412};
413
414static void setup_ohci_io_mux(const enum ohci_omap3_port_mode *port_mode)
415{
416 switch (port_mode[0]) {
417 case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
418 case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
419 case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
420 case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
421 omap_mux_init_signal("mm1_rxdp",
422 OMAP_PIN_INPUT_PULLDOWN);
423 omap_mux_init_signal("mm1_rxdm",
424 OMAP_PIN_INPUT_PULLDOWN);
425 /* FALLTHROUGH */
426 case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
427 case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
428 omap_mux_init_signal("mm1_rxrcv",
429 OMAP_PIN_INPUT_PULLDOWN);
430 /* FALLTHROUGH */
431 case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
432 case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
433 omap_mux_init_signal("mm1_txen_n", OMAP_PIN_OUTPUT);
434 /* FALLTHROUGH */
435 case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
436 case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
437 omap_mux_init_signal("mm1_txse0",
438 OMAP_PIN_INPUT_PULLDOWN);
439 omap_mux_init_signal("mm1_txdat",
440 OMAP_PIN_INPUT_PULLDOWN);
441 break;
442 case OMAP_OHCI_PORT_MODE_UNUSED:
443 /* FALLTHROUGH */
444 default:
445 break;
446 }
447 switch (port_mode[1]) {
448 case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
449 case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
450 case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
451 case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
452 omap_mux_init_signal("mm2_rxdp",
453 OMAP_PIN_INPUT_PULLDOWN);
454 omap_mux_init_signal("mm2_rxdm",
455 OMAP_PIN_INPUT_PULLDOWN);
456 /* FALLTHROUGH */
457 case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
458 case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
459 omap_mux_init_signal("mm2_rxrcv",
460 OMAP_PIN_INPUT_PULLDOWN);
461 /* FALLTHROUGH */
462 case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
463 case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
464 omap_mux_init_signal("mm2_txen_n", OMAP_PIN_OUTPUT);
465 /* FALLTHROUGH */
466 case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
467 case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
468 omap_mux_init_signal("mm2_txse0",
469 OMAP_PIN_INPUT_PULLDOWN);
470 omap_mux_init_signal("mm2_txdat",
471 OMAP_PIN_INPUT_PULLDOWN);
472 break;
473 case OMAP_OHCI_PORT_MODE_UNUSED:
474 /* FALLTHROUGH */
475 default:
476 break;
477 }
478 switch (port_mode[2]) {
479 case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
480 case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
481 case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
482 case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
483 omap_mux_init_signal("mm3_rxdp",
484 OMAP_PIN_INPUT_PULLDOWN);
485 omap_mux_init_signal("mm3_rxdm",
486 OMAP_PIN_INPUT_PULLDOWN);
487 /* FALLTHROUGH */
488 case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
489 case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
490 omap_mux_init_signal("mm3_rxrcv",
491 OMAP_PIN_INPUT_PULLDOWN);
492 /* FALLTHROUGH */
493 case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
494 case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
495 omap_mux_init_signal("mm3_txen_n", OMAP_PIN_OUTPUT);
496 /* FALLTHROUGH */
497 case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
498 case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
499 omap_mux_init_signal("mm3_txse0",
500 OMAP_PIN_INPUT_PULLDOWN);
501 omap_mux_init_signal("mm3_txdat",
502 OMAP_PIN_INPUT_PULLDOWN);
503 break;
504 case OMAP_OHCI_PORT_MODE_UNUSED:
505 /* FALLTHROUGH */
506 default:
507 break;
508 }
509}
510
511void __init usb_ohci_init(const struct ohci_hcd_omap_platform_data *pdata)
512{
513 platform_device_add_data(&ohci_device, pdata, sizeof(*pdata));
514
515 /* Setup Pin IO MUX for OHCI */
516 if (cpu_is_omap34xx())
517 setup_ohci_io_mux(pdata->port_mode);
518
519 if (platform_device_register(&ohci_device) < 0) {
520 pr_err("Unable to register FS-USB (OHCI) device\n");
521 return;
522 }
523}
524
525#else
526
527void __init usb_ohci_init(const struct ohci_hcd_omap_platform_data *pdata)
528{
529}
530
531#endif /* CONFIG_USB_OHCI_HCD */
Linux kernel - Deliverables
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