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c1ed6407 DB |
1 | /* |
2 | * linux/arch/arm/mach-omap2/usb-tusb6010.c | |
3 | * | |
4 | * Copyright (C) 2006 Nokia Corporation | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
d44b28c4 | 11 | #include <linux/string.h> |
c1ed6407 DB |
12 | #include <linux/types.h> |
13 | #include <linux/errno.h> | |
14 | #include <linux/delay.h> | |
15 | #include <linux/platform_device.h> | |
f2d18fea | 16 | #include <linux/gpio.h> |
dc28094b | 17 | #include <linux/export.h> |
e8c4a7ac | 18 | #include <linux/platform_data/usb-omap.h> |
c1ed6407 DB |
19 | |
20 | #include <linux/usb/musb.h> | |
21 | ||
3ef5d007 | 22 | #include "gpmc.h" |
c1ed6407 | 23 | |
f99bf16d | 24 | #include "mux.h" |
c1ed6407 DB |
25 | |
26 | static u8 async_cs, sync_cs; | |
27 | static unsigned refclk_psec; | |
28 | ||
29 | ||
c1ed6407 DB |
30 | /* NOTE: timings are from tusb 6010 datasheet Rev 1.8, 12-Sept 2006 */ |
31 | ||
47acde16 | 32 | static int tusb_set_async_mode(unsigned sysclk_ps) |
c1ed6407 | 33 | { |
47acde16 | 34 | struct gpmc_device_timings dev_t; |
c1ed6407 DB |
35 | struct gpmc_timings t; |
36 | unsigned t_acsnh_advnh = sysclk_ps + 3000; | |
c1ed6407 | 37 | |
47acde16 | 38 | memset(&dev_t, 0, sizeof(dev_t)); |
c1ed6407 | 39 | |
47acde16 | 40 | dev_t.mux = true; |
c1ed6407 | 41 | |
47acde16 AM |
42 | dev_t.t_ceasu = 8 * 1000; |
43 | dev_t.t_avdasu = t_acsnh_advnh - 7000; | |
44 | dev_t.t_ce_avd = 1000; | |
45 | dev_t.t_avdp_r = t_acsnh_advnh; | |
46 | dev_t.t_oeasu = t_acsnh_advnh + 1000; | |
47 | dev_t.t_oe = 300; | |
48 | dev_t.t_cez_r = 7000; | |
49 | dev_t.t_cez_w = dev_t.t_cez_r; | |
50 | dev_t.t_avdp_w = t_acsnh_advnh; | |
51 | dev_t.t_weasu = t_acsnh_advnh + 1000; | |
52 | dev_t.t_wpl = 300; | |
53 | dev_t.cyc_aavdh_we = 1; | |
c1ed6407 | 54 | |
47acde16 | 55 | gpmc_calc_timings(&t, &dev_t); |
c1ed6407 DB |
56 | |
57 | return gpmc_cs_set_timings(async_cs, &t); | |
58 | } | |
59 | ||
47acde16 | 60 | static int tusb_set_sync_mode(unsigned sysclk_ps) |
c1ed6407 | 61 | { |
47acde16 | 62 | struct gpmc_device_timings dev_t; |
c1ed6407 DB |
63 | struct gpmc_timings t; |
64 | unsigned t_scsnh_advnh = sysclk_ps + 3000; | |
c1ed6407 | 65 | |
47acde16 AM |
66 | memset(&dev_t, 0, sizeof(dev_t)); |
67 | ||
68 | dev_t.mux = true; | |
69 | dev_t.sync_read = true; | |
70 | dev_t.sync_write = true; | |
71 | ||
72 | dev_t.clk = 11100; | |
73 | dev_t.t_bacc = 1000; | |
74 | dev_t.t_ces = 1000; | |
75 | dev_t.t_ceasu = 8 * 1000; | |
76 | dev_t.t_avdasu = t_scsnh_advnh - 7000; | |
77 | dev_t.t_ce_avd = 1000; | |
78 | dev_t.t_avdp_r = t_scsnh_advnh; | |
79 | dev_t.cyc_aavdh_oe = 3; | |
80 | dev_t.cyc_oe = 5; | |
81 | dev_t.t_ce_rdyz = 7000; | |
82 | dev_t.t_avdp_w = t_scsnh_advnh; | |
83 | dev_t.cyc_aavdh_we = 3; | |
84 | dev_t.cyc_wpl = 6; | |
85 | dev_t.t_ce_rdyz = 7000; | |
86 | ||
87 | gpmc_calc_timings(&t, &dev_t); | |
559d94b0 | 88 | |
c1ed6407 DB |
89 | return gpmc_cs_set_timings(sync_cs, &t); |
90 | } | |
91 | ||
c1ed6407 DB |
92 | /* tusb driver calls this when it changes the chip's clocking */ |
93 | int tusb6010_platform_retime(unsigned is_refclk) | |
94 | { | |
95 | static const char error[] = | |
96 | KERN_ERR "tusb6010 %s retime error %d\n"; | |
97 | ||
c1ed6407 DB |
98 | unsigned sysclk_ps; |
99 | int status; | |
100 | ||
47acde16 | 101 | if (!refclk_psec) |
c1ed6407 DB |
102 | return -ENODEV; |
103 | ||
104 | sysclk_ps = is_refclk ? refclk_psec : TUSB6010_OSCCLK_60; | |
105 | ||
47acde16 | 106 | status = tusb_set_async_mode(sysclk_ps); |
c1ed6407 DB |
107 | if (status < 0) { |
108 | printk(error, "async", status); | |
109 | goto done; | |
110 | } | |
47acde16 | 111 | status = tusb_set_sync_mode(sysclk_ps); |
c1ed6407 DB |
112 | if (status < 0) |
113 | printk(error, "sync", status); | |
114 | done: | |
115 | return status; | |
116 | } | |
117 | EXPORT_SYMBOL_GPL(tusb6010_platform_retime); | |
118 | ||
119 | static struct resource tusb_resources[] = { | |
120 | /* Order is significant! The start/end fields | |
121 | * are updated during setup.. | |
122 | */ | |
123 | { /* Asynchronous access */ | |
124 | .flags = IORESOURCE_MEM, | |
125 | }, | |
126 | { /* Synchronous access */ | |
127 | .flags = IORESOURCE_MEM, | |
128 | }, | |
129 | { /* IRQ */ | |
6ec1e077 | 130 | .name = "mc", |
c1ed6407 DB |
131 | .flags = IORESOURCE_IRQ, |
132 | }, | |
133 | }; | |
134 | ||
135 | static u64 tusb_dmamask = ~(u32)0; | |
136 | ||
137 | static struct platform_device tusb_device = { | |
18688fbe | 138 | .name = "musb-tusb", |
c1ed6407 DB |
139 | .id = -1, |
140 | .dev = { | |
141 | .dma_mask = &tusb_dmamask, | |
142 | .coherent_dma_mask = 0xffffffff, | |
143 | }, | |
144 | .num_resources = ARRAY_SIZE(tusb_resources), | |
145 | .resource = tusb_resources, | |
146 | }; | |
147 | ||
148 | ||
149 | /* this may be called only from board-*.c setup code */ | |
150 | int __init | |
151 | tusb6010_setup_interface(struct musb_hdrc_platform_data *data, | |
152 | unsigned ps_refclk, unsigned waitpin, | |
153 | unsigned async, unsigned sync, | |
154 | unsigned irq, unsigned dmachan) | |
155 | { | |
156 | int status; | |
157 | static char error[] __initdata = | |
158 | KERN_ERR "tusb6010 init error %d, %d\n"; | |
159 | ||
160 | /* ASYNC region, primarily for PIO */ | |
161 | status = gpmc_cs_request(async, SZ_16M, (unsigned long *) | |
162 | &tusb_resources[0].start); | |
163 | if (status < 0) { | |
164 | printk(error, 1, status); | |
165 | return status; | |
166 | } | |
167 | tusb_resources[0].end = tusb_resources[0].start + 0x9ff; | |
168 | async_cs = async; | |
169 | gpmc_cs_write_reg(async, GPMC_CS_CONFIG1, | |
170 | GPMC_CONFIG1_PAGE_LEN(2) | |
171 | | GPMC_CONFIG1_WAIT_READ_MON | |
172 | | GPMC_CONFIG1_WAIT_WRITE_MON | |
173 | | GPMC_CONFIG1_WAIT_PIN_SEL(waitpin) | |
174 | | GPMC_CONFIG1_READTYPE_ASYNC | |
175 | | GPMC_CONFIG1_WRITETYPE_ASYNC | |
176 | | GPMC_CONFIG1_DEVICESIZE_16 | |
177 | | GPMC_CONFIG1_DEVICETYPE_NOR | |
178 | | GPMC_CONFIG1_MUXADDDATA); | |
179 | ||
180 | ||
181 | /* SYNC region, primarily for DMA */ | |
182 | status = gpmc_cs_request(sync, SZ_16M, (unsigned long *) | |
183 | &tusb_resources[1].start); | |
184 | if (status < 0) { | |
185 | printk(error, 2, status); | |
186 | return status; | |
187 | } | |
188 | tusb_resources[1].end = tusb_resources[1].start + 0x9ff; | |
189 | sync_cs = sync; | |
190 | gpmc_cs_write_reg(sync, GPMC_CS_CONFIG1, | |
191 | GPMC_CONFIG1_READMULTIPLE_SUPP | |
192 | | GPMC_CONFIG1_READTYPE_SYNC | |
193 | | GPMC_CONFIG1_WRITEMULTIPLE_SUPP | |
194 | | GPMC_CONFIG1_WRITETYPE_SYNC | |
c1ed6407 DB |
195 | | GPMC_CONFIG1_PAGE_LEN(2) |
196 | | GPMC_CONFIG1_WAIT_READ_MON | |
197 | | GPMC_CONFIG1_WAIT_WRITE_MON | |
198 | | GPMC_CONFIG1_WAIT_PIN_SEL(waitpin) | |
199 | | GPMC_CONFIG1_DEVICESIZE_16 | |
200 | | GPMC_CONFIG1_DEVICETYPE_NOR | |
201 | | GPMC_CONFIG1_MUXADDDATA | |
202 | /* fclk divider gets set later */ | |
203 | ); | |
204 | ||
205 | /* IRQ */ | |
bc593f5d | 206 | status = gpio_request_one(irq, GPIOF_IN, "TUSB6010 irq"); |
c1ed6407 DB |
207 | if (status < 0) { |
208 | printk(error, 3, status); | |
209 | return status; | |
210 | } | |
3d09b33f | 211 | tusb_resources[2].start = gpio_to_irq(irq); |
c1ed6407 DB |
212 | |
213 | /* set up memory timings ... can speed them up later */ | |
214 | if (!ps_refclk) { | |
215 | printk(error, 4, status); | |
216 | return -ENODEV; | |
217 | } | |
218 | refclk_psec = ps_refclk; | |
219 | status = tusb6010_platform_retime(1); | |
220 | if (status < 0) { | |
221 | printk(error, 5, status); | |
222 | return status; | |
223 | } | |
224 | ||
225 | /* finish device setup ... */ | |
226 | if (!data) { | |
227 | printk(error, 6, status); | |
228 | return -ENODEV; | |
229 | } | |
c1ed6407 DB |
230 | tusb_device.dev.platform_data = data; |
231 | ||
232 | /* REVISIT let the driver know what DMA channels work */ | |
233 | if (!dmachan) | |
234 | tusb_device.dev.dma_mask = NULL; | |
235 | else { | |
236 | /* assume OMAP 2420 ES2.0 and later */ | |
237 | if (dmachan & (1 << 0)) | |
f99bf16d | 238 | omap_mux_init_signal("sys_ndmareq0", 0); |
c1ed6407 | 239 | if (dmachan & (1 << 1)) |
f99bf16d | 240 | omap_mux_init_signal("sys_ndmareq1", 0); |
c1ed6407 | 241 | if (dmachan & (1 << 2)) |
f99bf16d | 242 | omap_mux_init_signal("sys_ndmareq2", 0); |
c1ed6407 | 243 | if (dmachan & (1 << 3)) |
f99bf16d | 244 | omap_mux_init_signal("sys_ndmareq3", 0); |
c1ed6407 | 245 | if (dmachan & (1 << 4)) |
f99bf16d | 246 | omap_mux_init_signal("sys_ndmareq4", 0); |
c1ed6407 | 247 | if (dmachan & (1 << 5)) |
f99bf16d | 248 | omap_mux_init_signal("sys_ndmareq5", 0); |
c1ed6407 DB |
249 | } |
250 | ||
251 | /* so far so good ... register the device */ | |
252 | status = platform_device_register(&tusb_device); | |
253 | if (status < 0) { | |
254 | printk(error, 7, status); | |
255 | return status; | |
256 | } | |
257 | return 0; | |
258 | } |