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c0718df4 PW |
1 | /* |
2 | * OMAP3 Voltage Controller (VC) data | |
3 | * | |
4 | * Copyright (C) 2007, 2010 Texas Instruments, Inc. | |
5 | * Rajendra Nayak <rnayak@ti.com> | |
6 | * Lesly A M <x0080970@ti.com> | |
7 | * Thara Gopinath <thara@ti.com> | |
8 | * | |
9 | * Copyright (C) 2008, 2011 Nokia Corporation | |
10 | * Kalle Jokiniemi | |
11 | * Paul Walmsley | |
12 | * | |
13 | * This program is free software; you can redistribute it and/or modify | |
14 | * it under the terms of the GNU General Public License version 2 as | |
15 | * published by the Free Software Foundation. | |
16 | */ | |
17 | #include <linux/io.h> | |
18 | #include <linux/err.h> | |
19 | #include <linux/init.h> | |
20 | ||
21 | #include <plat/common.h> | |
22 | ||
23 | #include "prm-regbits-34xx.h" | |
24 | #include "voltage.h" | |
25 | ||
26 | #include "vc.h" | |
27 | ||
28 | /* | |
29 | * VC data common to 34xx/36xx chips | |
30 | * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file. | |
31 | */ | |
d84adcf4 | 32 | static struct omap_vc_common omap3_vc_common = { |
c0718df4 PW |
33 | .smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET, |
34 | .smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET, | |
e4e021c5 | 35 | .smps_cmdra_reg = OMAP3_PRM_VC_SMPS_CMD_RA_OFFSET, |
c0718df4 PW |
36 | .bypass_val_reg = OMAP3_PRM_VC_BYPASS_VAL_OFFSET, |
37 | .data_shift = OMAP3430_DATA_SHIFT, | |
38 | .slaveaddr_shift = OMAP3430_SLAVEADDR_SHIFT, | |
39 | .regaddr_shift = OMAP3430_REGADDR_SHIFT, | |
40 | .valid = OMAP3430_VALID_MASK, | |
41 | .cmd_on_shift = OMAP3430_VC_CMD_ON_SHIFT, | |
42 | .cmd_on_mask = OMAP3430_VC_CMD_ON_MASK, | |
43 | .cmd_onlp_shift = OMAP3430_VC_CMD_ONLP_SHIFT, | |
44 | .cmd_ret_shift = OMAP3430_VC_CMD_RET_SHIFT, | |
45 | .cmd_off_shift = OMAP3430_VC_CMD_OFF_SHIFT, | |
46 | }; | |
47 | ||
d84adcf4 KH |
48 | struct omap_vc_channel omap3_vc_mpu = { |
49 | .common = &omap3_vc_common, | |
c0718df4 | 50 | .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_0_OFFSET, |
c0718df4 | 51 | .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA0_MASK, |
c0718df4 | 52 | .smps_volra_mask = OMAP3430_VOLRA0_MASK, |
e4e021c5 | 53 | .smps_cmdra_mask = OMAP3430_CMDRA0_MASK, |
c0718df4 PW |
54 | }; |
55 | ||
d84adcf4 KH |
56 | struct omap_vc_channel omap3_vc_core = { |
57 | .common = &omap3_vc_common, | |
c0718df4 | 58 | .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_1_OFFSET, |
c0718df4 | 59 | .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA1_MASK, |
c0718df4 | 60 | .smps_volra_mask = OMAP3430_VOLRA1_MASK, |
e4e021c5 | 61 | .smps_cmdra_mask = OMAP3430_CMDRA1_MASK, |
c0718df4 | 62 | }; |