[deliverable/linux.git] / arch / arm / mach-omap2 / vp.h

/*
 * OMAP3/4 Voltage Processor (VP) structure and macro definitions
 *
 * Copyright (C) 2007, 2010 Texas Instruments, Inc.
 * Rajendra Nayak <rnayak@ti.com>
 * Lesly A M <x0080970@ti.com>
 * Thara Gopinath <thara@ti.com>
 *
 * Copyright (C) 2008, 2011 Nokia Corporation
 * Kalle Jokiniemi
 * Paul Walmsley
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License version
 * 2 as published by the Free Software Foundation.
 */
#ifndef __ARCH_ARM_MACH_OMAP2_VP_H
#define __ARCH_ARM_MACH_OMAP2_VP_H

#include <linux/kernel.h>

struct voltagedomain;

/*
 * Voltage Processor (VP) identifiers
 */
#define OMAP3_VP_VDD_MPU_ID 0
#define OMAP3_VP_VDD_CORE_ID 1
#define OMAP4_VP_VDD_CORE_ID 0
#define OMAP4_VP_VDD_IVA_ID 1
#define OMAP4_VP_VDD_MPU_ID 2

/* XXX document */
#define VP_IDLE_TIMEOUT		200
#define VP_TRANXDONE_TIMEOUT	300

/**
 * struct omap_vp_ops - per-VP operations
 * @check_txdone: check for VP transaction done
 * @clear_txdone: clear VP transaction done status
 */
struct omap_vp_ops {
	u32 (*check_txdone)(u8 vp_id);
	void (*clear_txdone)(u8 vp_id);
};

/**
 * struct omap_vp_common - register data common to all VDDs
 * @vpconfig_erroroffset_mask: ERROROFFSET bitmask in the PRM_VP*_CONFIG reg
 * @vpconfig_errorgain_mask: ERRORGAIN bitmask in the PRM_VP*_CONFIG reg
 * @vpconfig_initvoltage_mask: INITVOLTAGE bitmask in the PRM_VP*_CONFIG reg
 * @vpconfig_timeouten: TIMEOUT bitmask in the PRM_VP*_CONFIG reg
 * @vpconfig_initvdd: INITVDD bitmask in the PRM_VP*_CONFIG reg
 * @vpconfig_forceupdate: FORCEUPDATE bitmask in the PRM_VP*_CONFIG reg
 * @vpconfig_vpenable: VPENABLE bitmask in the PRM_VP*_CONFIG reg
 * @vpconfig_erroroffset_shift: ERROROFFSET field shift in PRM_VP*_CONFIG reg
 * @vpconfig_errorgain_shift: ERRORGAIN field shift in PRM_VP*_CONFIG reg
 * @vpconfig_initvoltage_shift: INITVOLTAGE field shift in PRM_VP*_CONFIG reg
 * @vstepmin_stepmin_shift: VSTEPMIN field shift in the PRM_VP*_VSTEPMIN reg
 * @vstepmin_smpswaittimemin_shift: SMPSWAITTIMEMIN field shift in PRM_VP*_VSTEPMIN reg
 * @vstepmax_stepmax_shift: VSTEPMAX field shift in the PRM_VP*_VSTEPMAX reg
 * @vstepmax_smpswaittimemax_shift: SMPSWAITTIMEMAX field shift in PRM_VP*_VSTEPMAX reg
 * @vlimitto_vddmin_shift: VDDMIN field shift in PRM_VP*_VLIMITTO reg
 * @vlimitto_vddmax_shift: VDDMAX field shift in PRM_VP*_VLIMITTO reg
 * @vlimitto_timeout_shift: TIMEOUT field shift in PRM_VP*_VLIMITTO reg
 */
struct omap_vp_common {
	u32 vpconfig_erroroffset_mask;
	u32 vpconfig_errorgain_mask;
	u32 vpconfig_initvoltage_mask;
	u8 vpconfig_timeouten;
	u8 vpconfig_initvdd;
	u8 vpconfig_forceupdate;
	u8 vpconfig_vpenable;
	u8 vstepmin_stepmin_shift;
	u8 vstepmin_smpswaittimemin_shift;
	u8 vstepmax_stepmax_shift;
	u8 vstepmax_smpswaittimemax_shift;
	u8 vlimitto_vddmin_shift;
	u8 vlimitto_vddmax_shift;
	u8 vlimitto_timeout_shift;

	const struct omap_vp_ops *ops;
};

/**
 * struct omap_vp_instance - VP register offsets (per-VDD)
 * @common: pointer to struct omap_vp_common * for this SoC
 * @vpconfig: PRM_VP*_CONFIG reg offset from PRM start
 * @vstepmin: PRM_VP*_VSTEPMIN reg offset from PRM start
 * @vlimitto: PRM_VP*_VLIMITTO reg offset from PRM start
 * @vstatus: PRM_VP*_VSTATUS reg offset from PRM start
 * @voltage: PRM_VP*_VOLTAGE reg offset from PRM start
 * @id: Unique identifier for VP instance.
 * @enabled: flag to keep track of whether vp is enabled or not
 *
 * XXX vp_common is probably not needed since it is per-SoC
 */
struct omap_vp_instance {
	const struct omap_vp_common *common;
	u8 vpconfig;
	u8 vstepmin;
	u8 vstepmax;
	u8 vlimitto;
	u8 vstatus;
	u8 voltage;
	u8 id;
	bool enabled;
};

extern struct omap_vp_instance omap3_vp_mpu;
extern struct omap_vp_instance omap3_vp_core;

extern struct omap_vp_instance omap4_vp_mpu;
extern struct omap_vp_instance omap4_vp_iva;
extern struct omap_vp_instance omap4_vp_core;

void omap_vp_init(struct voltagedomain *voltdm);
void omap_vp_enable(struct voltagedomain *voltdm);
void omap_vp_disable(struct voltagedomain *voltdm);
unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm);
int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
			      unsigned long target_volt);
int omap_vp_update_errorgain(struct voltagedomain *voltdm,
			     unsigned long target_volt);

#endif
Commit	Line	Data
c0718df4 PW	1	/*
	2	* OMAP3/4 Voltage Processor (VP) structure and macro definitions
	3	*
	4	* Copyright (C) 2007, 2010 Texas Instruments, Inc.
	5	* Rajendra Nayak <rnayak@ti.com>
	6	* Lesly A M <x0080970@ti.com>
	7	* Thara Gopinath <thara@ti.com>
	8	*
	9	* Copyright (C) 2008, 2011 Nokia Corporation
	10	* Kalle Jokiniemi
	11	* Paul Walmsley
	12	*
	13	* This program is free software; you can redistribute it and/or
	14	* modify it under the terms of the GNU General Public License version
	15	* 2 as published by the Free Software Foundation.
	16	*/
	17	#ifndef __ARCH_ARM_MACH_OMAP2_VP_H
	18	#define __ARCH_ARM_MACH_OMAP2_VP_H
	19
	20	#include <linux/kernel.h>
	21
01f48d30 KH	22	struct voltagedomain;
01f48d30 KH	23
58aaa599 KH	24	/*
	25	* Voltage Processor (VP) identifiers
	26	*/
	27	#define OMAP3_VP_VDD_MPU_ID 0
	28	#define OMAP3_VP_VDD_CORE_ID 1
	29	#define OMAP4_VP_VDD_CORE_ID 0
	30	#define OMAP4_VP_VDD_IVA_ID 1
	31	#define OMAP4_VP_VDD_MPU_ID 2
	32
c0718df4 PW	33	/* XXX document */
	34	#define VP_IDLE_TIMEOUT 200
	35	#define VP_TRANXDONE_TIMEOUT 300
	36
58aaa599 KH	37	/**
	38	* struct omap_vp_ops - per-VP operations
	39	* @check_txdone: check for VP transaction done
	40	* @clear_txdone: clear VP transaction done status
	41	*/
	42	struct omap_vp_ops {
	43	u32 (*check_txdone)(u8 vp_id);
	44	void (*clear_txdone)(u8 vp_id);
	45	};
c0718df4 PW	46
c0718df4 PW	47	/**
b7ea803e	48	* struct omap_vp_common - register data common to all VDDs
0ec3041e	49	* @vpconfig_erroroffset_mask: ERROROFFSET bitmask in the PRM_VP*_CONFIG reg
c0718df4 PW	50	* @vpconfig_errorgain_mask: ERRORGAIN bitmask in the PRM_VP*_CONFIG reg
c0718df4 PW	51	* @vpconfig_initvoltage_mask: INITVOLTAGE bitmask in the PRM_VP*_CONFIG reg
0ec3041e	52	* @vpconfig_timeouten: TIMEOUT bitmask in the PRM_VP*_CONFIG reg
c0718df4 PW	53	* @vpconfig_initvdd: INITVDD bitmask in the PRM_VP*_CONFIG reg
	54	* @vpconfig_forceupdate: FORCEUPDATE bitmask in the PRM_VP*_CONFIG reg
	55	* @vpconfig_vpenable: VPENABLE bitmask in the PRM_VP*_CONFIG reg
	56	* @vpconfig_erroroffset_shift: ERROROFFSET field shift in PRM_VP*_CONFIG reg
	57	* @vpconfig_errorgain_shift: ERRORGAIN field shift in PRM_VP*_CONFIG reg
	58	* @vpconfig_initvoltage_shift: INITVOLTAGE field shift in PRM_VP*_CONFIG reg
0ec3041e KH	59	* @vstepmin_stepmin_shift: VSTEPMIN field shift in the PRM_VP*_VSTEPMIN reg
	60	* @vstepmin_smpswaittimemin_shift: SMPSWAITTIMEMIN field shift in PRM_VP*_VSTEPMIN reg
	61	* @vstepmax_stepmax_shift: VSTEPMAX field shift in the PRM_VP*_VSTEPMAX reg
	62	* @vstepmax_smpswaittimemax_shift: SMPSWAITTIMEMAX field shift in PRM_VP*_VSTEPMAX reg
	63	* @vlimitto_vddmin_shift: VDDMIN field shift in PRM_VP*_VLIMITTO reg
	64	* @vlimitto_vddmax_shift: VDDMAX field shift in PRM_VP*_VLIMITTO reg
	65	* @vlimitto_timeout_shift: TIMEOUT field shift in PRM_VP*_VLIMITTO reg
c0718df4	66	*/
b7ea803e	67	struct omap_vp_common {
0ec3041e	68	u32 vpconfig_erroroffset_mask;
c0718df4 PW	69	u32 vpconfig_errorgain_mask;
c0718df4 PW	70	u32 vpconfig_initvoltage_mask;
0ec3041e KH	71	u8 vpconfig_timeouten;
	72	u8 vpconfig_initvdd;
	73	u8 vpconfig_forceupdate;
	74	u8 vpconfig_vpenable;
c0718df4 PW	75	u8 vstepmin_stepmin_shift;
	76	u8 vstepmin_smpswaittimemin_shift;
	77	u8 vstepmax_stepmax_shift;
	78	u8 vstepmax_smpswaittimemax_shift;
	79	u8 vlimitto_vddmin_shift;
	80	u8 vlimitto_vddmax_shift;
	81	u8 vlimitto_timeout_shift;
c0718df4	82
58aaa599	83	const struct omap_vp_ops *ops;
c0718df4 PW	84	};
	85
	86	/**
b7ea803e KH	87	* struct omap_vp_instance - VP register offsets (per-VDD)
b7ea803e KH	88	* @common: pointer to struct omap_vp_common * for this SoC
c0718df4 PW	89	* @vpconfig: PRM_VP*_CONFIG reg offset from PRM start
	90	* @vstepmin: PRM_VP*_VSTEPMIN reg offset from PRM start
	91	* @vlimitto: PRM_VP*_VLIMITTO reg offset from PRM start
	92	* @vstatus: PRM_VP*_VSTATUS reg offset from PRM start
	93	* @voltage: PRM_VP*_VOLTAGE reg offset from PRM start
58aaa599	94	* @id: Unique identifier for VP instance.
b7ea803e	95	* @enabled: flag to keep track of whether vp is enabled or not
c0718df4 PW	96	*
	97	* XXX vp_common is probably not needed since it is per-SoC
	98	*/
b7ea803e KH	99	struct omap_vp_instance {
b7ea803e KH	100	const struct omap_vp_common *common;
c0718df4 PW	101	u8 vpconfig;
	102	u8 vstepmin;
	103	u8 vstepmax;
	104	u8 vlimitto;
	105	u8 vstatus;
	106	u8 voltage;
58aaa599	107	u8 id;
b7ea803e	108	bool enabled;
c0718df4 PW	109	};
c0718df4 PW	110
b7ea803e KH	111	extern struct omap_vp_instance omap3_vp_mpu;
b7ea803e KH	112	extern struct omap_vp_instance omap3_vp_core;
c0718df4	113
b7ea803e KH	114	extern struct omap_vp_instance omap4_vp_mpu;
	115	extern struct omap_vp_instance omap4_vp_iva;
	116	extern struct omap_vp_instance omap4_vp_core;
c0718df4	117
01f48d30 KH	118	void omap_vp_init(struct voltagedomain *voltdm);
	119	void omap_vp_enable(struct voltagedomain *voltdm);
	120	void omap_vp_disable(struct voltagedomain *voltdm);
	121	unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm);
	122	int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
	123	unsigned long target_volt);
76ea7424 KH	124	int omap_vp_update_errorgain(struct voltagedomain *voltdm,
76ea7424 KH	125	unsigned long target_volt);
01f48d30	126
c0718df4	127	#endif