[deliverable/linux.git] / arch / arm / mach-orion / common.c

/*
 * arch/arm/mach-orion/common.c
 *
 * Core functions for Marvell Orion System On Chip
 *
 * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
 *
 * This file is licensed under  the terms of the GNU General Public
 * License version 2. This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/serial_8250.h>
#include <linux/mv643xx_eth.h>
#include <asm/page.h>
#include <asm/timex.h>
#include <asm/mach/map.h>
#include <asm/arch/orion.h>
#include "common.h"

/*****************************************************************************
 * I/O Address Mapping
 ****************************************************************************/
static struct map_desc orion_io_desc[] __initdata = {
	{
		.virtual	= ORION_REGS_BASE,
		.pfn		= __phys_to_pfn(ORION_REGS_BASE),
		.length		= ORION_REGS_SIZE,
		.type		= MT_DEVICE
	},
	{
		.virtual	= ORION_PCIE_IO_BASE,
		.pfn		= __phys_to_pfn(ORION_PCIE_IO_BASE),
		.length		= ORION_PCIE_IO_SIZE,
		.type		= MT_DEVICE
	},
	{
		.virtual	= ORION_PCI_IO_BASE,
		.pfn		= __phys_to_pfn(ORION_PCI_IO_BASE),
		.length		= ORION_PCI_IO_SIZE,
		.type		= MT_DEVICE
	},
	{
		.virtual	= ORION_PCIE_WA_BASE,
		.pfn		= __phys_to_pfn(ORION_PCIE_WA_BASE),
		.length		= ORION_PCIE_WA_SIZE,
		.type		= MT_DEVICE
	},
};

void __init orion_map_io(void)
{
	iotable_init(orion_io_desc, ARRAY_SIZE(orion_io_desc));
}

/*****************************************************************************
 * UART
 ****************************************************************************/

static struct resource orion_uart_resources[] = {
	{
		.start		= UART0_BASE,
		.end		= UART0_BASE + 0xff,
		.flags		= IORESOURCE_MEM,
	},
	{
		.start		= IRQ_ORION_UART0,
		.end		= IRQ_ORION_UART0,
		.flags		= IORESOURCE_IRQ,
	},
	{
		.start		= UART1_BASE,
		.end		= UART1_BASE + 0xff,
		.flags		= IORESOURCE_MEM,
	},
	{
		.start		= IRQ_ORION_UART1,
		.end		= IRQ_ORION_UART1,
		.flags		= IORESOURCE_IRQ,
	},
};

static struct plat_serial8250_port orion_uart_data[] = {
	{
		.mapbase	= UART0_BASE,
		.membase	= (char *)UART0_BASE,
		.irq		= IRQ_ORION_UART0,
		.flags		= UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
		.iotype		= UPIO_MEM,
		.regshift	= 2,
		.uartclk	= ORION_TCLK,
	},
	{
		.mapbase	= UART1_BASE,
		.membase	= (char *)UART1_BASE,
		.irq		= IRQ_ORION_UART1,
		.flags		= UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
		.iotype		= UPIO_MEM,
		.regshift	= 2,
		.uartclk	= ORION_TCLK,
	},
	{ },
};

static struct platform_device orion_uart = {
	.name			= "serial8250",
	.id			= PLAT8250_DEV_PLATFORM,
	.dev			= {
		.platform_data	= orion_uart_data,
	},
	.resource		= orion_uart_resources,
	.num_resources		= ARRAY_SIZE(orion_uart_resources),
};

/*******************************************************************************
 * USB Controller - 2 interfaces
 ******************************************************************************/

static struct resource orion_ehci0_resources[] = {
	{
		.start	= ORION_USB0_REG_BASE,
		.end	= ORION_USB0_REG_BASE + SZ_4K,
		.flags	= IORESOURCE_MEM,
	},
	{
		.start	= IRQ_ORION_USB0_CTRL,
		.end	= IRQ_ORION_USB0_CTRL,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct resource orion_ehci1_resources[] = {
	{
		.start	= ORION_USB1_REG_BASE,
		.end	= ORION_USB1_REG_BASE + SZ_4K,
		.flags	= IORESOURCE_MEM,
	},
	{
		.start	= IRQ_ORION_USB1_CTRL,
		.end	= IRQ_ORION_USB1_CTRL,
		.flags	= IORESOURCE_IRQ,
	},
};

static u64 ehci_dmamask = 0xffffffffUL;

static struct platform_device orion_ehci0 = {
	.name		= "orion-ehci",
	.id		= 0,
	.dev		= {
		.dma_mask		= &ehci_dmamask,
		.coherent_dma_mask	= 0xffffffff,
	},
	.resource	= orion_ehci0_resources,
	.num_resources	= ARRAY_SIZE(orion_ehci0_resources),
};

static struct platform_device orion_ehci1 = {
	.name		= "orion-ehci",
	.id		= 1,
	.dev		= {
		.dma_mask		= &ehci_dmamask,
		.coherent_dma_mask	= 0xffffffff,
	},
	.resource	= orion_ehci1_resources,
	.num_resources	= ARRAY_SIZE(orion_ehci1_resources),
};

/*****************************************************************************
 * Gigabit Ethernet port
 * (The Orion and Discovery (MV643xx) families use the same Ethernet driver)
 ****************************************************************************/

static struct resource orion_eth_shared_resources[] = {
	{
		.start	= ORION_ETH_REG_BASE,
		.end	= ORION_ETH_REG_BASE + 0xffff,
		.flags	= IORESOURCE_MEM,
	},
};

static struct platform_device orion_eth_shared = {
	.name		= MV643XX_ETH_SHARED_NAME,
	.id		= 0,
	.num_resources	= 1,
	.resource	= orion_eth_shared_resources,
};

static struct resource orion_eth_resources[] = {
	{
		.name	= "eth irq",
		.start	= IRQ_ORION_ETH_SUM,
		.end	= IRQ_ORION_ETH_SUM,
		.flags	= IORESOURCE_IRQ,
	}
};

static struct platform_device orion_eth = {
	.name		= MV643XX_ETH_NAME,
	.id		= 0,
	.num_resources	= 1,
	.resource	= orion_eth_resources,
};

void __init orion_eth_init(struct mv643xx_eth_platform_data *eth_data)
{
	orion_eth.dev.platform_data = eth_data;
	platform_device_register(&orion_eth_shared);
	platform_device_register(&orion_eth);
}

/*****************************************************************************
 * General
 ****************************************************************************/

/*
 * Identify device ID and rev from PCIE configuration header space '0'.
 */
static void orion_id(u32 *dev, u32 *rev, char **dev_name)
{
	orion_pcie_id(dev, rev);

	if (*dev == MV88F5281_DEV_ID) {
		if (*rev == MV88F5281_REV_D2) {
			*dev_name = "MV88F5281-D2";
		} else if (*rev == MV88F5281_REV_D1) {
			*dev_name = "MV88F5281-D1";
		} else {
			*dev_name = "MV88F5281-Rev-Unsupported";
		}
	} else if (*dev == MV88F5182_DEV_ID) {
		if (*rev == MV88F5182_REV_A2) {
			*dev_name = "MV88F5182-A2";
		} else {
			*dev_name = "MV88F5182-Rev-Unsupported";
		}
	} else {
		*dev_name = "Device-Unknown";
	}
}

void __init orion_init(void)
{
	char *dev_name;
	u32 dev, rev;

	orion_id(&dev, &rev, &dev_name);
	printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, ORION_TCLK);

	/*
	 * Setup Orion address map
	 */
	orion_setup_cpu_wins();
	orion_setup_usb_wins();
	orion_setup_eth_wins();
	orion_setup_pci_wins();
	orion_setup_pcie_wins();
	if (dev == MV88F5182_DEV_ID)
		orion_setup_sata_wins();

	/*
	 * REgister devices
	 */
	platform_device_register(&orion_uart);
	platform_device_register(&orion_ehci0);
	if (dev == MV88F5182_DEV_ID)
		platform_device_register(&orion_ehci1);
}
Commit	Line	Data
585cf175 TP	1	/*
	2	* arch/arm/mach-orion/common.c
	3	*
	4	* Core functions for Marvell Orion System On Chip
	5	*
	6	* Maintainer: Tzachi Perelstein <tzachi@marvell.com>
	7	*
	8	* This file is licensed under the terms of the GNU General Public
	9	* License version 2. This program is licensed "as is" without any
	10	* warranty of any kind, whether express or implied.
	11	*/
	12
	13	#include <linux/kernel.h>
	14	#include <linux/init.h>
ca26f7d3 TP	15	#include <linux/platform_device.h>
ca26f7d3 TP	16	#include <linux/serial_8250.h>
e07c9d85	17	#include <linux/mv643xx_eth.h>
585cf175	18	#include <asm/page.h>
c67de5b3	19	#include <asm/timex.h>
585cf175 TP	20	#include <asm/mach/map.h>
	21	#include <asm/arch/orion.h>
	22	#include "common.h"
	23
	24	/*****************************************************************************
	25	* I/O Address Mapping
	26	****************************************************************************/
	27	static struct map_desc orion_io_desc[] __initdata = {
	28	{
	29	.virtual = ORION_REGS_BASE,
	30	.pfn = __phys_to_pfn(ORION_REGS_BASE),
	31	.length = ORION_REGS_SIZE,
	32	.type = MT_DEVICE
	33	},
	34	{
	35	.virtual = ORION_PCIE_IO_BASE,
	36	.pfn = __phys_to_pfn(ORION_PCIE_IO_BASE),
	37	.length = ORION_PCIE_IO_SIZE,
	38	.type = MT_DEVICE
	39	},
	40	{
	41	.virtual = ORION_PCI_IO_BASE,
	42	.pfn = __phys_to_pfn(ORION_PCI_IO_BASE),
	43	.length = ORION_PCI_IO_SIZE,
	44	.type = MT_DEVICE
	45	},
	46	{
	47	.virtual = ORION_PCIE_WA_BASE,
	48	.pfn = __phys_to_pfn(ORION_PCIE_WA_BASE),
	49	.length = ORION_PCIE_WA_SIZE,
	50	.type = MT_DEVICE
	51	},
	52	};
	53
	54	void __init orion_map_io(void)
	55	{
	56	iotable_init(orion_io_desc, ARRAY_SIZE(orion_io_desc));
	57	}
c67de5b3	58
ca26f7d3 TP	59	/*****************************************************************************
	60	* UART
	61	****************************************************************************/
	62
	63	static struct resource orion_uart_resources[] = {
	64	{
	65	.start = UART0_BASE,
	66	.end = UART0_BASE + 0xff,
	67	.flags = IORESOURCE_MEM,
	68	},
	69	{
	70	.start = IRQ_ORION_UART0,
	71	.end = IRQ_ORION_UART0,
	72	.flags = IORESOURCE_IRQ,
	73	},
	74	{
	75	.start = UART1_BASE,
	76	.end = UART1_BASE + 0xff,
	77	.flags = IORESOURCE_MEM,
	78	},
	79	{
	80	.start = IRQ_ORION_UART1,
	81	.end = IRQ_ORION_UART1,
	82	.flags = IORESOURCE_IRQ,
	83	},
	84	};
	85
	86	static struct plat_serial8250_port orion_uart_data[] = {
	87	{
	88	.mapbase = UART0_BASE,
	89	.membase = (char *)UART0_BASE,
	90	.irq = IRQ_ORION_UART0,
	91	.flags = UPF_SKIP_TEST \| UPF_BOOT_AUTOCONF,
	92	.iotype = UPIO_MEM,
	93	.regshift = 2,
	94	.uartclk = ORION_TCLK,
	95	},
	96	{
	97	.mapbase = UART1_BASE,
	98	.membase = (char *)UART1_BASE,
	99	.irq = IRQ_ORION_UART1,
	100	.flags = UPF_SKIP_TEST \| UPF_BOOT_AUTOCONF,
	101	.iotype = UPIO_MEM,
	102	.regshift = 2,
	103	.uartclk = ORION_TCLK,
	104	},
	105	{ },
	106	};
	107
	108	static struct platform_device orion_uart = {
	109	.name = "serial8250",
	110	.id = PLAT8250_DEV_PLATFORM,
	111	.dev = {
	112	.platform_data = orion_uart_data,
	113	},
	114	.resource = orion_uart_resources,
	115	.num_resources = ARRAY_SIZE(orion_uart_resources),
	116	};
	117
	118	/*******************************************************************************
	119	* USB Controller - 2 interfaces
	120	******************************************************************************/
	121
	122	static struct resource orion_ehci0_resources[] = {
123	{
124	.start = ORION_USB0_REG_BASE,
125	.end = ORION_USB0_REG_BASE + SZ_4K,
126	.flags = IORESOURCE_MEM,
127	},
128	{
129	.start = IRQ_ORION_USB0_CTRL,
130	.end = IRQ_ORION_USB0_CTRL,
131	.flags = IORESOURCE_IRQ,
132	},
133	};
134
135	static struct resource orion_ehci1_resources[] = {
136	{
137	.start = ORION_USB1_REG_BASE,
138	.end = ORION_USB1_REG_BASE + SZ_4K,
139	.flags = IORESOURCE_MEM,
140	},
141	{
142	.start = IRQ_ORION_USB1_CTRL,
143	.end = IRQ_ORION_USB1_CTRL,
144	.flags = IORESOURCE_IRQ,
145	},
146	};
147
148	static u64 ehci_dmamask = 0xffffffffUL;
149
150	static struct platform_device orion_ehci0 = {
151	.name = "orion-ehci",
152	.id = 0,
153	.dev = {
154	.dma_mask = &ehci_dmamask,
155	.coherent_dma_mask = 0xffffffff,
156	},
157	.resource = orion_ehci0_resources,
158	.num_resources = ARRAY_SIZE(orion_ehci0_resources),
159	};
160
161	static struct platform_device orion_ehci1 = {
162	.name = "orion-ehci",
163	.id = 1,
164	.dev = {
165	.dma_mask = &ehci_dmamask,
166	.coherent_dma_mask = 0xffffffff,
167	},
168	.resource = orion_ehci1_resources,
169	.num_resources = ARRAY_SIZE(orion_ehci1_resources),
170	};
171
e07c9d85 TP	172	/*****************************************************************************
	173	* Gigabit Ethernet port
	174	* (The Orion and Discovery (MV643xx) families use the same Ethernet driver)
	175	****************************************************************************/
	176
	177	static struct resource orion_eth_shared_resources[] = {
	178	{
	179	.start = ORION_ETH_REG_BASE,
	180	.end = ORION_ETH_REG_BASE + 0xffff,
	181	.flags = IORESOURCE_MEM,
	182	},
	183	};
	184
	185	static struct platform_device orion_eth_shared = {
	186	.name = MV643XX_ETH_SHARED_NAME,
	187	.id = 0,
	188	.num_resources = 1,
	189	.resource = orion_eth_shared_resources,
	190	};
	191
	192	static struct resource orion_eth_resources[] = {
	193	{
	194	.name = "eth irq",
	195	.start = IRQ_ORION_ETH_SUM,
	196	.end = IRQ_ORION_ETH_SUM,
	197	.flags = IORESOURCE_IRQ,
	198	}
	199	};
	200
	201	static struct platform_device orion_eth = {
	202	.name = MV643XX_ETH_NAME,
	203	.id = 0,
	204	.num_resources = 1,
	205	.resource = orion_eth_resources,
	206	};
	207
	208	void __init orion_eth_init(struct mv643xx_eth_platform_data *eth_data)
	209	{
	210	orion_eth.dev.platform_data = eth_data;
	211	platform_device_register(&orion_eth_shared);
	212	platform_device_register(&orion_eth);
	213	}
	214
c67de5b3 TP	215	/*****************************************************************************
	216	* General
	217	****************************************************************************/
	218
	219	/*
	220	* Identify device ID and rev from PCIE configuration header space '0'.
	221	*/
	222	static void orion_id(u32 dev, u32 rev, char **dev_name)
	223	{
	224	orion_pcie_id(dev, rev);
	225
	226	if (*dev == MV88F5281_DEV_ID) {
	227	if (*rev == MV88F5281_REV_D2) {
	228	*dev_name = "MV88F5281-D2";
	229	} else if (*rev == MV88F5281_REV_D1) {
	230	*dev_name = "MV88F5281-D1";
	231	} else {
	232	*dev_name = "MV88F5281-Rev-Unsupported";
	233	}
	234	} else if (*dev == MV88F5182_DEV_ID) {
	235	if (*rev == MV88F5182_REV_A2) {
	236	*dev_name = "MV88F5182-A2";
	237	} else {
	238	*dev_name = "MV88F5182-Rev-Unsupported";
	239	}
	240	} else {
	241	*dev_name = "Device-Unknown";
	242	}
	243	}
	244
	245	void __init orion_init(void)
	246	{
	247	char *dev_name;
	248	u32 dev, rev;
	249
	250	orion_id(&dev, &rev, &dev_name);
	251	printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, ORION_TCLK);
	252
	253	/*
	254	* Setup Orion address map
	255	*/
	256	orion_setup_cpu_wins();
	257	orion_setup_usb_wins();
	258	orion_setup_eth_wins();
	259	orion_setup_pci_wins();
	260	orion_setup_pcie_wins();
	261	if (dev == MV88F5182_DEV_ID)
	262	orion_setup_sata_wins();
ca26f7d3 TP	263
	264	/*
	265	* REgister devices
	266	*/
	267	platform_device_register(&orion_uart);
	268	platform_device_register(&orion_ehci0);
	269	if (dev == MV88F5182_DEV_ID)
	270	platform_device_register(&orion_ehci1);
c67de5b3	271	}