Commit | Line | Data |
---|---|---|
585cf175 | 1 | /* |
9dd0b194 | 2 | * arch/arm/mach-orion5x/common.c |
585cf175 | 3 | * |
9dd0b194 | 4 | * Core functions for Marvell Orion 5x SoCs |
585cf175 TP |
5 | * |
6 | * Maintainer: Tzachi Perelstein <tzachi@marvell.com> | |
7 | * | |
159ffb3a LB |
8 | * This file is licensed under the terms of the GNU General Public |
9 | * License version 2. This program is licensed "as is" without any | |
585cf175 TP |
10 | * warranty of any kind, whether express or implied. |
11 | */ | |
12 | ||
13 | #include <linux/kernel.h> | |
14 | #include <linux/init.h> | |
ca26f7d3 TP |
15 | #include <linux/platform_device.h> |
16 | #include <linux/serial_8250.h> | |
83b6d822 | 17 | #include <linux/mbus.h> |
e07c9d85 | 18 | #include <linux/mv643xx_eth.h> |
144aa3db | 19 | #include <linux/mv643xx_i2c.h> |
15a32632 | 20 | #include <linux/ata_platform.h> |
585cf175 | 21 | #include <asm/page.h> |
be73a347 | 22 | #include <asm/setup.h> |
c67de5b3 | 23 | #include <asm/timex.h> |
be73a347 | 24 | #include <asm/mach/arch.h> |
585cf175 | 25 | #include <asm/mach/map.h> |
2bac1de2 | 26 | #include <asm/mach/time.h> |
f244baa3 | 27 | #include <asm/arch/hardware.h> |
9dd0b194 | 28 | #include <asm/arch/orion5x.h> |
705a7521 | 29 | #include <asm/plat-orion/ehci-orion.h> |
5d4294c5 | 30 | #include <asm/plat-orion/orion_nand.h> |
2bac1de2 | 31 | #include <asm/plat-orion/time.h> |
585cf175 TP |
32 | #include "common.h" |
33 | ||
34 | /***************************************************************************** | |
35 | * I/O Address Mapping | |
36 | ****************************************************************************/ | |
9dd0b194 | 37 | static struct map_desc orion5x_io_desc[] __initdata = { |
585cf175 | 38 | { |
9dd0b194 LB |
39 | .virtual = ORION5X_REGS_VIRT_BASE, |
40 | .pfn = __phys_to_pfn(ORION5X_REGS_PHYS_BASE), | |
41 | .length = ORION5X_REGS_SIZE, | |
e7068ad3 LB |
42 | .type = MT_DEVICE, |
43 | }, { | |
9dd0b194 LB |
44 | .virtual = ORION5X_PCIE_IO_VIRT_BASE, |
45 | .pfn = __phys_to_pfn(ORION5X_PCIE_IO_PHYS_BASE), | |
46 | .length = ORION5X_PCIE_IO_SIZE, | |
e7068ad3 LB |
47 | .type = MT_DEVICE, |
48 | }, { | |
9dd0b194 LB |
49 | .virtual = ORION5X_PCI_IO_VIRT_BASE, |
50 | .pfn = __phys_to_pfn(ORION5X_PCI_IO_PHYS_BASE), | |
51 | .length = ORION5X_PCI_IO_SIZE, | |
e7068ad3 LB |
52 | .type = MT_DEVICE, |
53 | }, { | |
9dd0b194 LB |
54 | .virtual = ORION5X_PCIE_WA_VIRT_BASE, |
55 | .pfn = __phys_to_pfn(ORION5X_PCIE_WA_PHYS_BASE), | |
56 | .length = ORION5X_PCIE_WA_SIZE, | |
e7068ad3 | 57 | .type = MT_DEVICE, |
585cf175 TP |
58 | }, |
59 | }; | |
60 | ||
9dd0b194 | 61 | void __init orion5x_map_io(void) |
585cf175 | 62 | { |
9dd0b194 | 63 | iotable_init(orion5x_io_desc, ARRAY_SIZE(orion5x_io_desc)); |
585cf175 | 64 | } |
c67de5b3 | 65 | |
ca26f7d3 TP |
66 | /***************************************************************************** |
67 | * UART | |
68 | ****************************************************************************/ | |
69 | ||
9dd0b194 | 70 | static struct resource orion5x_uart_resources[] = { |
ca26f7d3 | 71 | { |
7f74c2c7 LB |
72 | .start = UART0_PHYS_BASE, |
73 | .end = UART0_PHYS_BASE + 0xff, | |
ca26f7d3 | 74 | .flags = IORESOURCE_MEM, |
e7068ad3 | 75 | }, { |
9dd0b194 LB |
76 | .start = IRQ_ORION5X_UART0, |
77 | .end = IRQ_ORION5X_UART0, | |
ca26f7d3 | 78 | .flags = IORESOURCE_IRQ, |
e7068ad3 | 79 | }, { |
7f74c2c7 LB |
80 | .start = UART1_PHYS_BASE, |
81 | .end = UART1_PHYS_BASE + 0xff, | |
ca26f7d3 | 82 | .flags = IORESOURCE_MEM, |
e7068ad3 | 83 | }, { |
9dd0b194 LB |
84 | .start = IRQ_ORION5X_UART1, |
85 | .end = IRQ_ORION5X_UART1, | |
ca26f7d3 TP |
86 | .flags = IORESOURCE_IRQ, |
87 | }, | |
88 | }; | |
89 | ||
9dd0b194 | 90 | static struct plat_serial8250_port orion5x_uart_data[] = { |
ca26f7d3 | 91 | { |
7f74c2c7 LB |
92 | .mapbase = UART0_PHYS_BASE, |
93 | .membase = (char *)UART0_VIRT_BASE, | |
9dd0b194 | 94 | .irq = IRQ_ORION5X_UART0, |
ca26f7d3 TP |
95 | .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, |
96 | .iotype = UPIO_MEM, | |
97 | .regshift = 2, | |
9dd0b194 | 98 | .uartclk = ORION5X_TCLK, |
e7068ad3 | 99 | }, { |
7f74c2c7 LB |
100 | .mapbase = UART1_PHYS_BASE, |
101 | .membase = (char *)UART1_VIRT_BASE, | |
9dd0b194 | 102 | .irq = IRQ_ORION5X_UART1, |
ca26f7d3 TP |
103 | .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, |
104 | .iotype = UPIO_MEM, | |
105 | .regshift = 2, | |
9dd0b194 | 106 | .uartclk = ORION5X_TCLK, |
e7068ad3 | 107 | }, { |
ca26f7d3 | 108 | }, |
ca26f7d3 TP |
109 | }; |
110 | ||
9dd0b194 | 111 | static struct platform_device orion5x_uart = { |
ca26f7d3 TP |
112 | .name = "serial8250", |
113 | .id = PLAT8250_DEV_PLATFORM, | |
114 | .dev = { | |
9dd0b194 | 115 | .platform_data = orion5x_uart_data, |
ca26f7d3 | 116 | }, |
9dd0b194 LB |
117 | .resource = orion5x_uart_resources, |
118 | .num_resources = ARRAY_SIZE(orion5x_uart_resources), | |
ca26f7d3 TP |
119 | }; |
120 | ||
121 | /******************************************************************************* | |
122 | * USB Controller - 2 interfaces | |
123 | ******************************************************************************/ | |
124 | ||
9dd0b194 | 125 | static struct resource orion5x_ehci0_resources[] = { |
ca26f7d3 | 126 | { |
9dd0b194 | 127 | .start = ORION5X_USB0_PHYS_BASE, |
994cab84 | 128 | .end = ORION5X_USB0_PHYS_BASE + SZ_4K - 1, |
ca26f7d3 | 129 | .flags = IORESOURCE_MEM, |
e7068ad3 | 130 | }, { |
9dd0b194 LB |
131 | .start = IRQ_ORION5X_USB0_CTRL, |
132 | .end = IRQ_ORION5X_USB0_CTRL, | |
ca26f7d3 TP |
133 | .flags = IORESOURCE_IRQ, |
134 | }, | |
135 | }; | |
136 | ||
9dd0b194 | 137 | static struct resource orion5x_ehci1_resources[] = { |
ca26f7d3 | 138 | { |
9dd0b194 | 139 | .start = ORION5X_USB1_PHYS_BASE, |
994cab84 | 140 | .end = ORION5X_USB1_PHYS_BASE + SZ_4K - 1, |
ca26f7d3 | 141 | .flags = IORESOURCE_MEM, |
e7068ad3 | 142 | }, { |
9dd0b194 LB |
143 | .start = IRQ_ORION5X_USB1_CTRL, |
144 | .end = IRQ_ORION5X_USB1_CTRL, | |
ca26f7d3 TP |
145 | .flags = IORESOURCE_IRQ, |
146 | }, | |
147 | }; | |
148 | ||
9dd0b194 LB |
149 | static struct orion_ehci_data orion5x_ehci_data = { |
150 | .dram = &orion5x_mbus_dram_info, | |
92aecfa9 LB |
151 | }; |
152 | ||
ca26f7d3 TP |
153 | static u64 ehci_dmamask = 0xffffffffUL; |
154 | ||
9dd0b194 | 155 | static struct platform_device orion5x_ehci0 = { |
ca26f7d3 TP |
156 | .name = "orion-ehci", |
157 | .id = 0, | |
158 | .dev = { | |
159 | .dma_mask = &ehci_dmamask, | |
160 | .coherent_dma_mask = 0xffffffff, | |
9dd0b194 | 161 | .platform_data = &orion5x_ehci_data, |
ca26f7d3 | 162 | }, |
9dd0b194 LB |
163 | .resource = orion5x_ehci0_resources, |
164 | .num_resources = ARRAY_SIZE(orion5x_ehci0_resources), | |
ca26f7d3 TP |
165 | }; |
166 | ||
9dd0b194 | 167 | static struct platform_device orion5x_ehci1 = { |
ca26f7d3 TP |
168 | .name = "orion-ehci", |
169 | .id = 1, | |
170 | .dev = { | |
171 | .dma_mask = &ehci_dmamask, | |
172 | .coherent_dma_mask = 0xffffffff, | |
9dd0b194 | 173 | .platform_data = &orion5x_ehci_data, |
ca26f7d3 | 174 | }, |
9dd0b194 LB |
175 | .resource = orion5x_ehci1_resources, |
176 | .num_resources = ARRAY_SIZE(orion5x_ehci1_resources), | |
ca26f7d3 TP |
177 | }; |
178 | ||
e07c9d85 TP |
179 | /***************************************************************************** |
180 | * Gigabit Ethernet port | |
181 | * (The Orion and Discovery (MV643xx) families use the same Ethernet driver) | |
182 | ****************************************************************************/ | |
183 | ||
d236f5a5 LB |
184 | struct mv643xx_eth_shared_platform_data orion5x_eth_shared_data = { |
185 | .dram = &orion5x_mbus_dram_info, | |
b8c15a60 | 186 | .t_clk = ORION5X_TCLK, |
d236f5a5 LB |
187 | }; |
188 | ||
9dd0b194 | 189 | static struct resource orion5x_eth_shared_resources[] = { |
e07c9d85 | 190 | { |
9dd0b194 LB |
191 | .start = ORION5X_ETH_PHYS_BASE + 0x2000, |
192 | .end = ORION5X_ETH_PHYS_BASE + 0x3fff, | |
e07c9d85 TP |
193 | .flags = IORESOURCE_MEM, |
194 | }, | |
195 | }; | |
196 | ||
9dd0b194 | 197 | static struct platform_device orion5x_eth_shared = { |
e07c9d85 TP |
198 | .name = MV643XX_ETH_SHARED_NAME, |
199 | .id = 0, | |
d236f5a5 LB |
200 | .dev = { |
201 | .platform_data = &orion5x_eth_shared_data, | |
202 | }, | |
e07c9d85 | 203 | .num_resources = 1, |
9dd0b194 | 204 | .resource = orion5x_eth_shared_resources, |
e07c9d85 TP |
205 | }; |
206 | ||
9dd0b194 | 207 | static struct resource orion5x_eth_resources[] = { |
e07c9d85 TP |
208 | { |
209 | .name = "eth irq", | |
9dd0b194 LB |
210 | .start = IRQ_ORION5X_ETH_SUM, |
211 | .end = IRQ_ORION5X_ETH_SUM, | |
e07c9d85 | 212 | .flags = IORESOURCE_IRQ, |
e7068ad3 | 213 | }, |
e07c9d85 TP |
214 | }; |
215 | ||
9dd0b194 | 216 | static struct platform_device orion5x_eth = { |
e07c9d85 TP |
217 | .name = MV643XX_ETH_NAME, |
218 | .id = 0, | |
219 | .num_resources = 1, | |
9dd0b194 | 220 | .resource = orion5x_eth_resources, |
e07c9d85 TP |
221 | }; |
222 | ||
9dd0b194 | 223 | void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data) |
e07c9d85 | 224 | { |
fa3959f4 | 225 | eth_data->shared = &orion5x_eth_shared; |
9dd0b194 | 226 | orion5x_eth.dev.platform_data = eth_data; |
fa3959f4 | 227 | |
9dd0b194 LB |
228 | platform_device_register(&orion5x_eth_shared); |
229 | platform_device_register(&orion5x_eth); | |
e07c9d85 TP |
230 | } |
231 | ||
144aa3db HVR |
232 | /***************************************************************************** |
233 | * I2C controller | |
234 | * (The Orion and Discovery (MV643xx) families share the same I2C controller) | |
235 | ****************************************************************************/ | |
236 | ||
9dd0b194 | 237 | static struct mv64xxx_i2c_pdata orion5x_i2c_pdata = { |
144aa3db HVR |
238 | .freq_m = 8, /* assumes 166 MHz TCLK */ |
239 | .freq_n = 3, | |
240 | .timeout = 1000, /* Default timeout of 1 second */ | |
241 | }; | |
242 | ||
9dd0b194 | 243 | static struct resource orion5x_i2c_resources[] = { |
144aa3db | 244 | { |
e7068ad3 LB |
245 | .name = "i2c base", |
246 | .start = I2C_PHYS_BASE, | |
247 | .end = I2C_PHYS_BASE + 0x20 -1, | |
248 | .flags = IORESOURCE_MEM, | |
249 | }, { | |
250 | .name = "i2c irq", | |
251 | .start = IRQ_ORION5X_I2C, | |
252 | .end = IRQ_ORION5X_I2C, | |
253 | .flags = IORESOURCE_IRQ, | |
144aa3db HVR |
254 | }, |
255 | }; | |
256 | ||
9dd0b194 | 257 | static struct platform_device orion5x_i2c = { |
144aa3db HVR |
258 | .name = MV64XXX_I2C_CTLR_NAME, |
259 | .id = 0, | |
9dd0b194 LB |
260 | .num_resources = ARRAY_SIZE(orion5x_i2c_resources), |
261 | .resource = orion5x_i2c_resources, | |
144aa3db | 262 | .dev = { |
e7068ad3 | 263 | .platform_data = &orion5x_i2c_pdata, |
144aa3db HVR |
264 | }, |
265 | }; | |
266 | ||
f244baa3 SB |
267 | /***************************************************************************** |
268 | * Sata port | |
269 | ****************************************************************************/ | |
9dd0b194 | 270 | static struct resource orion5x_sata_resources[] = { |
f244baa3 | 271 | { |
e7068ad3 LB |
272 | .name = "sata base", |
273 | .start = ORION5X_SATA_PHYS_BASE, | |
274 | .end = ORION5X_SATA_PHYS_BASE + 0x5000 - 1, | |
275 | .flags = IORESOURCE_MEM, | |
276 | }, { | |
277 | .name = "sata irq", | |
278 | .start = IRQ_ORION5X_SATA, | |
279 | .end = IRQ_ORION5X_SATA, | |
280 | .flags = IORESOURCE_IRQ, | |
281 | }, | |
f244baa3 SB |
282 | }; |
283 | ||
9dd0b194 | 284 | static struct platform_device orion5x_sata = { |
e7068ad3 LB |
285 | .name = "sata_mv", |
286 | .id = 0, | |
f244baa3 SB |
287 | .dev = { |
288 | .coherent_dma_mask = 0xffffffff, | |
289 | }, | |
e7068ad3 LB |
290 | .num_resources = ARRAY_SIZE(orion5x_sata_resources), |
291 | .resource = orion5x_sata_resources, | |
f244baa3 SB |
292 | }; |
293 | ||
9dd0b194 | 294 | void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data) |
f244baa3 | 295 | { |
9dd0b194 LB |
296 | sata_data->dram = &orion5x_mbus_dram_info; |
297 | orion5x_sata.dev.platform_data = sata_data; | |
298 | platform_device_register(&orion5x_sata); | |
f244baa3 SB |
299 | } |
300 | ||
2bac1de2 LB |
301 | /***************************************************************************** |
302 | * Time handling | |
303 | ****************************************************************************/ | |
304 | ||
9dd0b194 | 305 | static void orion5x_timer_init(void) |
2bac1de2 | 306 | { |
9dd0b194 | 307 | orion_time_init(IRQ_ORION5X_BRIDGE, ORION5X_TCLK); |
2bac1de2 LB |
308 | } |
309 | ||
9dd0b194 | 310 | struct sys_timer orion5x_timer = { |
e7068ad3 | 311 | .init = orion5x_timer_init, |
2bac1de2 LB |
312 | }; |
313 | ||
c67de5b3 TP |
314 | /***************************************************************************** |
315 | * General | |
316 | ****************************************************************************/ | |
317 | ||
318 | /* | |
b46926bb | 319 | * Identify device ID and rev from PCIe configuration header space '0'. |
c67de5b3 | 320 | */ |
9dd0b194 | 321 | static void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name) |
c67de5b3 | 322 | { |
9dd0b194 | 323 | orion5x_pcie_id(dev, rev); |
c67de5b3 TP |
324 | |
325 | if (*dev == MV88F5281_DEV_ID) { | |
326 | if (*rev == MV88F5281_REV_D2) { | |
327 | *dev_name = "MV88F5281-D2"; | |
328 | } else if (*rev == MV88F5281_REV_D1) { | |
329 | *dev_name = "MV88F5281-D1"; | |
330 | } else { | |
331 | *dev_name = "MV88F5281-Rev-Unsupported"; | |
332 | } | |
333 | } else if (*dev == MV88F5182_DEV_ID) { | |
334 | if (*rev == MV88F5182_REV_A2) { | |
335 | *dev_name = "MV88F5182-A2"; | |
336 | } else { | |
337 | *dev_name = "MV88F5182-Rev-Unsupported"; | |
338 | } | |
c9e3de94 HVR |
339 | } else if (*dev == MV88F5181_DEV_ID) { |
340 | if (*rev == MV88F5181_REV_B1) { | |
341 | *dev_name = "MV88F5181-Rev-B1"; | |
342 | } else { | |
343 | *dev_name = "MV88F5181-Rev-Unsupported"; | |
344 | } | |
c67de5b3 TP |
345 | } else { |
346 | *dev_name = "Device-Unknown"; | |
347 | } | |
348 | } | |
349 | ||
9dd0b194 | 350 | void __init orion5x_init(void) |
c67de5b3 TP |
351 | { |
352 | char *dev_name; | |
353 | u32 dev, rev; | |
354 | ||
9dd0b194 LB |
355 | orion5x_id(&dev, &rev, &dev_name); |
356 | printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, ORION5X_TCLK); | |
c67de5b3 TP |
357 | |
358 | /* | |
359 | * Setup Orion address map | |
360 | */ | |
9dd0b194 | 361 | orion5x_setup_cpu_mbus_bridge(); |
ca26f7d3 TP |
362 | |
363 | /* | |
159ffb3a | 364 | * Register devices. |
ca26f7d3 | 365 | */ |
9dd0b194 LB |
366 | platform_device_register(&orion5x_uart); |
367 | platform_device_register(&orion5x_ehci0); | |
ca26f7d3 | 368 | if (dev == MV88F5182_DEV_ID) |
9dd0b194 LB |
369 | platform_device_register(&orion5x_ehci1); |
370 | platform_device_register(&orion5x_i2c); | |
c67de5b3 | 371 | } |
be73a347 GL |
372 | |
373 | /* | |
374 | * Many orion-based systems have buggy bootloader implementations. | |
375 | * This is a common fixup for bogus memory tags. | |
376 | */ | |
377 | void __init tag_fixup_mem32(struct machine_desc *mdesc, struct tag *t, | |
378 | char **from, struct meminfo *meminfo) | |
379 | { | |
380 | for (; t->hdr.size; t = tag_next(t)) | |
381 | if (t->hdr.tag == ATAG_MEM && | |
382 | (!t->u.mem.size || t->u.mem.size & ~PAGE_MASK || | |
383 | t->u.mem.start & ~PAGE_MASK)) { | |
384 | printk(KERN_WARNING | |
385 | "Clearing invalid memory bank %dKB@0x%08x\n", | |
386 | t->u.mem.size / 1024, t->u.mem.start); | |
387 | t->hdr.tag = 0; | |
388 | } | |
389 | } |