projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 9dd0b194 | 1 | /* |
| 9dd0b194 LB |
2 | * IRQ definitions for Orion SoC |
| 3 | * | |
| 4 | * Maintainer: Tzachi Perelstein <tzachi@marvell.com> | |
| 5 | * | |
| 6 | * This file is licensed under the terms of the GNU General Public | |
| 7 | * License version 2. This program is licensed "as is" without any | |
| 8 | * warranty of any kind, whether express or implied. | |
| 9 | */ | |
| 10 | ||
| 11 | #ifndef __ASM_ARCH_IRQS_H | |
| 12 | #define __ASM_ARCH_IRQS_H | |
| 13 | ||
| 9dd0b194 LB |
14 | /* |
| 15 | * Orion Main Interrupt Controller | |
| 16 | */ | |
| 5be9fc23 BC |
17 | #define IRQ_ORION5X_BRIDGE (1 + 0) |
| 18 | #define IRQ_ORION5X_DOORBELL_H2C (1 + 1) | |
| 19 | #define IRQ_ORION5X_DOORBELL_C2H (1 + 2) | |
| 20 | #define IRQ_ORION5X_UART0 (1 + 3) | |
| 21 | #define IRQ_ORION5X_UART1 (1 + 4) | |
| 22 | #define IRQ_ORION5X_I2C (1 + 5) | |
| 23 | #define IRQ_ORION5X_GPIO_0_7 (1 + 6) | |
| 24 | #define IRQ_ORION5X_GPIO_8_15 (1 + 7) | |
| 25 | #define IRQ_ORION5X_GPIO_16_23 (1 + 8) | |
| 26 | #define IRQ_ORION5X_GPIO_24_31 (1 + 9) | |
| 27 | #define IRQ_ORION5X_PCIE0_ERR (1 + 10) | |
| 28 | #define IRQ_ORION5X_PCIE0_INT (1 + 11) | |
| 29 | #define IRQ_ORION5X_USB1_CTRL (1 + 12) | |
| 30 | #define IRQ_ORION5X_DEV_BUS_ERR (1 + 14) | |
| 31 | #define IRQ_ORION5X_PCI_ERR (1 + 15) | |
| 32 | #define IRQ_ORION5X_USB_BR_ERR (1 + 16) | |
| 33 | #define IRQ_ORION5X_USB0_CTRL (1 + 17) | |
| 34 | #define IRQ_ORION5X_ETH_RX (1 + 18) | |
| 35 | #define IRQ_ORION5X_ETH_TX (1 + 19) | |
| 36 | #define IRQ_ORION5X_ETH_MISC (1 + 20) | |
| 37 | #define IRQ_ORION5X_ETH_SUM (1 + 21) | |
| 38 | #define IRQ_ORION5X_ETH_ERR (1 + 22) | |
| 39 | #define IRQ_ORION5X_IDMA_ERR (1 + 23) | |
| 40 | #define IRQ_ORION5X_IDMA_0 (1 + 24) | |
| 41 | #define IRQ_ORION5X_IDMA_1 (1 + 25) | |
| 42 | #define IRQ_ORION5X_IDMA_2 (1 + 26) | |
| 43 | #define IRQ_ORION5X_IDMA_3 (1 + 27) | |
| 44 | #define IRQ_ORION5X_CESA (1 + 28) | |
| 45 | #define IRQ_ORION5X_SATA (1 + 29) | |
| 46 | #define IRQ_ORION5X_XOR0 (1 + 30) | |
| 47 | #define IRQ_ORION5X_XOR1 (1 + 31) | |
| 9dd0b194 LB |
48 | |
| 49 | /* | |
| 50 | * Orion General Purpose Pins | |
| 51 | */ | |
| 5be9fc23 | 52 | #define IRQ_ORION5X_GPIO_START 33 |
| 9569dae7 | 53 | #define NR_GPIO_IRQS 32 |
| 9dd0b194 | 54 | |
| 5cdbe5d2 | 55 | #define ORION5X_NR_IRQS (IRQ_ORION5X_GPIO_START + NR_GPIO_IRQS) |
| 9dd0b194 LB |
56 | |
| 57 | ||
| 58 | #endif |