[deliverable/linux.git] / arch / arm / mach-orion5x / rd88f6183ap-ge-setup.c

/*
 * arch/arm/mach-orion5x/rd88f6183-ap-ge-setup.c
 *
 * Marvell Orion-1-90 AP GE Reference Design Setup
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */
#include <linux/gpio.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/pci.h>
#include <linux/irq.h>
#include <linux/mtd/physmap.h>
#include <linux/mv643xx_eth.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
#include <linux/ethtool.h>
#include <net/dsa.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/pci.h>
#include "common.h"
#include "orion5x.h"

static struct mv643xx_eth_platform_data rd88f6183ap_ge_eth_data = {
	.phy_addr	= -1,
	.speed		= SPEED_1000,
	.duplex		= DUPLEX_FULL,
};

static struct dsa_chip_data rd88f6183ap_ge_switch_chip_data = {
	.port_names[0]	= "lan1",
	.port_names[1]	= "lan2",
	.port_names[2]	= "lan3",
	.port_names[3]	= "lan4",
	.port_names[4]	= "wan",
	.port_names[5]	= "cpu",
};

static struct dsa_platform_data rd88f6183ap_ge_switch_plat_data = {
	.nr_chips	= 1,
	.chip		= &rd88f6183ap_ge_switch_chip_data,
};

static struct mtd_partition rd88f6183ap_ge_partitions[] = {
	{
		.name	= "kernel",
		.offset	= 0x00000000,
		.size	= 0x00200000,
	}, {
		.name	= "rootfs",
		.offset	= 0x00200000,
		.size	= 0x00500000,
	}, {
		.name	= "nvram",
		.offset	= 0x00700000,
		.size	= 0x00080000,
	},
};

static struct flash_platform_data rd88f6183ap_ge_spi_slave_data = {
	.type		= "m25p64",
	.nr_parts	= ARRAY_SIZE(rd88f6183ap_ge_partitions),
	.parts		= rd88f6183ap_ge_partitions,
};

static struct spi_board_info __initdata rd88f6183ap_ge_spi_slave_info[] = {
	{
		.modalias	= "m25p80",
		.platform_data	= &rd88f6183ap_ge_spi_slave_data,
		.irq		= NO_IRQ,
		.max_speed_hz	= 20000000,
		.bus_num	= 0,
		.chip_select	= 0,
	},
};

static void __init rd88f6183ap_ge_init(void)
{
	/*
	 * Setup basic Orion functions. Need to be called early.
	 */
	orion5x_init();

	/*
	 * Configure peripherals.
	 */
	orion5x_ehci0_init();
	orion5x_eth_init(&rd88f6183ap_ge_eth_data);
	orion5x_eth_switch_init(&rd88f6183ap_ge_switch_plat_data,
				gpio_to_irq(3));
	spi_register_board_info(rd88f6183ap_ge_spi_slave_info,
				ARRAY_SIZE(rd88f6183ap_ge_spi_slave_info));
	orion5x_spi_init();
	orion5x_uart0_init();
}

static struct hw_pci rd88f6183ap_ge_pci __initdata = {
	.nr_controllers	= 2,
	.setup		= orion5x_pci_sys_setup,
	.scan		= orion5x_pci_sys_scan_bus,
	.map_irq	= orion5x_pci_map_irq,
};

static int __init rd88f6183ap_ge_pci_init(void)
{
	if (machine_is_rd88f6183ap_ge()) {
		orion5x_pci_disable();
		pci_common_init(&rd88f6183ap_ge_pci);
	}

	return 0;
}
subsys_initcall(rd88f6183ap_ge_pci_init);

MACHINE_START(RD88F6183AP_GE, "Marvell Orion-1-90 AP GE Reference Design")
	/* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */
	.atag_offset	= 0x100,
	.nr_irqs	= ORION5X_NR_IRQS,
	.init_machine	= rd88f6183ap_ge_init,
	.map_io		= orion5x_map_io,
	.init_early	= orion5x_init_early,
	.init_irq	= orion5x_init_irq,
	.init_time	= orion5x_timer_init,
	.fixup		= tag_fixup_mem32,
	.restart	= orion5x_restart,
MACHINE_END
Commit	Line	Data
0b0740c3 LB	1	/*
	2	* arch/arm/mach-orion5x/rd88f6183-ap-ge-setup.c
	3	*
	4	* Marvell Orion-1-90 AP GE Reference Design Setup
	5	*
	6	* This file is licensed under the terms of the GNU General Public
	7	* License version 2. This program is licensed "as is" without any
	8	* warranty of any kind, whether express or implied.
	9	*/
2f8163ba	10	#include <linux/gpio.h>
0b0740c3 LB	11	#include <linux/kernel.h>
	12	#include <linux/init.h>
	13	#include <linux/platform_device.h>
	14	#include <linux/pci.h>
	15	#include <linux/irq.h>
	16	#include <linux/mtd/physmap.h>
	17	#include <linux/mv643xx_eth.h>
	18	#include <linux/spi/spi.h>
0b0740c3 LB	19	#include <linux/spi/flash.h>
0b0740c3 LB	20	#include <linux/ethtool.h>
dcf1cece	21	#include <net/dsa.h>
0b0740c3	22	#include <asm/mach-types.h>
0b0740c3 LB	23	#include <asm/mach/arch.h>
0b0740c3 LB	24	#include <asm/mach/pci.h>
0b0740c3	25	#include "common.h"
c22c2c60	26	#include "orion5x.h"
0b0740c3 LB	27
	28	static struct mv643xx_eth_platform_data rd88f6183ap_ge_eth_data = {
	29	.phy_addr = -1,
	30	.speed = SPEED_1000,
	31	.duplex = DUPLEX_FULL,
	32	};
	33
e84665c9	34	static struct dsa_chip_data rd88f6183ap_ge_switch_chip_data = {
dcf1cece LB	35	.port_names[0] = "lan1",
	36	.port_names[1] = "lan2",
	37	.port_names[2] = "lan3",
	38	.port_names[3] = "lan4",
	39	.port_names[4] = "wan",
	40	.port_names[5] = "cpu",
	41	};
	42
e84665c9 LB	43	static struct dsa_platform_data rd88f6183ap_ge_switch_plat_data = {
	44	.nr_chips = 1,
	45	.chip = &rd88f6183ap_ge_switch_chip_data,
	46	};
	47
0b0740c3 LB	48	static struct mtd_partition rd88f6183ap_ge_partitions[] = {
	49	{
	50	.name = "kernel",
	51	.offset = 0x00000000,
	52	.size = 0x00200000,
	53	}, {
	54	.name = "rootfs",
	55	.offset = 0x00200000,
	56	.size = 0x00500000,
	57	}, {
	58	.name = "nvram",
	59	.offset = 0x00700000,
	60	.size = 0x00080000,
	61	},
	62	};
	63
	64	static struct flash_platform_data rd88f6183ap_ge_spi_slave_data = {
	65	.type = "m25p64",
	66	.nr_parts = ARRAY_SIZE(rd88f6183ap_ge_partitions),
	67	.parts = rd88f6183ap_ge_partitions,
	68	};
	69
	70	static struct spi_board_info __initdata rd88f6183ap_ge_spi_slave_info[] = {
	71	{
	72	.modalias = "m25p80",
	73	.platform_data = &rd88f6183ap_ge_spi_slave_data,
	74	.irq = NO_IRQ,
	75	.max_speed_hz = 20000000,
	76	.bus_num = 0,
	77	.chip_select = 0,
	78	},
	79	};
	80
	81	static void __init rd88f6183ap_ge_init(void)
	82	{
	83	/*
	84	* Setup basic Orion functions. Need to be called early.
	85	*/
	86	orion5x_init();
	87
	88	/*
	89	* Configure peripherals.
	90	*/
	91	orion5x_ehci0_init();
	92	orion5x_eth_init(&rd88f6183ap_ge_eth_data);
e84665c9 LB	93	orion5x_eth_switch_init(&rd88f6183ap_ge_switch_plat_data,
e84665c9 LB	94	gpio_to_irq(3));
0b0740c3 LB	95	spi_register_board_info(rd88f6183ap_ge_spi_slave_info,
	96	ARRAY_SIZE(rd88f6183ap_ge_spi_slave_info));
	97	orion5x_spi_init();
	98	orion5x_uart0_init();
	99	}
	100
	101	static struct hw_pci rd88f6183ap_ge_pci __initdata = {
	102	.nr_controllers = 2,
0b0740c3 LB	103	.setup = orion5x_pci_sys_setup,
	104	.scan = orion5x_pci_sys_scan_bus,
	105	.map_irq = orion5x_pci_map_irq,
	106	};
	107
	108	static int __init rd88f6183ap_ge_pci_init(void)
	109	{
	110	if (machine_is_rd88f6183ap_ge()) {
	111	orion5x_pci_disable();
	112	pci_common_init(&rd88f6183ap_ge_pci);
	113	}
	114
	115	return 0;
	116	}
	117	subsys_initcall(rd88f6183ap_ge_pci_init);
	118
	119	MACHINE_START(RD88F6183AP_GE, "Marvell Orion-1-90 AP GE Reference Design")
	120	/* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */
65aa1b1e	121	.atag_offset = 0x100,
5cdbe5d2	122	.nr_irqs = ORION5X_NR_IRQS,
0b0740c3 LB	123	.init_machine = rd88f6183ap_ge_init,
0b0740c3 LB	124	.map_io = orion5x_map_io,
4ee1f6b5	125	.init_early = orion5x_init_early,
0b0740c3	126	.init_irq = orion5x_init_irq,
6bb27d73	127	.init_time = orion5x_timer_init,
0b0740c3	128	.fixup = tag_fixup_mem32,
764cbcc2	129	.restart = orion5x_restart,
0b0740c3	130	MACHINE_END