[deliverable/linux.git] / arch / arm / mach-orion5x / rd88f6183ap-ge-setup.c

/*
 * arch/arm/mach-orion5x/rd88f6183-ap-ge-setup.c
 *
 * Marvell Orion-1-90 AP GE Reference Design Setup
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/pci.h>
#include <linux/irq.h>
#include <linux/mtd/physmap.h>
#include <linux/mv643xx_eth.h>
#include <linux/spi/spi.h>
#include <linux/spi/orion_spi.h>
#include <linux/spi/flash.h>
#include <linux/ethtool.h>
#include <asm/mach-types.h>
#include <asm/gpio.h>
#include <asm/leds.h>
#include <asm/mach/arch.h>
#include <asm/mach/pci.h>
#include <mach/orion5x.h>
#include "common.h"
#include "mpp.h"

static struct mv643xx_eth_platform_data rd88f6183ap_ge_eth_data = {
	.phy_addr	= -1,
	.speed		= SPEED_1000,
	.duplex		= DUPLEX_FULL,
};

static struct mtd_partition rd88f6183ap_ge_partitions[] = {
	{
		.name	= "kernel",
		.offset	= 0x00000000,
		.size	= 0x00200000,
	}, {
		.name	= "rootfs",
		.offset	= 0x00200000,
		.size	= 0x00500000,
	}, {
		.name	= "nvram",
		.offset	= 0x00700000,
		.size	= 0x00080000,
	},
};

static struct flash_platform_data rd88f6183ap_ge_spi_slave_data = {
	.type		= "m25p64",
	.nr_parts	= ARRAY_SIZE(rd88f6183ap_ge_partitions),
	.parts		= rd88f6183ap_ge_partitions,
};

static struct spi_board_info __initdata rd88f6183ap_ge_spi_slave_info[] = {
	{
		.modalias	= "m25p80",
		.platform_data	= &rd88f6183ap_ge_spi_slave_data,
		.irq		= NO_IRQ,
		.max_speed_hz	= 20000000,
		.bus_num	= 0,
		.chip_select	= 0,
	},
};

static void __init rd88f6183ap_ge_init(void)
{
	/*
	 * Setup basic Orion functions. Need to be called early.
	 */
	orion5x_init();

	/*
	 * Configure peripherals.
	 */
	orion5x_ehci0_init();
	orion5x_eth_init(&rd88f6183ap_ge_eth_data);
	spi_register_board_info(rd88f6183ap_ge_spi_slave_info,
				ARRAY_SIZE(rd88f6183ap_ge_spi_slave_info));
	orion5x_spi_init();
	orion5x_uart0_init();
}

static struct hw_pci rd88f6183ap_ge_pci __initdata = {
	.nr_controllers	= 2,
	.swizzle	= pci_std_swizzle,
	.setup		= orion5x_pci_sys_setup,
	.scan		= orion5x_pci_sys_scan_bus,
	.map_irq	= orion5x_pci_map_irq,
};

static int __init rd88f6183ap_ge_pci_init(void)
{
	if (machine_is_rd88f6183ap_ge()) {
		orion5x_pci_disable();
		pci_common_init(&rd88f6183ap_ge_pci);
	}

	return 0;
}
subsys_initcall(rd88f6183ap_ge_pci_init);

MACHINE_START(RD88F6183AP_GE, "Marvell Orion-1-90 AP GE Reference Design")
	/* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */
	.phys_io	= ORION5X_REGS_PHYS_BASE,
	.io_pg_offst	= ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC,
	.boot_params	= 0x00000100,
	.init_machine	= rd88f6183ap_ge_init,
	.map_io		= orion5x_map_io,
	.init_irq	= orion5x_init_irq,
	.timer		= &orion5x_timer,
	.fixup		= tag_fixup_mem32,
MACHINE_END
Commit	Line	Data
0b0740c3 LB	1	/*
	2	* arch/arm/mach-orion5x/rd88f6183-ap-ge-setup.c
	3	*
	4	* Marvell Orion-1-90 AP GE Reference Design Setup
	5	*
	6	* This file is licensed under the terms of the GNU General Public
	7	* License version 2. This program is licensed "as is" without any
	8	* warranty of any kind, whether express or implied.
	9	*/
	10
	11	#include <linux/kernel.h>
	12	#include <linux/init.h>
	13	#include <linux/platform_device.h>
	14	#include <linux/pci.h>
	15	#include <linux/irq.h>
	16	#include <linux/mtd/physmap.h>
	17	#include <linux/mv643xx_eth.h>
	18	#include <linux/spi/spi.h>
	19	#include <linux/spi/orion_spi.h>
	20	#include <linux/spi/flash.h>
	21	#include <linux/ethtool.h>
	22	#include <asm/mach-types.h>
	23	#include <asm/gpio.h>
	24	#include <asm/leds.h>
	25	#include <asm/mach/arch.h>
	26	#include <asm/mach/pci.h>
	27	#include <mach/orion5x.h>
	28	#include "common.h"
	29	#include "mpp.h"
	30
	31	static struct mv643xx_eth_platform_data rd88f6183ap_ge_eth_data = {
	32	.phy_addr = -1,
	33	.speed = SPEED_1000,
	34	.duplex = DUPLEX_FULL,
	35	};
	36
	37	static struct mtd_partition rd88f6183ap_ge_partitions[] = {
	38	{
	39	.name = "kernel",
	40	.offset = 0x00000000,
	41	.size = 0x00200000,
	42	}, {
	43	.name = "rootfs",
	44	.offset = 0x00200000,
	45	.size = 0x00500000,
	46	}, {
	47	.name = "nvram",
	48	.offset = 0x00700000,
	49	.size = 0x00080000,
	50	},
	51	};
	52
	53	static struct flash_platform_data rd88f6183ap_ge_spi_slave_data = {
	54	.type = "m25p64",
	55	.nr_parts = ARRAY_SIZE(rd88f6183ap_ge_partitions),
	56	.parts = rd88f6183ap_ge_partitions,
	57	};
	58
	59	static struct spi_board_info __initdata rd88f6183ap_ge_spi_slave_info[] = {
	60	{
	61	.modalias = "m25p80",
	62	.platform_data = &rd88f6183ap_ge_spi_slave_data,
	63	.irq = NO_IRQ,
	64	.max_speed_hz = 20000000,
65	.bus_num = 0,
66	.chip_select = 0,
67	},
68	};
69
70	static void __init rd88f6183ap_ge_init(void)
71	{
72	/*
73	* Setup basic Orion functions. Need to be called early.
74	*/
75	orion5x_init();
76
77	/*
78	* Configure peripherals.
79	*/
80	orion5x_ehci0_init();
81	orion5x_eth_init(&rd88f6183ap_ge_eth_data);
82	spi_register_board_info(rd88f6183ap_ge_spi_slave_info,
83	ARRAY_SIZE(rd88f6183ap_ge_spi_slave_info));
84	orion5x_spi_init();
85	orion5x_uart0_init();
86	}
87
88	static struct hw_pci rd88f6183ap_ge_pci __initdata = {
89	.nr_controllers = 2,
90	.swizzle = pci_std_swizzle,
91	.setup = orion5x_pci_sys_setup,
92	.scan = orion5x_pci_sys_scan_bus,
93	.map_irq = orion5x_pci_map_irq,
94	};
95
96	static int __init rd88f6183ap_ge_pci_init(void)
97	{
98	if (machine_is_rd88f6183ap_ge()) {
99	orion5x_pci_disable();
100	pci_common_init(&rd88f6183ap_ge_pci);
101	}
102
103	return 0;
104	}
105	subsys_initcall(rd88f6183ap_ge_pci_init);
106
107	MACHINE_START(RD88F6183AP_GE, "Marvell Orion-1-90 AP GE Reference Design")
108	/* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */
109	.phys_io = ORION5X_REGS_PHYS_BASE,
110	.io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC,
111	.boot_params = 0x00000100,
112	.init_machine = rd88f6183ap_ge_init,
113	.map_io = orion5x_map_io,
114	.init_irq = orion5x_init_irq,
115	.timer = &orion5x_timer,
116	.fixup = tag_fixup_mem32,
117	MACHINE_END