[deliverable/linux.git] / arch / arm / mach-orion5x / wrt350n-v2-setup.c

/*
 * arch/arm/mach-orion5x/wrt350n-v2-setup.c
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/pci.h>
#include <linux/irq.h>
#include <linux/delay.h>
#include <linux/mtd/physmap.h>
#include <linux/mv643xx_eth.h>
#include <linux/ethtool.h>
#include <linux/leds.h>
#include <linux/gpio_keys.h>
#include <linux/input.h>
#include <net/dsa.h>
#include <asm/mach-types.h>
#include <asm/gpio.h>
#include <asm/mach/arch.h>
#include <asm/mach/pci.h>
#include <mach/orion5x.h>
#include "common.h"
#include "mpp.h"

/*
 * LEDs attached to GPIO
 */
static struct gpio_led wrt350n_v2_led_pins[] = {
	{
		.name		= "wrt350nv2:green:power",
		.gpio		= 0,
		.active_low	= 1,
	}, {
		.name		= "wrt350nv2:green:security",
		.gpio		= 1,
		.active_low	= 1,
	}, {
		.name		= "wrt350nv2:orange:power",
		.gpio		= 5,
		.active_low	= 1,
	}, {
		.name		= "wrt350nv2:green:usb",
		.gpio		= 6,
		.active_low	= 1,
	}, {
		.name		= "wrt350nv2:green:wireless",
		.gpio		= 7,
		.active_low	= 1,
	},
};

static struct gpio_led_platform_data wrt350n_v2_led_data = {
	.leds		= wrt350n_v2_led_pins,
	.num_leds	= ARRAY_SIZE(wrt350n_v2_led_pins),
};

static struct platform_device wrt350n_v2_leds = {
	.name	= "leds-gpio",
	.id	= -1,
	.dev	= {
		.platform_data	= &wrt350n_v2_led_data,
	},
};

/*
 * Buttons attached to GPIO
 */
static struct gpio_keys_button wrt350n_v2_buttons[] = {
	{
		.code		= KEY_RESTART,
		.gpio		= 3,
		.desc		= "Reset Button",
		.active_low	= 1,
	}, {
		.code		= KEY_WPS_BUTTON,
		.gpio		= 2,
		.desc		= "WPS Button",
		.active_low	= 1,
	},
};

static struct gpio_keys_platform_data wrt350n_v2_button_data = {
	.buttons	= wrt350n_v2_buttons,
	.nbuttons	= ARRAY_SIZE(wrt350n_v2_buttons),
};

static struct platform_device wrt350n_v2_button_device = {
	.name		= "gpio-keys",
	.id		= -1,
	.num_resources	= 0,
	.dev		= {
		.platform_data	= &wrt350n_v2_button_data,
	},
};

/*
 * General setup
 */
static unsigned int wrt350n_v2_mpp_modes[] __initdata = {
	MPP0_GPIO,		/* Power LED green (0=on) */
	MPP1_GPIO,		/* Security LED (0=on) */
	MPP2_GPIO,		/* Internal Button (0=on) */
	MPP3_GPIO,		/* Reset Button (0=on) */
	MPP4_GPIO,		/* PCI int */
	MPP5_GPIO,		/* Power LED orange (0=on) */
	MPP6_GPIO,		/* USB LED (0=on) */
	MPP7_GPIO,		/* Wireless LED (0=on) */
	MPP8_UNUSED,		/* ??? */
	MPP9_GIGE,		/* GE_RXERR */
	MPP10_UNUSED,		/* ??? */
	MPP11_UNUSED,		/* ??? */
	MPP12_GIGE,		/* GE_TXD[4] */
	MPP13_GIGE,		/* GE_TXD[5] */
	MPP14_GIGE,		/* GE_TXD[6] */
	MPP15_GIGE,		/* GE_TXD[7] */
	MPP16_GIGE,		/* GE_RXD[4] */
	MPP17_GIGE,		/* GE_RXD[5] */
	MPP18_GIGE,		/* GE_RXD[6] */
	MPP19_GIGE,		/* GE_RXD[7] */
	0,
};

/*
 * 8M NOR flash Device bus boot chip select
 */
#define WRT350N_V2_NOR_BOOT_BASE	0xf4000000
#define WRT350N_V2_NOR_BOOT_SIZE	SZ_8M

static struct mtd_partition wrt350n_v2_nor_flash_partitions[] = {
	{
		.name		= "kernel",
		.offset		= 0x00000000,
		.size		= 0x00760000,
	}, {
		.name		= "rootfs",
		.offset		= 0x001a0000,
		.size		= 0x005c0000,
	}, {
		.name		= "lang",
		.offset		= 0x00760000,
		.size		= 0x00040000,
	}, {
		.name		= "nvram",
		.offset		= 0x007a0000,
		.size		= 0x00020000,
	}, {
		.name		= "u-boot",
		.offset		= 0x007c0000,
		.size		= 0x00040000,
	},
};

static struct physmap_flash_data wrt350n_v2_nor_flash_data = {
	.width		= 1,
	.parts		= wrt350n_v2_nor_flash_partitions,
	.nr_parts	= ARRAY_SIZE(wrt350n_v2_nor_flash_partitions),
};

static struct resource wrt350n_v2_nor_flash_resource = {
	.flags		= IORESOURCE_MEM,
	.start		= WRT350N_V2_NOR_BOOT_BASE,
	.end		= WRT350N_V2_NOR_BOOT_BASE + WRT350N_V2_NOR_BOOT_SIZE - 1,
};

static struct platform_device wrt350n_v2_nor_flash = {
	.name			= "physmap-flash",
	.id			= 0,
	.dev		= {
		.platform_data	= &wrt350n_v2_nor_flash_data,
	},
	.num_resources		= 1,
	.resource		= &wrt350n_v2_nor_flash_resource,
};

static struct mv643xx_eth_platform_data wrt350n_v2_eth_data = {
	.phy_addr	= MV643XX_ETH_PHY_NONE,
	.speed		= SPEED_1000,
	.duplex		= DUPLEX_FULL,
};

static struct dsa_chip_data wrt350n_v2_switch_chip_data = {
	.port_names[0]	= "lan2",
	.port_names[1]	= "lan1",
	.port_names[2]	= "wan",
	.port_names[3]	= "cpu",
	.port_names[5]	= "lan3",
	.port_names[7]	= "lan4",
};

static struct dsa_platform_data wrt350n_v2_switch_plat_data = {
	.nr_chips	= 1,
	.chip		= &wrt350n_v2_switch_chip_data,
};

static void __init wrt350n_v2_init(void)
{
	/*
	 * Setup basic Orion functions. Need to be called early.
	 */
	orion5x_init();

	orion5x_mpp_conf(wrt350n_v2_mpp_modes);

	/*
	 * Configure peripherals.
	 */
	orion5x_ehci0_init();
	orion5x_eth_init(&wrt350n_v2_eth_data);
	orion5x_eth_switch_init(&wrt350n_v2_switch_plat_data, NO_IRQ);
	orion5x_uart0_init();

	orion5x_setup_dev_boot_win(WRT350N_V2_NOR_BOOT_BASE,
				   WRT350N_V2_NOR_BOOT_SIZE);
	platform_device_register(&wrt350n_v2_nor_flash);
	platform_device_register(&wrt350n_v2_leds);
	platform_device_register(&wrt350n_v2_button_device);
}

static int __init wrt350n_v2_pci_map_irq(const struct pci_dev *dev, u8 slot,
	u8 pin)
{
	int irq;

	/*
	 * Check for devices with hard-wired IRQs.
	 */
	irq = orion5x_pci_map_irq(dev, slot, pin);
	if (irq != -1)
		return irq;

	/*
	 * Mini-PCI slot.
	 */
	if (slot == 7)
		return gpio_to_irq(4);

	return -1;
}

static struct hw_pci wrt350n_v2_pci __initdata = {
	.nr_controllers	= 2,
	.swizzle	= pci_std_swizzle,
	.setup		= orion5x_pci_sys_setup,
	.scan		= orion5x_pci_sys_scan_bus,
	.map_irq	= wrt350n_v2_pci_map_irq,
};

static int __init wrt350n_v2_pci_init(void)
{
	if (machine_is_wrt350n_v2())
		pci_common_init(&wrt350n_v2_pci);

	return 0;
}
subsys_initcall(wrt350n_v2_pci_init);

MACHINE_START(WRT350N_V2, "Linksys WRT350N v2")
	/* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */
	.atag_offset	= 0x100,
	.init_machine	= wrt350n_v2_init,
	.map_io		= orion5x_map_io,
	.init_early	= orion5x_init_early,
	.init_irq	= orion5x_init_irq,
	.timer		= &orion5x_timer,
	.fixup		= tag_fixup_mem32,
MACHINE_END
Commit	Line	Data
42452b77 LB	1	/*
	2	* arch/arm/mach-orion5x/wrt350n-v2-setup.c
	3	*
	4	* This file is licensed under the terms of the GNU General Public
	5	* License version 2. This program is licensed "as is" without any
	6	* warranty of any kind, whether express or implied.
	7	*/
	8
	9	#include <linux/kernel.h>
	10	#include <linux/init.h>
	11	#include <linux/platform_device.h>
	12	#include <linux/pci.h>
	13	#include <linux/irq.h>
	14	#include <linux/delay.h>
	15	#include <linux/mtd/physmap.h>
	16	#include <linux/mv643xx_eth.h>
81600eea	17	#include <linux/ethtool.h>
e9cfa167 DT	18	#include <linux/leds.h>
	19	#include <linux/gpio_keys.h>
	20	#include <linux/input.h>
dcf1cece	21	#include <net/dsa.h>
42452b77 LB	22	#include <asm/mach-types.h>
	23	#include <asm/gpio.h>
	24	#include <asm/mach/arch.h>
	25	#include <asm/mach/pci.h>
a09e64fb	26	#include <mach/orion5x.h>
42452b77 LB	27	#include "common.h"
	28	#include "mpp.h"
	29
e9cfa167 DT	30	/*
	31	* LEDs attached to GPIO
	32	*/
	33	static struct gpio_led wrt350n_v2_led_pins[] = {
	34	{
	35	.name = "wrt350nv2:green:power",
	36	.gpio = 0,
	37	.active_low = 1,
	38	}, {
	39	.name = "wrt350nv2:green:security",
	40	.gpio = 1,
	41	.active_low = 1,
	42	}, {
	43	.name = "wrt350nv2:orange:power",
	44	.gpio = 5,
	45	.active_low = 1,
	46	}, {
	47	.name = "wrt350nv2:green:usb",
	48	.gpio = 6,
	49	.active_low = 1,
	50	}, {
	51	.name = "wrt350nv2:green:wireless",
	52	.gpio = 7,
	53	.active_low = 1,
	54	},
	55	};
	56
	57	static struct gpio_led_platform_data wrt350n_v2_led_data = {
	58	.leds = wrt350n_v2_led_pins,
	59	.num_leds = ARRAY_SIZE(wrt350n_v2_led_pins),
	60	};
	61
	62	static struct platform_device wrt350n_v2_leds = {
	63	.name = "leds-gpio",
	64	.id = -1,
	65	.dev = {
	66	.platform_data = &wrt350n_v2_led_data,
	67	},
	68	};
	69
	70	/*
	71	* Buttons attached to GPIO
	72	*/
	73	static struct gpio_keys_button wrt350n_v2_buttons[] = {
	74	{
	75	.code = KEY_RESTART,
	76	.gpio = 3,
	77	.desc = "Reset Button",
	78	.active_low = 1,
	79	}, {
bb456928	80	.code = KEY_WPS_BUTTON,
e9cfa167 DT	81	.gpio = 2,
	82	.desc = "WPS Button",
	83	.active_low = 1,
	84	},
	85	};
	86
	87	static struct gpio_keys_platform_data wrt350n_v2_button_data = {
	88	.buttons = wrt350n_v2_buttons,
	89	.nbuttons = ARRAY_SIZE(wrt350n_v2_buttons),
	90	};
	91
	92	static struct platform_device wrt350n_v2_button_device = {
	93	.name = "gpio-keys",
	94	.id = -1,
	95	.num_resources = 0,
	96	.dev = {
	97	.platform_data = &wrt350n_v2_button_data,
	98	},
	99	};
	100
	101	/*
	102	* General setup
	103	*/
554cdaef AL	104	static unsigned int wrt350n_v2_mpp_modes[] __initdata = {
	105	MPP0_GPIO, /* Power LED green (0=on) */
	106	MPP1_GPIO, /* Security LED (0=on) */
	107	MPP2_GPIO, /* Internal Button (0=on) */
	108	MPP3_GPIO, /* Reset Button (0=on) */
	109	MPP4_GPIO, /* PCI int */
	110	MPP5_GPIO, /* Power LED orange (0=on) */
	111	MPP6_GPIO, /* USB LED (0=on) */
	112	MPP7_GPIO, /* Wireless LED (0=on) */
	113	MPP8_UNUSED, /* ??? */
	114	MPP9_GIGE, /* GE_RXERR */
	115	MPP10_UNUSED, /* ??? */
	116	MPP11_UNUSED, /* ??? */
	117	MPP12_GIGE, /* GE_TXD[4] */
	118	MPP13_GIGE, /* GE_TXD[5] */
	119	MPP14_GIGE, /* GE_TXD[6] */
	120	MPP15_GIGE, /* GE_TXD[7] */
	121	MPP16_GIGE, /* GE_RXD[4] */
	122	MPP17_GIGE, /* GE_RXD[5] */
	123	MPP18_GIGE, /* GE_RXD[6] */
	124	MPP19_GIGE, /* GE_RXD[7] */
	125	0,
42452b77 LB	126	};
	127
	128	/*
	129	* 8M NOR flash Device bus boot chip select
	130	*/
	131	#define WRT350N_V2_NOR_BOOT_BASE 0xf4000000
	132	#define WRT350N_V2_NOR_BOOT_SIZE SZ_8M
	133
	134	static struct mtd_partition wrt350n_v2_nor_flash_partitions[] = {
	135	{
	136	.name = "kernel",
	137	.offset = 0x00000000,
	138	.size = 0x00760000,
	139	}, {
	140	.name = "rootfs",
	141	.offset = 0x001a0000,
	142	.size = 0x005c0000,
	143	}, {
	144	.name = "lang",
	145	.offset = 0x00760000,
	146	.size = 0x00040000,
	147	}, {
	148	.name = "nvram",
	149	.offset = 0x007a0000,
	150	.size = 0x00020000,
	151	}, {
	152	.name = "u-boot",
	153	.offset = 0x007c0000,
	154	.size = 0x00040000,
	155	},
	156	};
	157
	158	static struct physmap_flash_data wrt350n_v2_nor_flash_data = {
	159	.width = 1,
	160	.parts = wrt350n_v2_nor_flash_partitions,
	161	.nr_parts = ARRAY_SIZE(wrt350n_v2_nor_flash_partitions),
	162	};
	163
	164	static struct resource wrt350n_v2_nor_flash_resource = {
	165	.flags = IORESOURCE_MEM,
	166	.start = WRT350N_V2_NOR_BOOT_BASE,
	167	.end = WRT350N_V2_NOR_BOOT_BASE + WRT350N_V2_NOR_BOOT_SIZE - 1,
	168	};
	169
	170	static struct platform_device wrt350n_v2_nor_flash = {
	171	.name = "physmap-flash",
	172	.id = 0,
	173	.dev = {
	174	.platform_data = &wrt350n_v2_nor_flash_data,
	175	},
	176	.num_resources = 1,
	177	.resource = &wrt350n_v2_nor_flash_resource,
	178	};
	179
	180	static struct mv643xx_eth_platform_data wrt350n_v2_eth_data = {
ac840605	181	.phy_addr = MV643XX_ETH_PHY_NONE,
81600eea LB	182	.speed = SPEED_1000,
81600eea LB	183	.duplex = DUPLEX_FULL,
42452b77 LB	184	};
42452b77 LB	185
e84665c9	186	static struct dsa_chip_data wrt350n_v2_switch_chip_data = {
dcf1cece LB	187	.port_names[0] = "lan2",
	188	.port_names[1] = "lan1",
	189	.port_names[2] = "wan",
	190	.port_names[3] = "cpu",
	191	.port_names[5] = "lan3",
	192	.port_names[7] = "lan4",
	193	};
	194
e84665c9 LB	195	static struct dsa_platform_data wrt350n_v2_switch_plat_data = {
	196	.nr_chips = 1,
	197	.chip = &wrt350n_v2_switch_chip_data,
	198	};
	199
42452b77 LB	200	static void __init wrt350n_v2_init(void)
	201	{
	202	/*
	203	* Setup basic Orion functions. Need to be called early.
	204	*/
	205	orion5x_init();
	206
	207	orion5x_mpp_conf(wrt350n_v2_mpp_modes);
	208
	209	/*
	210	* Configure peripherals.
	211	*/
	212	orion5x_ehci0_init();
	213	orion5x_eth_init(&wrt350n_v2_eth_data);
e84665c9	214	orion5x_eth_switch_init(&wrt350n_v2_switch_plat_data, NO_IRQ);
42452b77 LB	215	orion5x_uart0_init();
	216
	217	orion5x_setup_dev_boot_win(WRT350N_V2_NOR_BOOT_BASE,
	218	WRT350N_V2_NOR_BOOT_SIZE);
	219	platform_device_register(&wrt350n_v2_nor_flash);
e9cfa167 DT	220	platform_device_register(&wrt350n_v2_leds);
e9cfa167 DT	221	platform_device_register(&wrt350n_v2_button_device);
42452b77 LB	222	}
42452b77 LB	223
d5341942 RB	224	static int __init wrt350n_v2_pci_map_irq(const struct pci_dev *dev, u8 slot,
d5341942 RB	225	u8 pin)
42452b77 LB	226	{
	227	int irq;
	228
	229	/*
	230	* Check for devices with hard-wired IRQs.
	231	*/
	232	irq = orion5x_pci_map_irq(dev, slot, pin);
	233	if (irq != -1)
	234	return irq;
	235
	236	/*
	237	* Mini-PCI slot.
	238	*/
	239	if (slot == 7)
	240	return gpio_to_irq(4);
	241
	242	return -1;
	243	}
	244
	245	static struct hw_pci wrt350n_v2_pci __initdata = {
	246	.nr_controllers = 2,
	247	.swizzle = pci_std_swizzle,
	248	.setup = orion5x_pci_sys_setup,
	249	.scan = orion5x_pci_sys_scan_bus,
	250	.map_irq = wrt350n_v2_pci_map_irq,
	251	};
	252
	253	static int __init wrt350n_v2_pci_init(void)
	254	{
	255	if (machine_is_wrt350n_v2())
	256	pci_common_init(&wrt350n_v2_pci);
	257
	258	return 0;
	259	}
	260	subsys_initcall(wrt350n_v2_pci_init);
	261
	262	MACHINE_START(WRT350N_V2, "Linksys WRT350N v2")
	263	/* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */
65aa1b1e	264	.atag_offset = 0x100,
42452b77 LB	265	.init_machine = wrt350n_v2_init,
42452b77 LB	266	.map_io = orion5x_map_io,
4ee1f6b5	267	.init_early = orion5x_init_early,
42452b77 LB	268	.init_irq = orion5x_init_irq,
	269	.timer = &orion5x_timer,
	270	.fixup = tag_fixup_mem32,
	271	MACHINE_END