Commit | Line | Data |
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42452b77 LB |
1 | /* |
2 | * arch/arm/mach-orion5x/wrt350n-v2-setup.c | |
3 | * | |
4 | * This file is licensed under the terms of the GNU General Public | |
5 | * License version 2. This program is licensed "as is" without any | |
6 | * warranty of any kind, whether express or implied. | |
7 | */ | |
2f8163ba | 8 | #include <linux/gpio.h> |
42452b77 LB |
9 | #include <linux/kernel.h> |
10 | #include <linux/init.h> | |
11 | #include <linux/platform_device.h> | |
12 | #include <linux/pci.h> | |
13 | #include <linux/irq.h> | |
14 | #include <linux/delay.h> | |
15 | #include <linux/mtd/physmap.h> | |
16 | #include <linux/mv643xx_eth.h> | |
81600eea | 17 | #include <linux/ethtool.h> |
e9cfa167 DT |
18 | #include <linux/leds.h> |
19 | #include <linux/gpio_keys.h> | |
20 | #include <linux/input.h> | |
dcf1cece | 21 | #include <net/dsa.h> |
42452b77 | 22 | #include <asm/mach-types.h> |
42452b77 LB |
23 | #include <asm/mach/arch.h> |
24 | #include <asm/mach/pci.h> | |
a09e64fb | 25 | #include <mach/orion5x.h> |
42452b77 LB |
26 | #include "common.h" |
27 | #include "mpp.h" | |
28 | ||
e9cfa167 DT |
29 | /* |
30 | * LEDs attached to GPIO | |
31 | */ | |
32 | static struct gpio_led wrt350n_v2_led_pins[] = { | |
33 | { | |
34 | .name = "wrt350nv2:green:power", | |
35 | .gpio = 0, | |
36 | .active_low = 1, | |
37 | }, { | |
38 | .name = "wrt350nv2:green:security", | |
39 | .gpio = 1, | |
40 | .active_low = 1, | |
41 | }, { | |
42 | .name = "wrt350nv2:orange:power", | |
43 | .gpio = 5, | |
44 | .active_low = 1, | |
45 | }, { | |
46 | .name = "wrt350nv2:green:usb", | |
47 | .gpio = 6, | |
48 | .active_low = 1, | |
49 | }, { | |
50 | .name = "wrt350nv2:green:wireless", | |
51 | .gpio = 7, | |
52 | .active_low = 1, | |
53 | }, | |
54 | }; | |
55 | ||
56 | static struct gpio_led_platform_data wrt350n_v2_led_data = { | |
57 | .leds = wrt350n_v2_led_pins, | |
58 | .num_leds = ARRAY_SIZE(wrt350n_v2_led_pins), | |
59 | }; | |
60 | ||
61 | static struct platform_device wrt350n_v2_leds = { | |
62 | .name = "leds-gpio", | |
63 | .id = -1, | |
64 | .dev = { | |
65 | .platform_data = &wrt350n_v2_led_data, | |
66 | }, | |
67 | }; | |
68 | ||
69 | /* | |
70 | * Buttons attached to GPIO | |
71 | */ | |
72 | static struct gpio_keys_button wrt350n_v2_buttons[] = { | |
73 | { | |
74 | .code = KEY_RESTART, | |
75 | .gpio = 3, | |
76 | .desc = "Reset Button", | |
77 | .active_low = 1, | |
78 | }, { | |
bb456928 | 79 | .code = KEY_WPS_BUTTON, |
e9cfa167 DT |
80 | .gpio = 2, |
81 | .desc = "WPS Button", | |
82 | .active_low = 1, | |
83 | }, | |
84 | }; | |
85 | ||
86 | static struct gpio_keys_platform_data wrt350n_v2_button_data = { | |
87 | .buttons = wrt350n_v2_buttons, | |
88 | .nbuttons = ARRAY_SIZE(wrt350n_v2_buttons), | |
89 | }; | |
90 | ||
91 | static struct platform_device wrt350n_v2_button_device = { | |
92 | .name = "gpio-keys", | |
93 | .id = -1, | |
94 | .num_resources = 0, | |
95 | .dev = { | |
96 | .platform_data = &wrt350n_v2_button_data, | |
97 | }, | |
98 | }; | |
99 | ||
100 | /* | |
101 | * General setup | |
102 | */ | |
554cdaef AL |
103 | static unsigned int wrt350n_v2_mpp_modes[] __initdata = { |
104 | MPP0_GPIO, /* Power LED green (0=on) */ | |
105 | MPP1_GPIO, /* Security LED (0=on) */ | |
106 | MPP2_GPIO, /* Internal Button (0=on) */ | |
107 | MPP3_GPIO, /* Reset Button (0=on) */ | |
108 | MPP4_GPIO, /* PCI int */ | |
109 | MPP5_GPIO, /* Power LED orange (0=on) */ | |
110 | MPP6_GPIO, /* USB LED (0=on) */ | |
111 | MPP7_GPIO, /* Wireless LED (0=on) */ | |
112 | MPP8_UNUSED, /* ??? */ | |
113 | MPP9_GIGE, /* GE_RXERR */ | |
114 | MPP10_UNUSED, /* ??? */ | |
115 | MPP11_UNUSED, /* ??? */ | |
116 | MPP12_GIGE, /* GE_TXD[4] */ | |
117 | MPP13_GIGE, /* GE_TXD[5] */ | |
118 | MPP14_GIGE, /* GE_TXD[6] */ | |
119 | MPP15_GIGE, /* GE_TXD[7] */ | |
120 | MPP16_GIGE, /* GE_RXD[4] */ | |
121 | MPP17_GIGE, /* GE_RXD[5] */ | |
122 | MPP18_GIGE, /* GE_RXD[6] */ | |
123 | MPP19_GIGE, /* GE_RXD[7] */ | |
124 | 0, | |
42452b77 LB |
125 | }; |
126 | ||
127 | /* | |
128 | * 8M NOR flash Device bus boot chip select | |
129 | */ | |
130 | #define WRT350N_V2_NOR_BOOT_BASE 0xf4000000 | |
131 | #define WRT350N_V2_NOR_BOOT_SIZE SZ_8M | |
132 | ||
133 | static struct mtd_partition wrt350n_v2_nor_flash_partitions[] = { | |
134 | { | |
135 | .name = "kernel", | |
136 | .offset = 0x00000000, | |
137 | .size = 0x00760000, | |
138 | }, { | |
139 | .name = "rootfs", | |
140 | .offset = 0x001a0000, | |
141 | .size = 0x005c0000, | |
142 | }, { | |
143 | .name = "lang", | |
144 | .offset = 0x00760000, | |
145 | .size = 0x00040000, | |
146 | }, { | |
147 | .name = "nvram", | |
148 | .offset = 0x007a0000, | |
149 | .size = 0x00020000, | |
150 | }, { | |
151 | .name = "u-boot", | |
152 | .offset = 0x007c0000, | |
153 | .size = 0x00040000, | |
154 | }, | |
155 | }; | |
156 | ||
157 | static struct physmap_flash_data wrt350n_v2_nor_flash_data = { | |
158 | .width = 1, | |
159 | .parts = wrt350n_v2_nor_flash_partitions, | |
160 | .nr_parts = ARRAY_SIZE(wrt350n_v2_nor_flash_partitions), | |
161 | }; | |
162 | ||
163 | static struct resource wrt350n_v2_nor_flash_resource = { | |
164 | .flags = IORESOURCE_MEM, | |
165 | .start = WRT350N_V2_NOR_BOOT_BASE, | |
166 | .end = WRT350N_V2_NOR_BOOT_BASE + WRT350N_V2_NOR_BOOT_SIZE - 1, | |
167 | }; | |
168 | ||
169 | static struct platform_device wrt350n_v2_nor_flash = { | |
170 | .name = "physmap-flash", | |
171 | .id = 0, | |
172 | .dev = { | |
173 | .platform_data = &wrt350n_v2_nor_flash_data, | |
174 | }, | |
175 | .num_resources = 1, | |
176 | .resource = &wrt350n_v2_nor_flash_resource, | |
177 | }; | |
178 | ||
179 | static struct mv643xx_eth_platform_data wrt350n_v2_eth_data = { | |
ac840605 | 180 | .phy_addr = MV643XX_ETH_PHY_NONE, |
81600eea LB |
181 | .speed = SPEED_1000, |
182 | .duplex = DUPLEX_FULL, | |
42452b77 LB |
183 | }; |
184 | ||
e84665c9 | 185 | static struct dsa_chip_data wrt350n_v2_switch_chip_data = { |
dcf1cece LB |
186 | .port_names[0] = "lan2", |
187 | .port_names[1] = "lan1", | |
188 | .port_names[2] = "wan", | |
189 | .port_names[3] = "cpu", | |
190 | .port_names[5] = "lan3", | |
191 | .port_names[7] = "lan4", | |
192 | }; | |
193 | ||
e84665c9 LB |
194 | static struct dsa_platform_data wrt350n_v2_switch_plat_data = { |
195 | .nr_chips = 1, | |
196 | .chip = &wrt350n_v2_switch_chip_data, | |
197 | }; | |
198 | ||
42452b77 LB |
199 | static void __init wrt350n_v2_init(void) |
200 | { | |
201 | /* | |
202 | * Setup basic Orion functions. Need to be called early. | |
203 | */ | |
204 | orion5x_init(); | |
205 | ||
206 | orion5x_mpp_conf(wrt350n_v2_mpp_modes); | |
207 | ||
208 | /* | |
209 | * Configure peripherals. | |
210 | */ | |
211 | orion5x_ehci0_init(); | |
212 | orion5x_eth_init(&wrt350n_v2_eth_data); | |
e84665c9 | 213 | orion5x_eth_switch_init(&wrt350n_v2_switch_plat_data, NO_IRQ); |
42452b77 LB |
214 | orion5x_uart0_init(); |
215 | ||
4ca2c040 TP |
216 | mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET, |
217 | ORION_MBUS_DEVBUS_BOOT_ATTR, | |
218 | WRT350N_V2_NOR_BOOT_BASE, | |
219 | WRT350N_V2_NOR_BOOT_SIZE); | |
42452b77 | 220 | platform_device_register(&wrt350n_v2_nor_flash); |
e9cfa167 DT |
221 | platform_device_register(&wrt350n_v2_leds); |
222 | platform_device_register(&wrt350n_v2_button_device); | |
42452b77 LB |
223 | } |
224 | ||
d5341942 RB |
225 | static int __init wrt350n_v2_pci_map_irq(const struct pci_dev *dev, u8 slot, |
226 | u8 pin) | |
42452b77 LB |
227 | { |
228 | int irq; | |
229 | ||
230 | /* | |
231 | * Check for devices with hard-wired IRQs. | |
232 | */ | |
233 | irq = orion5x_pci_map_irq(dev, slot, pin); | |
234 | if (irq != -1) | |
235 | return irq; | |
236 | ||
237 | /* | |
238 | * Mini-PCI slot. | |
239 | */ | |
240 | if (slot == 7) | |
241 | return gpio_to_irq(4); | |
242 | ||
243 | return -1; | |
244 | } | |
245 | ||
246 | static struct hw_pci wrt350n_v2_pci __initdata = { | |
247 | .nr_controllers = 2, | |
42452b77 LB |
248 | .setup = orion5x_pci_sys_setup, |
249 | .scan = orion5x_pci_sys_scan_bus, | |
250 | .map_irq = wrt350n_v2_pci_map_irq, | |
251 | }; | |
252 | ||
253 | static int __init wrt350n_v2_pci_init(void) | |
254 | { | |
255 | if (machine_is_wrt350n_v2()) | |
256 | pci_common_init(&wrt350n_v2_pci); | |
257 | ||
258 | return 0; | |
259 | } | |
260 | subsys_initcall(wrt350n_v2_pci_init); | |
261 | ||
262 | MACHINE_START(WRT350N_V2, "Linksys WRT350N v2") | |
263 | /* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */ | |
65aa1b1e | 264 | .atag_offset = 0x100, |
42452b77 LB |
265 | .init_machine = wrt350n_v2_init, |
266 | .map_io = orion5x_map_io, | |
4ee1f6b5 | 267 | .init_early = orion5x_init_early, |
42452b77 | 268 | .init_irq = orion5x_init_irq, |
6bb27d73 | 269 | .init_time = orion5x_timer_init, |
42452b77 | 270 | .fixup = tag_fixup_mem32, |
764cbcc2 | 271 | .restart = orion5x_restart, |
42452b77 | 272 | MACHINE_END |