ARM: gpio: convert includes of mach/gpio.h and asm/gpio.h to linux/gpio.h
[deliverable/linux.git] / arch / arm / mach-pnx4008 / serial.c
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1/*
2 * linux/arch/arm/mach-pnx4008/serial.c
3 *
4 * PNX4008 UART initialization
5 *
6 * Copyright: MontaVista Software Inc. (c) 2005
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
2f8163ba 12#include <linux/gpio.h>
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13#include <linux/kernel.h>
14#include <linux/types.h>
fced80c7 15#include <linux/io.h>
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17#include <mach/platform.h>
18#include <mach/hardware.h>
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19
20#include <linux/serial_core.h>
21#include <linux/serial_reg.h>
78818e47 22
a09e64fb 23#include <mach/clock.h>
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24
25#define UART_3 0
26#define UART_4 1
27#define UART_5 2
28#define UART_6 3
29#define UART_UNKNOWN (-1)
30
31#define UART3_BASE_VA IO_ADDRESS(PNX4008_UART3_BASE)
32#define UART4_BASE_VA IO_ADDRESS(PNX4008_UART4_BASE)
33#define UART5_BASE_VA IO_ADDRESS(PNX4008_UART5_BASE)
34#define UART6_BASE_VA IO_ADDRESS(PNX4008_UART6_BASE)
35
36#define UART_FCR_OFFSET 8
37#define UART_FIFO_SIZE 64
38
39void pnx4008_uart_init(void)
40{
41 u32 tmp;
42 int i = UART_FIFO_SIZE;
43
44 __raw_writel(0xC1, UART5_BASE_VA + UART_FCR_OFFSET);
45 __raw_writel(0xC1, UART3_BASE_VA + UART_FCR_OFFSET);
46
47 /* Send a NULL to fix the UART HW bug */
48 __raw_writel(0x00, UART5_BASE_VA);
49 __raw_writel(0x00, UART3_BASE_VA);
50
51 while (i--) {
52 tmp = __raw_readl(UART5_BASE_VA);
53 tmp = __raw_readl(UART3_BASE_VA);
54 }
55 __raw_writel(0, UART5_BASE_VA + UART_FCR_OFFSET);
56 __raw_writel(0, UART3_BASE_VA + UART_FCR_OFFSET);
57
58 /* setup wakeup interrupt */
59 start_int_set_rising_edge(SE_U3_RX_INT);
60 start_int_ack(SE_U3_RX_INT);
61 start_int_umask(SE_U3_RX_INT);
62
63 start_int_set_rising_edge(SE_U5_RX_INT);
64 start_int_ack(SE_U5_RX_INT);
65 start_int_umask(SE_U5_RX_INT);
66}
67
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