[deliverable/linux.git] / arch / arm / mach-prima2 / headsmp.S

/*
 * Entry of the second core for CSR Marco dual-core SMP SoCs
 *
 * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
 *
 * Licensed under GPLv2 or later.
 */

#include <linux/linkage.h>
#include <linux/init.h>

/*
 * SIRFSOC specific entry point for secondary CPUs.  This provides
 * a "holding pen" into which all secondary cores are held until we're
 * ready for them to initialise.
 */
ENTRY(sirfsoc_secondary_startup)
        mrc     p15, 0, r0, c0, c0, 5
        and     r0, r0, #15
        adr     r4, 1f
        ldmia   r4, {r5, r6}
        sub     r4, r4, r5
        add     r6, r6, r4
pen:    ldr     r7, [r6]
        cmp     r7, r0
        bne     pen

        /*
         * we've been released from the holding pen: secondary_stack
         * should now contain the SVC stack for this core
         */
        b       secondary_startup
ENDPROC(sirfsoc_secondary_startup)

        .align
1:      .long   .
        .long   pen_release
Commit	Line	Data
4898de3d BS	1	/*
	2	* Entry of the second core for CSR Marco dual-core SMP SoCs
	3	*
	4	* Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
	5	*
	6	* Licensed under GPLv2 or later.
	7	*/
	8
	9	#include <linux/linkage.h>
	10	#include <linux/init.h>
	11
4898de3d BS	12	/*
	13	* SIRFSOC specific entry point for secondary CPUs. This provides
	14	* a "holding pen" into which all secondary cores are held until we're
	15	* ready for them to initialise.
	16	*/
	17	ENTRY(sirfsoc_secondary_startup)
4898de3d BS	18	mrc p15, 0, r0, c0, c0, 5
	19	and r0, r0, #15
	20	adr r4, 1f
	21	ldmia r4, {r5, r6}
	22	sub r4, r4, r5
	23	add r6, r6, r4
	24	pen: ldr r7, [r6]
	25	cmp r7, r0
	26	bne pen
	27
	28	/*
	29	* we've been released from the holding pen: secondary_stack
	30	* should now contain the SVC stack for this core
	31	*/
	32	b secondary_startup
	33	ENDPROC(sirfsoc_secondary_startup)
	34
	35	.align
	36	1: .long .
	37	.long pen_release