Commit | Line | Data |
---|---|---|
6d803ba7 | 1 | #include <linux/clkdev.h> |
2eaa03b5 | 2 | #include <linux/syscore_ops.h> |
a6dba20c RK |
3 | |
4 | struct clkops { | |
5 | void (*enable)(struct clk *); | |
6 | void (*disable)(struct clk *); | |
7 | unsigned long (*getrate)(struct clk *); | |
52585ccd | 8 | int (*setrate)(struct clk *, unsigned long); |
a6dba20c RK |
9 | }; |
10 | ||
11 | struct clk { | |
a6dba20c RK |
12 | const struct clkops *ops; |
13 | unsigned long rate; | |
14 | unsigned int cken; | |
15 | unsigned int delay; | |
16 | unsigned int enabled; | |
17 | }; | |
18 | ||
4029813c EM |
19 | void clk_dummy_enable(struct clk *); |
20 | void clk_dummy_disable(struct clk *); | |
21 | ||
22 | extern const struct clkops clk_dummy_ops; | |
23 | extern struct clk clk_dummy; | |
24 | ||
8c3abc7d | 25 | #define INIT_CLKREG(_clk,_devname,_conname) \ |
a6dba20c | 26 | { \ |
8c3abc7d RK |
27 | .clk = _clk, \ |
28 | .dev_id = _devname, \ | |
29 | .con_id = _conname, \ | |
30 | } | |
31 | ||
8c3abc7d RK |
32 | #define DEFINE_CK(_name, _cken, _ops) \ |
33 | struct clk clk_##_name = { \ | |
a6dba20c RK |
34 | .ops = _ops, \ |
35 | .cken = CKEN_##_cken, \ | |
36 | } | |
37 | ||
8c3abc7d RK |
38 | #define DEFINE_CLK(_name, _ops, _rate, _delay) \ |
39 | struct clk clk_##_name = { \ | |
40 | .ops = _ops, \ | |
41 | .rate = _rate, \ | |
ed847782 IM |
42 | .delay = _delay, \ |
43 | } | |
44 | ||
4029813c | 45 | #define DEFINE_PXA2_CKEN(_name, _cken, _rate, _delay) \ |
8c3abc7d | 46 | struct clk clk_##_name = { \ |
4029813c | 47 | .ops = &clk_pxa2xx_cken_ops, \ |
7a2c5cb0 | 48 | .rate = _rate, \ |
49 | .cken = CKEN_##_cken, \ | |
50 | .delay = _delay, \ | |
51 | } | |
52 | ||
4029813c | 53 | extern const struct clkops clk_pxa2xx_cken_ops; |
a6dba20c | 54 | |
4029813c EM |
55 | void clk_pxa2xx_cken_enable(struct clk *clk); |
56 | void clk_pxa2xx_cken_disable(struct clk *clk); | |
a6dba20c | 57 | |
2eaa03b5 | 58 | extern struct syscore_ops pxa2xx_clock_syscore_ops; |
f113fe4e | 59 | |
a4553358 | 60 | #if defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x) |
8c3abc7d | 61 | #define DEFINE_PXA3_CKEN(_name, _cken, _rate, _delay) \ |
8c3abc7d | 62 | struct clk clk_##_name = { \ |
7a2c5cb0 | 63 | .ops = &clk_pxa3xx_cken_ops, \ |
64 | .rate = _rate, \ | |
7a2c5cb0 | 65 | .cken = CKEN_##_cken, \ |
7a2c5cb0 | 66 | .delay = _delay, \ |
7a2c5cb0 | 67 | } |
68 | ||
69 | extern const struct clkops clk_pxa3xx_cken_ops; | |
4029813c EM |
70 | extern const struct clkops clk_pxa3xx_hsio_ops; |
71 | extern const struct clkops clk_pxa3xx_ac97_ops; | |
72 | extern const struct clkops clk_pxa3xx_pout_ops; | |
c085052b | 73 | extern const struct clkops clk_pxa3xx_smemc_ops; |
4029813c | 74 | |
7a2c5cb0 | 75 | extern void clk_pxa3xx_cken_enable(struct clk *); |
76 | extern void clk_pxa3xx_cken_disable(struct clk *); | |
7a2c5cb0 | 77 | |
2eaa03b5 RW |
78 | extern struct syscore_ops pxa3xx_clock_syscore_ops; |
79 | ||
7a2c5cb0 | 80 | #endif |