[deliverable/linux.git] / arch / arm / mach-pxa / cm-x270.c

/*
 * linux/arch/arm/mach-pxa/cm-x270.c
 *
 * Copyright (C) 2007 CompuLab, Ltd.
 * Mike Rapoport <mike@compulab.co.il>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/types.h>
#include <linux/pm.h>
#include <linux/fb.h>
#include <linux/platform_device.h>
#include <linux/irq.h>
#include <linux/sysdev.h>
#include <linux/io.h>
#include <linux/delay.h>

#include <linux/dm9000.h>
#include <linux/rtc-v3020.h>
#include <linux/serial_8250.h>

#include <video/mbxfb.h>

#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include <asm/mach/map.h>

#include <asm/arch/pxa-regs.h>
#include <asm/arch/pxa2xx-regs.h>
#include <asm/arch/pxa2xx-gpio.h>
#include <asm/arch/pxafb.h>
#include <asm/arch/ohci.h>
#include <asm/arch/mmc.h>
#include <asm/arch/bitfield.h>
#include <asm/arch/cm-x270.h>

#include <asm/hardware/it8152.h>

#include "generic.h"
#include "cm-x270-pci.h"

#define RTC_PHYS_BASE		(PXA_CS1_PHYS + (5 << 22))
#define DM9000_PHYS_BASE	(PXA_CS1_PHYS + (6 << 22))

static struct resource cmx270_dm9k_resource[] = {
	[0] = {
		.start = DM9000_PHYS_BASE,
		.end   = DM9000_PHYS_BASE + 4,
		.flags = IORESOURCE_MEM,
	},
	[1] = {
		.start = DM9000_PHYS_BASE + 8,
		.end   = DM9000_PHYS_BASE + 8 + 500,
		.flags = IORESOURCE_MEM,
	},
	[2] = {
		.start = CMX270_ETHIRQ,
		.end   = CMX270_ETHIRQ,
		.flags = IORESOURCE_IRQ,
	}
};

/* for the moment we limit ourselves to 32bit IO until some
 * better IO routines can be written and tested
 */
static struct dm9000_plat_data cmx270_dm9k_platdata = {
	.flags		= DM9000_PLATF_32BITONLY,
};

/* Ethernet device */
static struct platform_device cmx270_device_dm9k = {
	.name		= "dm9000",
	.id		= 0,
	.num_resources	= ARRAY_SIZE(cmx270_dm9k_resource),
	.resource	= cmx270_dm9k_resource,
	.dev		= {
		.platform_data = &cmx270_dm9k_platdata,
	}
};

/* audio device */
static struct platform_device cmx270_audio_device = {
	.name		= "pxa2xx-ac97",
	.id		= -1,
};

/* touchscreen controller */
static struct platform_device cmx270_ts_device = {
	.name		= "ucb1400_ts",
	.id		= -1,
};

/* RTC */
static struct resource cmx270_v3020_resource[] = {
	[0] = {
		.start = RTC_PHYS_BASE,
		.end   = RTC_PHYS_BASE + 4,
		.flags = IORESOURCE_MEM,
	},
};

struct v3020_platform_data cmx270_v3020_pdata = {
	.leftshift = 16,
};

static struct platform_device cmx270_rtc_device = {
	.name		= "v3020",
	.num_resources	= ARRAY_SIZE(cmx270_v3020_resource),
	.resource	= cmx270_v3020_resource,
	.id		= -1,
	.dev		= {
		.platform_data = &cmx270_v3020_pdata,
	}
};

/*
 * CM-X270 LEDs
 */
static struct platform_device cmx270_led_device = {
	.name		= "cm-x270-led",
	.id		= -1,
};

/* 2700G graphics */
static u64 fb_dma_mask = ~(u64)0;

static struct resource cmx270_2700G_resource[] = {
	/* frame buffer memory including ODFB and External SDRAM */
	[0] = {
		.start = MARATHON_PHYS,
		.end   = MARATHON_PHYS + 0x02000000,
		.flags = IORESOURCE_MEM,
	},
	/* Marathon registers */
	[1] = {
		.start = MARATHON_PHYS + 0x03fe0000,
		.end   = MARATHON_PHYS + 0x03ffffff,
		.flags = IORESOURCE_MEM,
	},
};

static unsigned long save_lcd_regs[10];

static int cmx270_marathon_probe(struct fb_info *fb)
{
	/* save PXA-270 pin settings before enabling 2700G */
	save_lcd_regs[0] = GPDR1;
	save_lcd_regs[1] = GPDR2;
	save_lcd_regs[2] = GAFR1_U;
	save_lcd_regs[3] = GAFR2_L;
	save_lcd_regs[4] = GAFR2_U;

	/* Disable PXA-270 on-chip controller driving pins */
	GPDR1 &= ~(0xfc000000);
	GPDR2 &= ~(0x00c03fff);
	GAFR1_U &= ~(0xfff00000);
	GAFR2_L &= ~(0x0fffffff);
	GAFR2_U &= ~(0x0000f000);
	return 0;
}

static int cmx270_marathon_remove(struct fb_info *fb)
{
	GPDR1 =   save_lcd_regs[0];
	GPDR2 =   save_lcd_regs[1];
	GAFR1_U = save_lcd_regs[2];
	GAFR2_L = save_lcd_regs[3];
	GAFR2_U = save_lcd_regs[4];
	return 0;
}

static struct mbxfb_platform_data cmx270_2700G_data = {
	.xres = {
		.min = 240,
		.max = 1200,
		.defval = 640,
	},
	.yres = {
		.min = 240,
		.max = 1200,
		.defval = 480,
	},
	.bpp = {
		.min = 16,
		.max = 32,
		.defval = 16,
	},
	.memsize = 8*1024*1024,
	.probe = cmx270_marathon_probe,
	.remove = cmx270_marathon_remove,
};

static struct platform_device cmx270_2700G = {
	.name		= "mbx-fb",
	.dev		= {
		.platform_data	= &cmx270_2700G_data,
		.dma_mask	= &fb_dma_mask,
		.coherent_dma_mask = 0xffffffff,
	},
	.num_resources	= ARRAY_SIZE(cmx270_2700G_resource),
	.resource	= cmx270_2700G_resource,
	.id		= -1,
};

static u64 ata_dma_mask = ~(u64)0;

static struct platform_device cmx270_ata = {
	.name = "pata_cm_x270",
	.id = -1,
	.dev		= {
		.dma_mask	= &ata_dma_mask,
		.coherent_dma_mask = 0xffffffff,
	},
};

/* platform devices */
static struct platform_device *platform_devices[] __initdata = {
	&cmx270_device_dm9k,
	&cmx270_audio_device,
	&cmx270_rtc_device,
	&cmx270_2700G,
	&cmx270_led_device,
	&cmx270_ts_device,
	&cmx270_ata,
};

/* Map PCI companion and IDE/General Purpose CS statically */
static struct map_desc cmx270_io_desc[] __initdata = {
	[0] = { /* IDE/general purpose space */
		.virtual	= CMX270_IDE104_VIRT,
		.pfn		= __phys_to_pfn(CMX270_IDE104_PHYS),
		.length		= SZ_64M - SZ_8M,
		.type		= MT_DEVICE
	},
	[1] = { /* PCI bridge */
		.virtual	= CMX270_IT8152_VIRT,
		.pfn		= __phys_to_pfn(CMX270_IT8152_PHYS),
		.length		= SZ_64M,
		.type		= MT_DEVICE
	},
};

/*
  Display definitions
  keep these for backwards compatibility, although symbolic names (as
  e.g. in lpd270.c) looks better
*/
#define MTYPE_STN320x240	0
#define MTYPE_TFT640x480	1
#define MTYPE_CRT640x480	2
#define MTYPE_CRT800x600	3
#define MTYPE_TFT320x240	6
#define MTYPE_STN640x480	7

static struct pxafb_mode_info generic_stn_320x240_mode = {
	.pixclock	= 76923,
	.bpp		= 8,
	.xres		= 320,
	.yres		= 240,
	.hsync_len	= 3,
	.vsync_len	= 2,
	.left_margin	= 3,
	.upper_margin	= 0,
	.right_margin	= 3,
	.lower_margin	= 0,
	.sync		= (FB_SYNC_HOR_HIGH_ACT |
			   FB_SYNC_VERT_HIGH_ACT),
	.cmap_greyscale = 0,
};

static struct pxafb_mach_info generic_stn_320x240 = {
	.modes		= &generic_stn_320x240_mode,
	.num_modes	= 1,
	.lccr0		= 0,
	.lccr3		= (LCCR3_PixClkDiv(0x03) |
			   LCCR3_Acb(0xff) |
			   LCCR3_PCP),
	.cmap_inverse	= 0,
	.cmap_static	= 0,
};

static struct pxafb_mode_info generic_tft_640x480_mode = {
	.pixclock	= 38461,
	.bpp		= 8,
	.xres		= 640,
	.yres		= 480,
	.hsync_len	= 60,
	.vsync_len	= 2,
	.left_margin	= 70,
	.upper_margin	= 10,
	.right_margin	= 70,
	.lower_margin	= 5,
	.sync		= 0,
	.cmap_greyscale = 0,
};

static struct pxafb_mach_info generic_tft_640x480 = {
	.modes		= &generic_tft_640x480_mode,
	.num_modes	= 1,
	.lccr0		= (LCCR0_PAS),
	.lccr3		= (LCCR3_PixClkDiv(0x01) |
			   LCCR3_Acb(0xff) |
			   LCCR3_PCP),
	.cmap_inverse	= 0,
	.cmap_static	= 0,
};

static struct pxafb_mode_info generic_crt_640x480_mode = {
	.pixclock	= 38461,
	.bpp		= 8,
	.xres		= 640,
	.yres		= 480,
	.hsync_len	= 63,
	.vsync_len	= 2,
	.left_margin	= 81,
	.upper_margin	= 33,
	.right_margin	= 16,
	.lower_margin	= 10,
	.sync		= (FB_SYNC_HOR_HIGH_ACT |
			   FB_SYNC_VERT_HIGH_ACT),
	.cmap_greyscale = 0,
};

static struct pxafb_mach_info generic_crt_640x480 = {
	.modes		= &generic_crt_640x480_mode,
	.num_modes	= 1,
	.lccr0		= (LCCR0_PAS),
	.lccr3		= (LCCR3_PixClkDiv(0x01) |
			   LCCR3_Acb(0xff)),
	.cmap_inverse	= 0,
	.cmap_static	= 0,
};

static struct pxafb_mode_info generic_crt_800x600_mode = {
	.pixclock	= 28846,
	.bpp		= 8,
	.xres		= 800,
	.yres	  	= 600,
	.hsync_len	= 63,
	.vsync_len	= 2,
	.left_margin	= 26,
	.upper_margin	= 21,
	.right_margin	= 26,
	.lower_margin	= 11,
	.sync		= (FB_SYNC_HOR_HIGH_ACT |
			   FB_SYNC_VERT_HIGH_ACT),
	.cmap_greyscale = 0,
};

static struct pxafb_mach_info generic_crt_800x600 = {
	.modes		= &generic_crt_800x600_mode,
	.num_modes	= 1,
	.lccr0		= (LCCR0_PAS),
	.lccr3		= (LCCR3_PixClkDiv(0x02) |
			   LCCR3_Acb(0xff)),
	.cmap_inverse	= 0,
	.cmap_static	= 0,
};

static struct pxafb_mode_info generic_tft_320x240_mode = {
	.pixclock	= 134615,
	.bpp		= 16,
	.xres		= 320,
	.yres		= 240,
	.hsync_len	= 63,
	.vsync_len	= 7,
	.left_margin	= 75,
	.upper_margin	= 0,
	.right_margin	= 15,
	.lower_margin	= 15,
	.sync		= 0,
	.cmap_greyscale = 0,
};

static struct pxafb_mach_info generic_tft_320x240 = {
	.modes		= &generic_tft_320x240_mode,
	.num_modes	= 1,
	.lccr0		= (LCCR0_PAS),
	.lccr3		= (LCCR3_PixClkDiv(0x06) |
			   LCCR3_Acb(0xff) |
			   LCCR3_PCP),
	.cmap_inverse	= 0,
	.cmap_static	= 0,
};

static struct pxafb_mode_info generic_stn_640x480_mode = {
	.pixclock	= 57692,
	.bpp		= 8,
	.xres		= 640,
	.yres		= 480,
	.hsync_len	= 4,
	.vsync_len	= 2,
	.left_margin	= 10,
	.upper_margin	= 5,
	.right_margin	= 10,
	.lower_margin	= 5,
	.sync		= (FB_SYNC_HOR_HIGH_ACT |
			   FB_SYNC_VERT_HIGH_ACT),
	.cmap_greyscale = 0,
};

static struct pxafb_mach_info generic_stn_640x480 = {
	.modes		= &generic_stn_640x480_mode,
	.num_modes	= 1,
	.lccr0		= 0,
	.lccr3		= (LCCR3_PixClkDiv(0x02) |
			   LCCR3_Acb(0xff)),
	.cmap_inverse	= 0,
	.cmap_static	= 0,
};

static struct pxafb_mach_info *cmx270_display = &generic_crt_640x480;

static int __init cmx270_set_display(char *str)
{
	int disp_type = simple_strtol(str, NULL, 0);
	switch (disp_type) {
	case MTYPE_STN320x240:
		cmx270_display = &generic_stn_320x240;
		break;
	case MTYPE_TFT640x480:
		cmx270_display = &generic_tft_640x480;
		break;
	case MTYPE_CRT640x480:
		cmx270_display = &generic_crt_640x480;
		break;
	case MTYPE_CRT800x600:
		cmx270_display = &generic_crt_800x600;
		break;
	case MTYPE_TFT320x240:
		cmx270_display = &generic_tft_320x240;
		break;
	case MTYPE_STN640x480:
		cmx270_display = &generic_stn_640x480;
		break;
	default: /* fallback to CRT 640x480 */
		cmx270_display = &generic_crt_640x480;
		break;
	}
	return 1;
}

/*
   This should be done really early to get proper configuration for
   frame buffer.
   Indeed, pxafb parameters can be used istead, but CM-X270 bootloader
   has limitied line length for kernel command line, and also it will
   break compatibitlty with proprietary releases already in field.
*/
__setup("monitor=", cmx270_set_display);

/* PXA27x OHCI controller setup */
static int cmx270_ohci_init(struct device *dev)
{
	/* Set the Power Control Polarity Low */
	UHCHR = (UHCHR | UHCHR_PCPL) &
		~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE);

	return 0;
}

static struct pxaohci_platform_data cmx270_ohci_platform_data = {
	.port_mode	= PMM_PERPORT_MODE,
	.init		= cmx270_ohci_init,
};


static int cmx270_mci_init(struct device *dev,
			   irq_handler_t cmx270_detect_int,
			   void *data)
{
	int err;

	/*
	 * setup GPIO for PXA27x MMC controller
	 */
	pxa_gpio_mode(GPIO32_MMCCLK_MD);
	pxa_gpio_mode(GPIO112_MMCCMD_MD);
	pxa_gpio_mode(GPIO92_MMCDAT0_MD);
	pxa_gpio_mode(GPIO109_MMCDAT1_MD);
	pxa_gpio_mode(GPIO110_MMCDAT2_MD);
	pxa_gpio_mode(GPIO111_MMCDAT3_MD);

	/* SB-X270 uses GPIO105 as SD power enable */
	pxa_gpio_mode(105 | GPIO_OUT);

	/* card detect IRQ on GPIO 83 */
	pxa_gpio_mode(IRQ_TO_GPIO(CMX270_MMC_IRQ));

	err = request_irq(CMX270_MMC_IRQ, cmx270_detect_int,
			  IRQF_DISABLED | IRQF_TRIGGER_FALLING,
			  "MMC card detect", data);
	if (err)
		printk(KERN_ERR "cmx270_mci_init: MMC/SD: can't"
		       " request MMC card detect IRQ\n");

	return err;
}

static void cmx270_mci_setpower(struct device *dev, unsigned int vdd)
{
	struct pxamci_platform_data *p_d = dev->platform_data;

	if ((1 << vdd) & p_d->ocr_mask) {
		printk(KERN_DEBUG "%s: on\n", __func__);
		GPCR(105) = GPIO_bit(105);
	} else {
		GPSR(105) = GPIO_bit(105);
		printk(KERN_DEBUG "%s: off\n", __func__);
	}
}

static void cmx270_mci_exit(struct device *dev, void *data)
{
	free_irq(CMX270_MMC_IRQ, data);
}

static struct pxamci_platform_data cmx270_mci_platform_data = {
	.ocr_mask	= MMC_VDD_32_33|MMC_VDD_33_34,
	.init 		= cmx270_mci_init,
	.setpower 	= cmx270_mci_setpower,
	.exit		= cmx270_mci_exit,
};

#ifdef CONFIG_PM
static unsigned long sleep_save_msc[10];

static int cmx270_suspend(struct sys_device *dev, pm_message_t state)
{
	cmx270_pci_suspend();

	/* save MSC registers */
	sleep_save_msc[0] = MSC0;
	sleep_save_msc[1] = MSC1;
	sleep_save_msc[2] = MSC2;

	/* setup power saving mode registers */
	PCFR = 0x0;
	PSLR = 0xff400000;
	PMCR  = 0x00000005;
	PWER  = 0x80000000;
	PFER  = 0x00000000;
	PRER  = 0x00000000;
	PGSR0 = 0xC0018800;
	PGSR1 = 0x004F0002;
	PGSR2 = 0x6021C000;
	PGSR3 = 0x00020000;

	return 0;
}

static int cmx270_resume(struct sys_device *dev)
{
	cmx270_pci_resume();

	/* restore MSC registers */
	MSC0 = sleep_save_msc[0];
	MSC1 = sleep_save_msc[1];
	MSC2 = sleep_save_msc[2];

	return 0;
}

static struct sysdev_class cmx270_pm_sysclass = {
	.name = "pm",
	.resume = cmx270_resume,
	.suspend = cmx270_suspend,
};

static struct sys_device cmx270_pm_device = {
	.cls = &cmx270_pm_sysclass,
};

static int __init cmx270_pm_init(void)
{
	int error;
	error = sysdev_class_register(&cmx270_pm_sysclass);
	if (error == 0)
		error = sysdev_register(&cmx270_pm_device);
	return error;
}
#else
static int __init cmx270_pm_init(void) { return 0; }
#endif

static void __init cmx270_init(void)
{
	cmx270_pm_init();

	set_pxa_fb_info(cmx270_display);

	/* register CM-X270 platform devices */
	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));

	/* set MCI and OHCI platform parameters */
	pxa_set_mci_info(&cmx270_mci_platform_data);
	pxa_set_ohci_info(&cmx270_ohci_platform_data);

	/* This enables the STUART */
	pxa_gpio_mode(GPIO46_STRXD_MD);
	pxa_gpio_mode(GPIO47_STTXD_MD);

	/* This enables the BTUART  */
	pxa_gpio_mode(GPIO42_BTRXD_MD);
	pxa_gpio_mode(GPIO43_BTTXD_MD);
	pxa_gpio_mode(GPIO44_BTCTS_MD);
	pxa_gpio_mode(GPIO45_BTRTS_MD);
}

static void __init cmx270_init_irq(void)
{
	pxa27x_init_irq();


	cmx270_pci_init_irq();

	/* Setup interrupt for dm9000 */
	pxa_gpio_mode(IRQ_TO_GPIO(CMX270_ETHIRQ));
	set_irq_type(CMX270_ETHIRQ, IRQT_RISING);

	/* Setup interrupt for 2700G */
	pxa_gpio_mode(IRQ_TO_GPIO(CMX270_GFXIRQ));
	set_irq_type(CMX270_GFXIRQ, IRQT_FALLING);
}

static void __init cmx270_map_io(void)
{
	pxa_map_io();
	iotable_init(cmx270_io_desc, ARRAY_SIZE(cmx270_io_desc));
}


MACHINE_START(ARMCORE, "Compulab CM-x270")
	.boot_params	= 0xa0000100,
	.phys_io	= 0x40000000,
	.io_pg_offst	= (io_p2v(0x40000000) >> 18) & 0xfffc,
	.map_io		= cmx270_map_io,
	.init_irq	= cmx270_init_irq,
	.timer		= &pxa_timer,
	.init_machine	= cmx270_init,
MACHINE_END
Commit	Line	Data
3696a8a4 MR	1	/*
	2	* linux/arch/arm/mach-pxa/cm-x270.c
	3	*
	4	* Copyright (C) 2007 CompuLab, Ltd.
	5	* Mike Rapoport <mike@compulab.co.il>
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 as
	9	* published by the Free Software Foundation.
	10	*/
	11
	12	#include <linux/types.h>
	13	#include <linux/pm.h>
	14	#include <linux/fb.h>
	15	#include <linux/platform_device.h>
	16	#include <linux/irq.h>
	17	#include <linux/sysdev.h>
	18	#include <linux/io.h>
	19	#include <linux/delay.h>
	20
	21	#include <linux/dm9000.h>
	22	#include <linux/rtc-v3020.h>
	23	#include <linux/serial_8250.h>
	24
	25	#include <video/mbxfb.h>
	26
	27	#include <asm/mach/arch.h>
	28	#include <asm/mach-types.h>
	29	#include <asm/mach/map.h>
	30
	31	#include <asm/arch/pxa-regs.h>
bb548dd4	32	#include <asm/arch/pxa2xx-regs.h>
a683b14d	33	#include <asm/arch/pxa2xx-gpio.h>
3696a8a4 MR	34	#include <asm/arch/pxafb.h>
	35	#include <asm/arch/ohci.h>
	36	#include <asm/arch/mmc.h>
	37	#include <asm/arch/bitfield.h>
	38	#include <asm/arch/cm-x270.h>
	39
	40	#include <asm/hardware/it8152.h>
	41
	42	#include "generic.h"
	43	#include "cm-x270-pci.h"
	44
	45	#define RTC_PHYS_BASE (PXA_CS1_PHYS + (5 << 22))
	46	#define DM9000_PHYS_BASE (PXA_CS1_PHYS + (6 << 22))
	47
	48	static struct resource cmx270_dm9k_resource[] = {
	49	[0] = {
	50	.start = DM9000_PHYS_BASE,
	51	.end = DM9000_PHYS_BASE + 4,
	52	.flags = IORESOURCE_MEM,
	53	},
	54	[1] = {
	55	.start = DM9000_PHYS_BASE + 8,
	56	.end = DM9000_PHYS_BASE + 8 + 500,
	57	.flags = IORESOURCE_MEM,
	58	},
	59	[2] = {
	60	.start = CMX270_ETHIRQ,
	61	.end = CMX270_ETHIRQ,
	62	.flags = IORESOURCE_IRQ,
	63	}
	64	};
	65
	66	/* for the moment we limit ourselves to 32bit IO until some
	67	* better IO routines can be written and tested
	68	*/
	69	static struct dm9000_plat_data cmx270_dm9k_platdata = {
	70	.flags = DM9000_PLATF_32BITONLY,
	71	};
	72
	73	/* Ethernet device */
	74	static struct platform_device cmx270_device_dm9k = {
	75	.name = "dm9000",
	76	.id = 0,
	77	.num_resources = ARRAY_SIZE(cmx270_dm9k_resource),
	78	.resource = cmx270_dm9k_resource,
	79	.dev = {
	80	.platform_data = &cmx270_dm9k_platdata,
	81	}
	82	};
	83
	84	/* audio device */
	85	static struct platform_device cmx270_audio_device = {
	86	.name = "pxa2xx-ac97",
	87	.id = -1,
	88	};
	89
	90	/* touchscreen controller */
	91	static struct platform_device cmx270_ts_device = {
	92	.name = "ucb1400_ts",
	93	.id = -1,
	94	};
	95
	96	/* RTC */
	97	static struct resource cmx270_v3020_resource[] = {
98	[0] = {
99	.start = RTC_PHYS_BASE,
100	.end = RTC_PHYS_BASE + 4,
101	.flags = IORESOURCE_MEM,
102	},
103	};
104
105	struct v3020_platform_data cmx270_v3020_pdata = {
106	.leftshift = 16,
107	};
108
109	static struct platform_device cmx270_rtc_device = {
110	.name = "v3020",
111	.num_resources = ARRAY_SIZE(cmx270_v3020_resource),
112	.resource = cmx270_v3020_resource,
113	.id = -1,
114	.dev = {
115	.platform_data = &cmx270_v3020_pdata,
116	}
117	};
118
119	/*
120	* CM-X270 LEDs
121	*/
122	static struct platform_device cmx270_led_device = {
123	.name = "cm-x270-led",
124	.id = -1,
125	};
126
127	/* 2700G graphics */
128	static u64 fb_dma_mask = ~(u64)0;
129
130	static struct resource cmx270_2700G_resource[] = {
131	/* frame buffer memory including ODFB and External SDRAM */
132	[0] = {
133	.start = MARATHON_PHYS,
134	.end = MARATHON_PHYS + 0x02000000,
135	.flags = IORESOURCE_MEM,
136	},
137	/* Marathon registers */
138	[1] = {
139	.start = MARATHON_PHYS + 0x03fe0000,
140	.end = MARATHON_PHYS + 0x03ffffff,
141	.flags = IORESOURCE_MEM,
142	},
143	};
144
145	static unsigned long save_lcd_regs[10];
146
147	static int cmx270_marathon_probe(struct fb_info *fb)
148	{
149	/* save PXA-270 pin settings before enabling 2700G */
150	save_lcd_regs[0] = GPDR1;
151	save_lcd_regs[1] = GPDR2;
152	save_lcd_regs[2] = GAFR1_U;
153	save_lcd_regs[3] = GAFR2_L;
154	save_lcd_regs[4] = GAFR2_U;
155
156	/* Disable PXA-270 on-chip controller driving pins */
157	GPDR1 &= ~(0xfc000000);
158	GPDR2 &= ~(0x00c03fff);
159	GAFR1_U &= ~(0xfff00000);
160	GAFR2_L &= ~(0x0fffffff);
161	GAFR2_U &= ~(0x0000f000);
162	return 0;
163	}
164
165	static int cmx270_marathon_remove(struct fb_info *fb)
166	{
167	GPDR1 = save_lcd_regs[0];
168	GPDR2 = save_lcd_regs[1];
169	GAFR1_U = save_lcd_regs[2];
170	GAFR2_L = save_lcd_regs[3];
171	GAFR2_U = save_lcd_regs[4];
172	return 0;
173	}
174
175	static struct mbxfb_platform_data cmx270_2700G_data = {
176	.xres = {
177	.min = 240,
178	.max = 1200,
179	.defval = 640,
180	},
181	.yres = {
182	.min = 240,
183	.max = 1200,
184	.defval = 480,
185	},
186	.bpp = {
187	.min = 16,
188	.max = 32,
189	.defval = 16,
190	},
191	.memsize = 810241024,
192	.probe = cmx270_marathon_probe,
193	.remove = cmx270_marathon_remove,
194	};
195
196	static struct platform_device cmx270_2700G = {
197	.name = "mbx-fb",
198	.dev = {
199	.platform_data = &cmx270_2700G_data,
200	.dma_mask = &fb_dma_mask,
201	.coherent_dma_mask = 0xffffffff,
202	},
203	.num_resources = ARRAY_SIZE(cmx270_2700G_resource),
204	.resource = cmx270_2700G_resource,
205	.id = -1,
206	};
207
208	static u64 ata_dma_mask = ~(u64)0;
209
210	static struct platform_device cmx270_ata = {
211	.name = "pata_cm_x270",
212	.id = -1,
213	.dev = {
214	.dma_mask = &ata_dma_mask,
215	.coherent_dma_mask = 0xffffffff,
216	},
217	};
218
219	/* platform devices */
220	static struct platform_device *platform_devices[] __initdata = {
221	&cmx270_device_dm9k,
222	&cmx270_audio_device,
223	&cmx270_rtc_device,
224	&cmx270_2700G,
225	&cmx270_led_device,
226	&cmx270_ts_device,
227	&cmx270_ata,
228	};
229
230	/* Map PCI companion and IDE/General Purpose CS statically */
231	static struct map_desc cmx270_io_desc[] __initdata = {
232	[0] = { /* IDE/general purpose space */
233	.virtual = CMX270_IDE104_VIRT,
234	.pfn = __phys_to_pfn(CMX270_IDE104_PHYS),
235	.length = SZ_64M - SZ_8M,
236	.type = MT_DEVICE
237	},
238	[1] = { /* PCI bridge */
239	.virtual = CMX270_IT8152_VIRT,
240	.pfn = __phys_to_pfn(CMX270_IT8152_PHYS),
241	.length = SZ_64M,
242	.type = MT_DEVICE
243	},
244	};
245
246	/*
247	Display definitions
248	keep these for backwards compatibility, although symbolic names (as
249	e.g. in lpd270.c) looks better
250	*/
251	#define MTYPE_STN320x240 0
252	#define MTYPE_TFT640x480 1
253	#define MTYPE_CRT640x480 2
254	#define MTYPE_CRT800x600 3
255	#define MTYPE_TFT320x240 6
256	#define MTYPE_STN640x480 7
257
258	static struct pxafb_mode_info generic_stn_320x240_mode = {
259	.pixclock = 76923,
260	.bpp = 8,
261	.xres = 320,
262	.yres = 240,
263	.hsync_len = 3,
264	.vsync_len = 2,
265	.left_margin = 3,
266	.upper_margin = 0,
267	.right_margin = 3,
268	.lower_margin = 0,
269	.sync = (FB_SYNC_HOR_HIGH_ACT \|
270	FB_SYNC_VERT_HIGH_ACT),
271	.cmap_greyscale = 0,
272	};
273
274	static struct pxafb_mach_info generic_stn_320x240 = {
275	.modes = &generic_stn_320x240_mode,
276	.num_modes = 1,
277	.lccr0 = 0,
278	.lccr3 = (LCCR3_PixClkDiv(0x03) \|
279	LCCR3_Acb(0xff) \|
280	LCCR3_PCP),
281	.cmap_inverse = 0,
282	.cmap_static = 0,
283	};
284
285	static struct pxafb_mode_info generic_tft_640x480_mode = {
286	.pixclock = 38461,
287	.bpp = 8,
288	.xres = 640,
289	.yres = 480,
290	.hsync_len = 60,
291	.vsync_len = 2,
292	.left_margin = 70,
293	.upper_margin = 10,
294	.right_margin = 70,
295	.lower_margin = 5,
296	.sync = 0,
297	.cmap_greyscale = 0,
298	};
299
300	static struct pxafb_mach_info generic_tft_640x480 = {
301	.modes = &generic_tft_640x480_mode,
302	.num_modes = 1,
303	.lccr0 = (LCCR0_PAS),
304	.lccr3 = (LCCR3_PixClkDiv(0x01) \|
305	LCCR3_Acb(0xff) \|
306	LCCR3_PCP),
307	.cmap_inverse = 0,
308	.cmap_static = 0,
309	};
310
311	static struct pxafb_mode_info generic_crt_640x480_mode = {
312	.pixclock = 38461,
313	.bpp = 8,
314	.xres = 640,
315	.yres = 480,
316	.hsync_len = 63,
317	.vsync_len = 2,
318	.left_margin = 81,
319	.upper_margin = 33,
320	.right_margin = 16,
321	.lower_margin = 10,
322	.sync = (FB_SYNC_HOR_HIGH_ACT \|
323	FB_SYNC_VERT_HIGH_ACT),
324	.cmap_greyscale = 0,
325	};
326
327	static struct pxafb_mach_info generic_crt_640x480 = {
328	.modes = &generic_crt_640x480_mode,
329	.num_modes = 1,
330	.lccr0 = (LCCR0_PAS),
331	.lccr3 = (LCCR3_PixClkDiv(0x01) \|
332	LCCR3_Acb(0xff)),
333	.cmap_inverse = 0,
334	.cmap_static = 0,
335	};
336
337	static struct pxafb_mode_info generic_crt_800x600_mode = {
338	.pixclock = 28846,
339	.bpp = 8,
340	.xres = 800,
341	.yres = 600,
342	.hsync_len = 63,
343	.vsync_len = 2,
344	.left_margin = 26,
345	.upper_margin = 21,
346	.right_margin = 26,
347	.lower_margin = 11,
348	.sync = (FB_SYNC_HOR_HIGH_ACT \|
349	FB_SYNC_VERT_HIGH_ACT),
350	.cmap_greyscale = 0,
351	};
352
353	static struct pxafb_mach_info generic_crt_800x600 = {
354	.modes = &generic_crt_800x600_mode,
355	.num_modes = 1,
356	.lccr0 = (LCCR0_PAS),
357	.lccr3 = (LCCR3_PixClkDiv(0x02) \|
358	LCCR3_Acb(0xff)),
359	.cmap_inverse = 0,
360	.cmap_static = 0,
361	};
362
363	static struct pxafb_mode_info generic_tft_320x240_mode = {
364	.pixclock = 134615,
365	.bpp = 16,
366	.xres = 320,
367	.yres = 240,
368	.hsync_len = 63,
369	.vsync_len = 7,
370	.left_margin = 75,
371	.upper_margin = 0,
372	.right_margin = 15,
373	.lower_margin = 15,
374	.sync = 0,
375	.cmap_greyscale = 0,
376	};
377
378	static struct pxafb_mach_info generic_tft_320x240 = {
379	.modes = &generic_tft_320x240_mode,
380	.num_modes = 1,
381	.lccr0 = (LCCR0_PAS),
382	.lccr3 = (LCCR3_PixClkDiv(0x06) \|
383	LCCR3_Acb(0xff) \|
384	LCCR3_PCP),
385	.cmap_inverse = 0,
386	.cmap_static = 0,
387	};
388
389	static struct pxafb_mode_info generic_stn_640x480_mode = {
390	.pixclock = 57692,
391	.bpp = 8,
392	.xres = 640,
393	.yres = 480,
394	.hsync_len = 4,
395	.vsync_len = 2,
396	.left_margin = 10,
397	.upper_margin = 5,
398	.right_margin = 10,
399	.lower_margin = 5,
400	.sync = (FB_SYNC_HOR_HIGH_ACT \|
401	FB_SYNC_VERT_HIGH_ACT),
402	.cmap_greyscale = 0,
403	};
404
405	static struct pxafb_mach_info generic_stn_640x480 = {
406	.modes = &generic_stn_640x480_mode,
407	.num_modes = 1,
408	.lccr0 = 0,
409	.lccr3 = (LCCR3_PixClkDiv(0x02) \|
410	LCCR3_Acb(0xff)),
411	.cmap_inverse = 0,
412	.cmap_static = 0,
413	};
414
415	static struct pxafb_mach_info *cmx270_display = &generic_crt_640x480;
416
417	static int __init cmx270_set_display(char *str)
418	{
419	int disp_type = simple_strtol(str, NULL, 0);
420	switch (disp_type) {
421	case MTYPE_STN320x240:
422	cmx270_display = &generic_stn_320x240;
423	break;
424	case MTYPE_TFT640x480:
425	cmx270_display = &generic_tft_640x480;
426	break;
427	case MTYPE_CRT640x480:
428	cmx270_display = &generic_crt_640x480;
429	break;
430	case MTYPE_CRT800x600:
431	cmx270_display = &generic_crt_800x600;
432	break;
433	case MTYPE_TFT320x240:
434	cmx270_display = &generic_tft_320x240;
435	break;
436	case MTYPE_STN640x480:
437	cmx270_display = &generic_stn_640x480;
438	break;
439	default: /* fallback to CRT 640x480 */
440	cmx270_display = &generic_crt_640x480;
441	break;
442	}
443	return 1;
444	}
445
446	/*
447	This should be done really early to get proper configuration for
448	frame buffer.
449	Indeed, pxafb parameters can be used istead, but CM-X270 bootloader
450	has limitied line length for kernel command line, and also it will
451	break compatibitlty with proprietary releases already in field.
452	*/
453	__setup("monitor=", cmx270_set_display);
454
455	/* PXA27x OHCI controller setup */
456	static int cmx270_ohci_init(struct device *dev)
457	{
458	/* Set the Power Control Polarity Low */
459	UHCHR = (UHCHR \| UHCHR_PCPL) &
460	~(UHCHR_SSEP1 \| UHCHR_SSEP2 \| UHCHR_SSE);
461
462	return 0;
463	}
464
465	static struct pxaohci_platform_data cmx270_ohci_platform_data = {
466	.port_mode = PMM_PERPORT_MODE,
467	.init = cmx270_ohci_init,
468	};
469
470
471	static int cmx270_mci_init(struct device *dev,
472	irq_handler_t cmx270_detect_int,
473	void *data)
474	{
475	int err;
476
477	/*
478	* setup GPIO for PXA27x MMC controller
479	*/
480	pxa_gpio_mode(GPIO32_MMCCLK_MD);
481	pxa_gpio_mode(GPIO112_MMCCMD_MD);
482	pxa_gpio_mode(GPIO92_MMCDAT0_MD);
483	pxa_gpio_mode(GPIO109_MMCDAT1_MD);
484	pxa_gpio_mode(GPIO110_MMCDAT2_MD);
485	pxa_gpio_mode(GPIO111_MMCDAT3_MD);
486
487	/* SB-X270 uses GPIO105 as SD power enable */
488	pxa_gpio_mode(105 \| GPIO_OUT);
489
490	/* card detect IRQ on GPIO 83 */
491	pxa_gpio_mode(IRQ_TO_GPIO(CMX270_MMC_IRQ));
3696a8a4 MR	492
	493	err = request_irq(CMX270_MMC_IRQ, cmx270_detect_int,
	494	IRQF_DISABLED \| IRQF_TRIGGER_FALLING,
	495	"MMC card detect", data);
2687bd38	496	if (err)
3696a8a4 MR	497	printk(KERN_ERR "cmx270_mci_init: MMC/SD: can't"
3696a8a4 MR	498	" request MMC card detect IRQ\n");
3696a8a4	499
2687bd38	500	return err;
3696a8a4 MR	501	}
	502
	503	static void cmx270_mci_setpower(struct device *dev, unsigned int vdd)
	504	{
	505	struct pxamci_platform_data *p_d = dev->platform_data;
	506
	507	if ((1 << vdd) & p_d->ocr_mask) {
8e86f427	508	printk(KERN_DEBUG "%s: on\n", __func__);
3696a8a4 MR	509	GPCR(105) = GPIO_bit(105);
	510	} else {
	511	GPSR(105) = GPIO_bit(105);
8e86f427	512	printk(KERN_DEBUG "%s: off\n", __func__);
3696a8a4 MR	513	}
	514	}
	515
	516	static void cmx270_mci_exit(struct device dev, void data)
	517	{
	518	free_irq(CMX270_MMC_IRQ, data);
	519	}
	520
	521	static struct pxamci_platform_data cmx270_mci_platform_data = {
	522	.ocr_mask = MMC_VDD_32_33\|MMC_VDD_33_34,
	523	.init = cmx270_mci_init,
	524	.setpower = cmx270_mci_setpower,
	525	.exit = cmx270_mci_exit,
	526	};
	527
	528	#ifdef CONFIG_PM
	529	static unsigned long sleep_save_msc[10];
	530
	531	static int cmx270_suspend(struct sys_device *dev, pm_message_t state)
	532	{
	533	cmx270_pci_suspend();
	534
	535	/* save MSC registers */
	536	sleep_save_msc[0] = MSC0;
	537	sleep_save_msc[1] = MSC1;
	538	sleep_save_msc[2] = MSC2;
	539
	540	/* setup power saving mode registers */
	541	PCFR = 0x0;
	542	PSLR = 0xff400000;
	543	PMCR = 0x00000005;
	544	PWER = 0x80000000;
	545	PFER = 0x00000000;
	546	PRER = 0x00000000;
	547	PGSR0 = 0xC0018800;
	548	PGSR1 = 0x004F0002;
	549	PGSR2 = 0x6021C000;
	550	PGSR3 = 0x00020000;
	551
	552	return 0;
	553	}
	554
	555	static int cmx270_resume(struct sys_device *dev)
	556	{
	557	cmx270_pci_resume();
	558
	559	/* restore MSC registers */
	560	MSC0 = sleep_save_msc[0];
	561	MSC1 = sleep_save_msc[1];
	562	MSC2 = sleep_save_msc[2];
	563
	564	return 0;
	565	}
	566
	567	static struct sysdev_class cmx270_pm_sysclass = {
af5ca3f4	568	.name = "pm",
3696a8a4 MR	569	.resume = cmx270_resume,
	570	.suspend = cmx270_suspend,
	571	};
	572
	573	static struct sys_device cmx270_pm_device = {
	574	.cls = &cmx270_pm_sysclass,
	575	};
	576
	577	static int __init cmx270_pm_init(void)
	578	{
	579	int error;
	580	error = sysdev_class_register(&cmx270_pm_sysclass);
	581	if (error == 0)
	582	error = sysdev_register(&cmx270_pm_device);
	583	return error;
	584	}
	585	#else
	586	static int __init cmx270_pm_init(void) { return 0; }
	587	#endif
	588
	589	static void __init cmx270_init(void)
	590	{
	591	cmx270_pm_init();
	592
	593	set_pxa_fb_info(cmx270_display);
	594
	595	/* register CM-X270 platform devices */
	596	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
	597
	598	/* set MCI and OHCI platform parameters */
	599	pxa_set_mci_info(&cmx270_mci_platform_data);
	600	pxa_set_ohci_info(&cmx270_ohci_platform_data);
	601
	602	/* This enables the STUART */
	603	pxa_gpio_mode(GPIO46_STRXD_MD);
	604	pxa_gpio_mode(GPIO47_STTXD_MD);
	605
	606	/* This enables the BTUART */
	607	pxa_gpio_mode(GPIO42_BTRXD_MD);
	608	pxa_gpio_mode(GPIO43_BTTXD_MD);
	609	pxa_gpio_mode(GPIO44_BTCTS_MD);
	610	pxa_gpio_mode(GPIO45_BTRTS_MD);
	611	}
	612
	613	static void __init cmx270_init_irq(void)
	614	{
	615	pxa27x_init_irq();
	616
	617
	618	cmx270_pci_init_irq();
	619
	620	/* Setup interrupt for dm9000 */
	621	pxa_gpio_mode(IRQ_TO_GPIO(CMX270_ETHIRQ));
	622	set_irq_type(CMX270_ETHIRQ, IRQT_RISING);
	623
	624	/* Setup interrupt for 2700G */
	625	pxa_gpio_mode(IRQ_TO_GPIO(CMX270_GFXIRQ));
	626	set_irq_type(CMX270_GFXIRQ, IRQT_FALLING);
	627	}
	628
	629	static void __init cmx270_map_io(void)
	630	{
	631	pxa_map_io();
	632	iotable_init(cmx270_io_desc, ARRAY_SIZE(cmx270_io_desc));
633	}
634
635
636	MACHINE_START(ARMCORE, "Compulab CM-x270")
637	.boot_params = 0xa0000100,
638	.phys_io = 0x40000000,
639	.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
640	.map_io = cmx270_map_io,
641	.init_irq = cmx270_init_irq,
642	.timer = &pxa_timer,
643	.init_machine = cmx270_init,
644	MACHINE_END