Commit | Line | Data |
---|---|---|
4adc5fb6 MR |
1 | /* |
2 | * linux/arch/arm/mach-pxa/cm-x270.c | |
3 | * | |
4 | * Copyright (C) 2007, 2008 CompuLab, Ltd. | |
5 | * Mike Rapoport <mike@compulab.co.il> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
12 | #include <linux/platform_device.h> | |
13 | #include <linux/sysdev.h> | |
14 | #include <linux/irq.h> | |
15 | #include <linux/gpio.h> | |
a2099e49 | 16 | #include <linux/delay.h> |
4adc5fb6 MR |
17 | |
18 | #include <linux/rtc-v3020.h> | |
19 | #include <video/mbxfb.h> | |
20 | ||
a2099e49 MR |
21 | #include <linux/spi/spi.h> |
22 | #include <linux/spi/libertas_spi.h> | |
23 | ||
51c62982 | 24 | #include <mach/pxa27x.h> |
4adc5fb6 MR |
25 | #include <mach/ohci.h> |
26 | #include <mach/mmc.h> | |
a2099e49 | 27 | #include <mach/pxa2xx_spi.h> |
4adc5fb6 MR |
28 | |
29 | #include "generic.h" | |
30 | ||
31 | /* physical address if local-bus attached devices */ | |
32 | #define RTC_PHYS_BASE (PXA_CS1_PHYS + (5 << 22)) | |
33 | ||
34 | /* GPIO IRQ usage */ | |
35 | #define GPIO83_MMC_IRQ (83) | |
36 | ||
37 | #define CMX270_MMC_IRQ IRQ_GPIO(GPIO83_MMC_IRQ) | |
38 | ||
39 | /* MMC power enable */ | |
40 | #define GPIO105_MMC_POWER (105) | |
41 | ||
a2099e49 MR |
42 | /* WLAN GPIOS */ |
43 | #define GPIO19_WLAN_STRAP (19) | |
44 | #define GPIO102_WLAN_RST (102) | |
45 | ||
4adc5fb6 MR |
46 | static unsigned long cmx270_pin_config[] = { |
47 | /* AC'97 */ | |
48 | GPIO28_AC97_BITCLK, | |
49 | GPIO29_AC97_SDATA_IN_0, | |
50 | GPIO30_AC97_SDATA_OUT, | |
51 | GPIO31_AC97_SYNC, | |
52 | GPIO98_AC97_SYSCLK, | |
53 | GPIO113_AC97_nRESET, | |
54 | ||
55 | /* BTUART */ | |
56 | GPIO42_BTUART_RXD, | |
57 | GPIO43_BTUART_TXD, | |
58 | GPIO44_BTUART_CTS, | |
59 | GPIO45_BTUART_RTS, | |
60 | ||
61 | /* STUART */ | |
62 | GPIO46_STUART_RXD, | |
63 | GPIO47_STUART_TXD, | |
64 | ||
65 | /* MCI controller */ | |
66 | GPIO32_MMC_CLK, | |
67 | GPIO112_MMC_CMD, | |
68 | GPIO92_MMC_DAT_0, | |
69 | GPIO109_MMC_DAT_1, | |
70 | GPIO110_MMC_DAT_2, | |
71 | GPIO111_MMC_DAT_3, | |
72 | ||
73 | /* LCD */ | |
bedbda97 | 74 | GPIOxx_LCD_TFT_16BPP, |
4adc5fb6 MR |
75 | |
76 | /* I2C */ | |
77 | GPIO117_I2C_SCL, | |
78 | GPIO118_I2C_SDA, | |
79 | ||
80 | /* SSP1 */ | |
81 | GPIO23_SSP1_SCLK, | |
82 | GPIO24_SSP1_SFRM, | |
83 | GPIO25_SSP1_TXD, | |
84 | GPIO26_SSP1_RXD, | |
85 | ||
86 | /* SSP2 */ | |
a2099e49 MR |
87 | GPIO19_GPIO, /* SSP2 clock is used as GPIO for Libertas pin-strap */ |
88 | GPIO14_GPIO, | |
4adc5fb6 MR |
89 | GPIO87_SSP2_TXD, |
90 | GPIO88_SSP2_RXD, | |
91 | ||
92 | /* PC Card */ | |
93 | GPIO48_nPOE, | |
94 | GPIO49_nPWE, | |
95 | GPIO50_nPIOR, | |
96 | GPIO51_nPIOW, | |
97 | GPIO85_nPCE_1, | |
98 | GPIO54_nPCE_2, | |
99 | GPIO55_nPREG, | |
100 | GPIO56_nPWAIT, | |
101 | GPIO57_nIOIS16, | |
102 | ||
103 | /* SDRAM and local bus */ | |
104 | GPIO15_nCS_1, | |
105 | GPIO78_nCS_2, | |
106 | GPIO79_nCS_3, | |
107 | GPIO80_nCS_4, | |
108 | GPIO33_nCS_5, | |
109 | GPIO49_nPWE, | |
110 | GPIO18_RDY, | |
111 | ||
112 | /* GPIO */ | |
113 | GPIO0_GPIO | WAKEUP_ON_EDGE_BOTH, | |
114 | GPIO105_GPIO | MFP_LPM_DRIVE_HIGH, /* MMC/SD power */ | |
115 | GPIO53_GPIO, /* PC card reset */ | |
a2099e49 | 116 | GPIO102_GPIO, /* WLAN reset */ |
4adc5fb6 MR |
117 | |
118 | /* NAND controls */ | |
119 | GPIO11_GPIO | MFP_LPM_DRIVE_HIGH, /* NAND CE# */ | |
120 | GPIO89_GPIO, /* NAND Ready/Busy */ | |
121 | ||
122 | /* interrupts */ | |
123 | GPIO10_GPIO, /* DM9000 interrupt */ | |
124 | GPIO83_GPIO, /* MMC card detect */ | |
a2099e49 | 125 | GPIO95_GPIO, /* WLAN interrupt */ |
4adc5fb6 MR |
126 | }; |
127 | ||
128 | /* V3020 RTC */ | |
129 | #if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE) | |
130 | static struct resource cmx270_v3020_resource[] = { | |
131 | [0] = { | |
132 | .start = RTC_PHYS_BASE, | |
133 | .end = RTC_PHYS_BASE + 4, | |
134 | .flags = IORESOURCE_MEM, | |
135 | }, | |
136 | }; | |
137 | ||
138 | struct v3020_platform_data cmx270_v3020_pdata = { | |
139 | .leftshift = 16, | |
140 | }; | |
141 | ||
142 | static struct platform_device cmx270_rtc_device = { | |
143 | .name = "v3020", | |
144 | .num_resources = ARRAY_SIZE(cmx270_v3020_resource), | |
145 | .resource = cmx270_v3020_resource, | |
146 | .id = -1, | |
147 | .dev = { | |
148 | .platform_data = &cmx270_v3020_pdata, | |
149 | } | |
150 | }; | |
151 | ||
152 | static void __init cmx270_init_rtc(void) | |
153 | { | |
154 | platform_device_register(&cmx270_rtc_device); | |
155 | } | |
156 | #else | |
598dca1f | 157 | static inline void cmx270_init_rtc(void) {} |
4adc5fb6 MR |
158 | #endif |
159 | ||
160 | /* 2700G graphics */ | |
161 | #if defined(CONFIG_FB_MBX) || defined(CONFIG_FB_MBX_MODULE) | |
162 | static u64 fb_dma_mask = ~(u64)0; | |
163 | ||
164 | static struct resource cmx270_2700G_resource[] = { | |
165 | /* frame buffer memory including ODFB and External SDRAM */ | |
166 | [0] = { | |
167 | .start = PXA_CS2_PHYS, | |
168 | .end = PXA_CS2_PHYS + 0x01ffffff, | |
169 | .flags = IORESOURCE_MEM, | |
170 | }, | |
171 | /* Marathon registers */ | |
172 | [1] = { | |
173 | .start = PXA_CS2_PHYS + 0x03fe0000, | |
174 | .end = PXA_CS2_PHYS + 0x03ffffff, | |
175 | .flags = IORESOURCE_MEM, | |
176 | }, | |
177 | }; | |
178 | ||
179 | static unsigned long save_lcd_regs[10]; | |
180 | ||
181 | static int cmx270_marathon_probe(struct fb_info *fb) | |
182 | { | |
183 | /* save PXA-270 pin settings before enabling 2700G */ | |
184 | save_lcd_regs[0] = GPDR1; | |
185 | save_lcd_regs[1] = GPDR2; | |
186 | save_lcd_regs[2] = GAFR1_U; | |
187 | save_lcd_regs[3] = GAFR2_L; | |
188 | save_lcd_regs[4] = GAFR2_U; | |
189 | ||
190 | /* Disable PXA-270 on-chip controller driving pins */ | |
191 | GPDR1 &= ~(0xfc000000); | |
192 | GPDR2 &= ~(0x00c03fff); | |
193 | GAFR1_U &= ~(0xfff00000); | |
194 | GAFR2_L &= ~(0x0fffffff); | |
195 | GAFR2_U &= ~(0x0000f000); | |
196 | return 0; | |
197 | } | |
198 | ||
199 | static int cmx270_marathon_remove(struct fb_info *fb) | |
200 | { | |
201 | GPDR1 = save_lcd_regs[0]; | |
202 | GPDR2 = save_lcd_regs[1]; | |
203 | GAFR1_U = save_lcd_regs[2]; | |
204 | GAFR2_L = save_lcd_regs[3]; | |
205 | GAFR2_U = save_lcd_regs[4]; | |
206 | return 0; | |
207 | } | |
208 | ||
209 | static struct mbxfb_platform_data cmx270_2700G_data = { | |
210 | .xres = { | |
211 | .min = 240, | |
212 | .max = 1200, | |
213 | .defval = 640, | |
214 | }, | |
215 | .yres = { | |
216 | .min = 240, | |
217 | .max = 1200, | |
218 | .defval = 480, | |
219 | }, | |
220 | .bpp = { | |
221 | .min = 16, | |
222 | .max = 32, | |
223 | .defval = 16, | |
224 | }, | |
225 | .memsize = 8*1024*1024, | |
226 | .probe = cmx270_marathon_probe, | |
227 | .remove = cmx270_marathon_remove, | |
228 | }; | |
229 | ||
230 | static struct platform_device cmx270_2700G = { | |
231 | .name = "mbx-fb", | |
232 | .dev = { | |
233 | .platform_data = &cmx270_2700G_data, | |
234 | .dma_mask = &fb_dma_mask, | |
235 | .coherent_dma_mask = 0xffffffff, | |
236 | }, | |
237 | .num_resources = ARRAY_SIZE(cmx270_2700G_resource), | |
238 | .resource = cmx270_2700G_resource, | |
239 | .id = -1, | |
240 | }; | |
241 | ||
242 | static void __init cmx270_init_2700G(void) | |
243 | { | |
244 | platform_device_register(&cmx270_2700G); | |
245 | } | |
246 | #else | |
247 | static inline void cmx270_init_2700G(void) {} | |
248 | #endif | |
249 | ||
250 | /* PXA27x OHCI controller setup */ | |
251 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) | |
4adc5fb6 MR |
252 | static struct pxaohci_platform_data cmx270_ohci_platform_data = { |
253 | .port_mode = PMM_PERPORT_MODE, | |
097b5334 | 254 | .flags = ENABLE_PORT1 | ENABLE_PORT2 | POWER_CONTROL_LOW, |
4adc5fb6 MR |
255 | }; |
256 | ||
257 | static void __init cmx270_init_ohci(void) | |
258 | { | |
259 | pxa_set_ohci_info(&cmx270_ohci_platform_data); | |
260 | } | |
261 | #else | |
262 | static inline void cmx270_init_ohci(void) {} | |
263 | #endif | |
264 | ||
265 | #if defined(CONFIG_MMC) || defined(CONFIG_MMC_MODULE) | |
4adc5fb6 | 266 | static struct pxamci_platform_data cmx270_mci_platform_data = { |
7a648256 RJ |
267 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, |
268 | .gpio_card_detect = GPIO83_MMC_IRQ, | |
269 | .gpio_card_ro = -1, | |
270 | .gpio_power = GPIO105_MMC_POWER, | |
271 | .gpio_power_invert = 1, | |
4adc5fb6 MR |
272 | }; |
273 | ||
274 | static void __init cmx270_init_mmc(void) | |
275 | { | |
276 | pxa_set_mci_info(&cmx270_mci_platform_data); | |
277 | } | |
278 | #else | |
279 | static inline void cmx270_init_mmc(void) {} | |
280 | #endif | |
281 | ||
a2099e49 MR |
282 | #if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MODULE) |
283 | static struct pxa2xx_spi_master cm_x270_spi_info = { | |
284 | .num_chipselect = 1, | |
285 | .enable_dma = 1, | |
286 | }; | |
287 | ||
288 | static struct pxa2xx_spi_chip cm_x270_libertas_chip = { | |
289 | .rx_threshold = 1, | |
290 | .tx_threshold = 1, | |
291 | .timeout = 1000, | |
292 | .gpio_cs = 14, | |
293 | }; | |
294 | ||
295 | static unsigned long cm_x270_libertas_pin_config[] = { | |
296 | /* SSP2 */ | |
297 | GPIO19_SSP2_SCLK, | |
298 | GPIO14_GPIO, | |
299 | GPIO87_SSP2_TXD, | |
300 | GPIO88_SSP2_RXD, | |
301 | ||
302 | }; | |
303 | ||
304 | static int cm_x270_libertas_setup(struct spi_device *spi) | |
305 | { | |
306 | int err = gpio_request(GPIO19_WLAN_STRAP, "WLAN STRAP"); | |
307 | if (err) | |
308 | return err; | |
309 | ||
310 | err = gpio_request(GPIO102_WLAN_RST, "WLAN RST"); | |
311 | if (err) | |
312 | goto err_free_strap; | |
313 | ||
314 | err = gpio_direction_output(GPIO102_WLAN_RST, 0); | |
315 | if (err) | |
316 | goto err_free_strap; | |
317 | msleep(100); | |
318 | ||
319 | err = gpio_direction_output(GPIO19_WLAN_STRAP, 1); | |
320 | if (err) | |
321 | goto err_free_strap; | |
322 | msleep(100); | |
323 | ||
324 | pxa2xx_mfp_config(ARRAY_AND_SIZE(cm_x270_libertas_pin_config)); | |
325 | ||
326 | gpio_set_value(GPIO102_WLAN_RST, 1); | |
327 | msleep(100); | |
328 | ||
329 | spi->bits_per_word = 16; | |
330 | spi_setup(spi); | |
331 | ||
332 | return 0; | |
333 | ||
334 | err_free_strap: | |
335 | gpio_free(GPIO19_WLAN_STRAP); | |
336 | ||
337 | return err; | |
338 | } | |
339 | ||
340 | static int cm_x270_libertas_teardown(struct spi_device *spi) | |
341 | { | |
342 | gpio_set_value(GPIO102_WLAN_RST, 0); | |
343 | gpio_free(GPIO102_WLAN_RST); | |
344 | gpio_free(GPIO19_WLAN_STRAP); | |
345 | ||
346 | return 0; | |
347 | } | |
348 | ||
349 | struct libertas_spi_platform_data cm_x270_libertas_pdata = { | |
350 | .use_dummy_writes = 1, | |
351 | .setup = cm_x270_libertas_setup, | |
352 | .teardown = cm_x270_libertas_teardown, | |
353 | }; | |
354 | ||
355 | static struct spi_board_info cm_x270_spi_devices[] __initdata = { | |
356 | { | |
357 | .modalias = "libertas_spi", | |
358 | .max_speed_hz = 13000000, | |
359 | .bus_num = 2, | |
360 | .irq = gpio_to_irq(95), | |
361 | .chip_select = 0, | |
362 | .controller_data = &cm_x270_libertas_chip, | |
363 | .platform_data = &cm_x270_libertas_pdata, | |
364 | }, | |
365 | }; | |
366 | ||
367 | static void __init cmx270_init_spi(void) | |
368 | { | |
369 | pxa2xx_set_spi_info(2, &cm_x270_spi_info); | |
370 | spi_register_board_info(ARRAY_AND_SIZE(cm_x270_spi_devices)); | |
371 | } | |
372 | #else | |
373 | static inline void cmx270_init_spi(void) {} | |
374 | #endif | |
375 | ||
4adc5fb6 MR |
376 | void __init cmx270_init(void) |
377 | { | |
378 | pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx270_pin_config)); | |
379 | ||
9599d1db MR |
380 | #ifdef CONFIG_PM |
381 | pxa27x_set_pwrmode(PWRMODE_DEEPSLEEP); | |
382 | #endif | |
383 | ||
4adc5fb6 MR |
384 | cmx270_init_rtc(); |
385 | cmx270_init_mmc(); | |
386 | cmx270_init_ohci(); | |
387 | cmx270_init_2700G(); | |
a2099e49 | 388 | cmx270_init_spi(); |
4adc5fb6 | 389 | } |