Commit | Line | Data |
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3696a8a4 | 1 | /* |
da591937 | 2 | * linux/arch/arm/mach-pxa/cm-x2xx.c |
3696a8a4 | 3 | * |
4adc5fb6 | 4 | * Copyright (C) 2008 CompuLab, Ltd. |
3696a8a4 MR |
5 | * Mike Rapoport <mike@compulab.co.il> |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
3696a8a4 | 12 | #include <linux/platform_device.h> |
3696a8a4 | 13 | #include <linux/sysdev.h> |
2f01a973 MR |
14 | #include <linux/irq.h> |
15 | #include <linux/gpio.h> | |
3696a8a4 MR |
16 | |
17 | #include <linux/dm9000.h> | |
2f01a973 | 18 | #include <linux/leds.h> |
3696a8a4 MR |
19 | |
20 | #include <asm/mach/arch.h> | |
21 | #include <asm/mach-types.h> | |
22 | #include <asm/mach/map.h> | |
23 | ||
a09e64fb | 24 | #include <mach/pxa2xx-regs.h> |
a09e64fb RK |
25 | #include <mach/audio.h> |
26 | #include <mach/pxafb.h> | |
ad68bb9f | 27 | #include <mach/smemc.h> |
3696a8a4 MR |
28 | |
29 | #include <asm/hardware/it8152.h> | |
30 | ||
31 | #include "generic.h" | |
7d76e3f1 | 32 | #include "cm-x2xx-pci.h" |
3696a8a4 | 33 | |
a7f3f030 | 34 | extern void cmx255_init(void); |
4adc5fb6 MR |
35 | extern void cmx270_init(void); |
36 | ||
6ac6b817 HZ |
37 | /* reserve IRQs for IT8152 */ |
38 | #define CMX2XX_NR_IRQS (IRQ_BOARD_START + 40) | |
39 | ||
2f01a973 | 40 | /* virtual addresses for statically mapped regions */ |
da591937 MR |
41 | #define CMX2XX_VIRT_BASE (0xe8000000) |
42 | #define CMX2XX_IT8152_VIRT (CMX2XX_VIRT_BASE) | |
2f01a973 | 43 | |
4adc5fb6 | 44 | /* physical address if local-bus attached devices */ |
a7f3f030 | 45 | #define CMX255_DM9000_PHYS_BASE (PXA_CS1_PHYS + (8 << 22)) |
da591937 MR |
46 | #define CMX270_DM9000_PHYS_BASE (PXA_CS1_PHYS + (6 << 22)) |
47 | ||
48 | /* leds */ | |
a7f3f030 MR |
49 | #define CMX255_GPIO_RED (27) |
50 | #define CMX255_GPIO_GREEN (32) | |
da591937 MR |
51 | #define CMX270_GPIO_RED (93) |
52 | #define CMX270_GPIO_GREEN (94) | |
3696a8a4 | 53 | |
2f01a973 | 54 | /* GPIO IRQ usage */ |
a7f3f030 | 55 | #define GPIO22_ETHIRQ (22) |
2f01a973 | 56 | #define GPIO10_ETHIRQ (10) |
a7f3f030 | 57 | #define CMX255_GPIO_IT8152_IRQ (0) |
da591937 | 58 | #define CMX270_GPIO_IT8152_IRQ (22) |
2f01a973 | 59 | |
a7f3f030 | 60 | #define CMX255_ETHIRQ IRQ_GPIO(GPIO22_ETHIRQ) |
2f01a973 | 61 | #define CMX270_ETHIRQ IRQ_GPIO(GPIO10_ETHIRQ) |
2f01a973 MR |
62 | |
63 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) | |
a7f3f030 MR |
64 | static struct resource cmx255_dm9000_resource[] = { |
65 | [0] = { | |
66 | .start = CMX255_DM9000_PHYS_BASE, | |
67 | .end = CMX255_DM9000_PHYS_BASE + 3, | |
68 | .flags = IORESOURCE_MEM, | |
69 | }, | |
70 | [1] = { | |
71 | .start = CMX255_DM9000_PHYS_BASE + 4, | |
72 | .end = CMX255_DM9000_PHYS_BASE + 4 + 500, | |
73 | .flags = IORESOURCE_MEM, | |
74 | }, | |
75 | [2] = { | |
76 | .start = CMX255_ETHIRQ, | |
77 | .end = CMX255_ETHIRQ, | |
78 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, | |
79 | } | |
80 | }; | |
81 | ||
2f01a973 | 82 | static struct resource cmx270_dm9000_resource[] = { |
3696a8a4 | 83 | [0] = { |
da591937 MR |
84 | .start = CMX270_DM9000_PHYS_BASE, |
85 | .end = CMX270_DM9000_PHYS_BASE + 3, | |
3696a8a4 MR |
86 | .flags = IORESOURCE_MEM, |
87 | }, | |
88 | [1] = { | |
da591937 MR |
89 | .start = CMX270_DM9000_PHYS_BASE + 8, |
90 | .end = CMX270_DM9000_PHYS_BASE + 8 + 500, | |
3696a8a4 MR |
91 | .flags = IORESOURCE_MEM, |
92 | }, | |
93 | [2] = { | |
94 | .start = CMX270_ETHIRQ, | |
95 | .end = CMX270_ETHIRQ, | |
2f01a973 | 96 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
3696a8a4 MR |
97 | } |
98 | }; | |
99 | ||
2f01a973 | 100 | static struct dm9000_plat_data cmx270_dm9000_platdata = { |
bff22c9b | 101 | .flags = DM9000_PLATF_32BITONLY | DM9000_PLATF_NO_EEPROM, |
3696a8a4 MR |
102 | }; |
103 | ||
da591937 | 104 | static struct platform_device cmx2xx_dm9000_device = { |
3696a8a4 MR |
105 | .name = "dm9000", |
106 | .id = 0, | |
2f01a973 | 107 | .num_resources = ARRAY_SIZE(cmx270_dm9000_resource), |
3696a8a4 | 108 | .dev = { |
2f01a973 | 109 | .platform_data = &cmx270_dm9000_platdata, |
3696a8a4 MR |
110 | } |
111 | }; | |
112 | ||
da591937 | 113 | static void __init cmx2xx_init_dm9000(void) |
2f01a973 | 114 | { |
a7f3f030 MR |
115 | if (cpu_is_pxa25x()) |
116 | cmx2xx_dm9000_device.resource = cmx255_dm9000_resource; | |
117 | else | |
118 | cmx2xx_dm9000_device.resource = cmx270_dm9000_resource; | |
da591937 | 119 | platform_device_register(&cmx2xx_dm9000_device); |
2f01a973 MR |
120 | } |
121 | #else | |
da591937 | 122 | static inline void cmx2xx_init_dm9000(void) {} |
2f01a973 MR |
123 | #endif |
124 | ||
125 | /* UCB1400 touchscreen controller */ | |
126 | #if defined(CONFIG_TOUCHSCREEN_UCB1400) || defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE) | |
da591937 | 127 | static struct platform_device cmx2xx_ts_device = { |
50f6bb0a | 128 | .name = "ucb1400_core", |
3696a8a4 MR |
129 | .id = -1, |
130 | }; | |
131 | ||
da591937 | 132 | static void __init cmx2xx_init_touchscreen(void) |
2f01a973 | 133 | { |
da591937 | 134 | platform_device_register(&cmx2xx_ts_device); |
2f01a973 MR |
135 | } |
136 | #else | |
da591937 | 137 | static inline void cmx2xx_init_touchscreen(void) {} |
2f01a973 MR |
138 | #endif |
139 | ||
2f01a973 MR |
140 | /* CM-X270 LEDs */ |
141 | #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) | |
da591937 | 142 | static struct gpio_led cmx2xx_leds[] = { |
2f01a973 | 143 | [0] = { |
da591937 | 144 | .name = "cm-x2xx:red", |
2f01a973 | 145 | .default_trigger = "nand-disk", |
2f01a973 MR |
146 | .active_low = 1, |
147 | }, | |
148 | [1] = { | |
da591937 | 149 | .name = "cm-x2xx:green", |
2f01a973 | 150 | .default_trigger = "heartbeat", |
2f01a973 MR |
151 | .active_low = 1, |
152 | }, | |
153 | }; | |
154 | ||
da591937 MR |
155 | static struct gpio_led_platform_data cmx2xx_gpio_led_pdata = { |
156 | .num_leds = ARRAY_SIZE(cmx2xx_leds), | |
157 | .leds = cmx2xx_leds, | |
2f01a973 MR |
158 | }; |
159 | ||
da591937 | 160 | static struct platform_device cmx2xx_led_device = { |
2f01a973 | 161 | .name = "leds-gpio", |
3696a8a4 | 162 | .id = -1, |
2f01a973 | 163 | .dev = { |
da591937 | 164 | .platform_data = &cmx2xx_gpio_led_pdata, |
2f01a973 | 165 | }, |
3696a8a4 MR |
166 | }; |
167 | ||
da591937 | 168 | static void __init cmx2xx_init_leds(void) |
2f01a973 | 169 | { |
a7f3f030 MR |
170 | if (cpu_is_pxa25x()) { |
171 | cmx2xx_leds[0].gpio = CMX255_GPIO_RED; | |
172 | cmx2xx_leds[1].gpio = CMX255_GPIO_GREEN; | |
173 | } else { | |
174 | cmx2xx_leds[0].gpio = CMX270_GPIO_RED; | |
175 | cmx2xx_leds[1].gpio = CMX270_GPIO_GREEN; | |
176 | } | |
da591937 | 177 | platform_device_register(&cmx2xx_led_device); |
2f01a973 MR |
178 | } |
179 | #else | |
da591937 | 180 | static inline void cmx2xx_init_leds(void) {} |
2f01a973 MR |
181 | #endif |
182 | ||
2f01a973 | 183 | #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) |
3696a8a4 MR |
184 | /* |
185 | Display definitions | |
186 | keep these for backwards compatibility, although symbolic names (as | |
187 | e.g. in lpd270.c) looks better | |
188 | */ | |
189 | #define MTYPE_STN320x240 0 | |
190 | #define MTYPE_TFT640x480 1 | |
191 | #define MTYPE_CRT640x480 2 | |
192 | #define MTYPE_CRT800x600 3 | |
193 | #define MTYPE_TFT320x240 6 | |
194 | #define MTYPE_STN640x480 7 | |
195 | ||
196 | static struct pxafb_mode_info generic_stn_320x240_mode = { | |
197 | .pixclock = 76923, | |
198 | .bpp = 8, | |
199 | .xres = 320, | |
200 | .yres = 240, | |
201 | .hsync_len = 3, | |
202 | .vsync_len = 2, | |
203 | .left_margin = 3, | |
204 | .upper_margin = 0, | |
205 | .right_margin = 3, | |
206 | .lower_margin = 0, | |
207 | .sync = (FB_SYNC_HOR_HIGH_ACT | | |
208 | FB_SYNC_VERT_HIGH_ACT), | |
209 | .cmap_greyscale = 0, | |
210 | }; | |
211 | ||
212 | static struct pxafb_mach_info generic_stn_320x240 = { | |
213 | .modes = &generic_stn_320x240_mode, | |
214 | .num_modes = 1, | |
9587319b EM |
215 | .lcd_conn = LCD_COLOR_STN_8BPP | LCD_PCLK_EDGE_FALL |\ |
216 | LCD_AC_BIAS_FREQ(0xff), | |
3696a8a4 MR |
217 | .cmap_inverse = 0, |
218 | .cmap_static = 0, | |
219 | }; | |
220 | ||
221 | static struct pxafb_mode_info generic_tft_640x480_mode = { | |
222 | .pixclock = 38461, | |
223 | .bpp = 8, | |
224 | .xres = 640, | |
225 | .yres = 480, | |
226 | .hsync_len = 60, | |
227 | .vsync_len = 2, | |
228 | .left_margin = 70, | |
229 | .upper_margin = 10, | |
230 | .right_margin = 70, | |
231 | .lower_margin = 5, | |
232 | .sync = 0, | |
233 | .cmap_greyscale = 0, | |
234 | }; | |
235 | ||
236 | static struct pxafb_mach_info generic_tft_640x480 = { | |
237 | .modes = &generic_tft_640x480_mode, | |
238 | .num_modes = 1, | |
9587319b EM |
239 | .lcd_conn = LCD_COLOR_TFT_8BPP | LCD_PCLK_EDGE_FALL |\ |
240 | LCD_AC_BIAS_FREQ(0xff), | |
3696a8a4 MR |
241 | .cmap_inverse = 0, |
242 | .cmap_static = 0, | |
243 | }; | |
244 | ||
245 | static struct pxafb_mode_info generic_crt_640x480_mode = { | |
246 | .pixclock = 38461, | |
247 | .bpp = 8, | |
248 | .xres = 640, | |
249 | .yres = 480, | |
250 | .hsync_len = 63, | |
251 | .vsync_len = 2, | |
252 | .left_margin = 81, | |
253 | .upper_margin = 33, | |
254 | .right_margin = 16, | |
255 | .lower_margin = 10, | |
256 | .sync = (FB_SYNC_HOR_HIGH_ACT | | |
257 | FB_SYNC_VERT_HIGH_ACT), | |
258 | .cmap_greyscale = 0, | |
259 | }; | |
260 | ||
261 | static struct pxafb_mach_info generic_crt_640x480 = { | |
262 | .modes = &generic_crt_640x480_mode, | |
263 | .num_modes = 1, | |
9587319b | 264 | .lcd_conn = LCD_COLOR_TFT_8BPP | LCD_AC_BIAS_FREQ(0xff), |
3696a8a4 MR |
265 | .cmap_inverse = 0, |
266 | .cmap_static = 0, | |
267 | }; | |
268 | ||
269 | static struct pxafb_mode_info generic_crt_800x600_mode = { | |
270 | .pixclock = 28846, | |
271 | .bpp = 8, | |
272 | .xres = 800, | |
273 | .yres = 600, | |
274 | .hsync_len = 63, | |
275 | .vsync_len = 2, | |
276 | .left_margin = 26, | |
277 | .upper_margin = 21, | |
278 | .right_margin = 26, | |
279 | .lower_margin = 11, | |
280 | .sync = (FB_SYNC_HOR_HIGH_ACT | | |
281 | FB_SYNC_VERT_HIGH_ACT), | |
282 | .cmap_greyscale = 0, | |
283 | }; | |
284 | ||
285 | static struct pxafb_mach_info generic_crt_800x600 = { | |
286 | .modes = &generic_crt_800x600_mode, | |
287 | .num_modes = 1, | |
9587319b | 288 | .lcd_conn = LCD_COLOR_TFT_8BPP | LCD_AC_BIAS_FREQ(0xff), |
3696a8a4 MR |
289 | .cmap_inverse = 0, |
290 | .cmap_static = 0, | |
291 | }; | |
292 | ||
293 | static struct pxafb_mode_info generic_tft_320x240_mode = { | |
294 | .pixclock = 134615, | |
295 | .bpp = 16, | |
296 | .xres = 320, | |
297 | .yres = 240, | |
298 | .hsync_len = 63, | |
299 | .vsync_len = 7, | |
300 | .left_margin = 75, | |
301 | .upper_margin = 0, | |
302 | .right_margin = 15, | |
303 | .lower_margin = 15, | |
304 | .sync = 0, | |
305 | .cmap_greyscale = 0, | |
306 | }; | |
307 | ||
308 | static struct pxafb_mach_info generic_tft_320x240 = { | |
309 | .modes = &generic_tft_320x240_mode, | |
310 | .num_modes = 1, | |
9587319b | 311 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_AC_BIAS_FREQ(0xff), |
3696a8a4 MR |
312 | .cmap_inverse = 0, |
313 | .cmap_static = 0, | |
314 | }; | |
315 | ||
316 | static struct pxafb_mode_info generic_stn_640x480_mode = { | |
317 | .pixclock = 57692, | |
318 | .bpp = 8, | |
319 | .xres = 640, | |
320 | .yres = 480, | |
321 | .hsync_len = 4, | |
322 | .vsync_len = 2, | |
323 | .left_margin = 10, | |
324 | .upper_margin = 5, | |
325 | .right_margin = 10, | |
326 | .lower_margin = 5, | |
327 | .sync = (FB_SYNC_HOR_HIGH_ACT | | |
328 | FB_SYNC_VERT_HIGH_ACT), | |
329 | .cmap_greyscale = 0, | |
330 | }; | |
331 | ||
332 | static struct pxafb_mach_info generic_stn_640x480 = { | |
333 | .modes = &generic_stn_640x480_mode, | |
334 | .num_modes = 1, | |
9587319b | 335 | .lcd_conn = LCD_COLOR_STN_8BPP | LCD_AC_BIAS_FREQ(0xff), |
3696a8a4 MR |
336 | .cmap_inverse = 0, |
337 | .cmap_static = 0, | |
338 | }; | |
339 | ||
da591937 | 340 | static struct pxafb_mach_info *cmx2xx_display = &generic_crt_640x480; |
3696a8a4 | 341 | |
da591937 | 342 | static int __init cmx2xx_set_display(char *str) |
3696a8a4 MR |
343 | { |
344 | int disp_type = simple_strtol(str, NULL, 0); | |
345 | switch (disp_type) { | |
346 | case MTYPE_STN320x240: | |
da591937 | 347 | cmx2xx_display = &generic_stn_320x240; |
3696a8a4 MR |
348 | break; |
349 | case MTYPE_TFT640x480: | |
da591937 | 350 | cmx2xx_display = &generic_tft_640x480; |
3696a8a4 MR |
351 | break; |
352 | case MTYPE_CRT640x480: | |
da591937 | 353 | cmx2xx_display = &generic_crt_640x480; |
3696a8a4 MR |
354 | break; |
355 | case MTYPE_CRT800x600: | |
da591937 | 356 | cmx2xx_display = &generic_crt_800x600; |
3696a8a4 MR |
357 | break; |
358 | case MTYPE_TFT320x240: | |
da591937 | 359 | cmx2xx_display = &generic_tft_320x240; |
3696a8a4 MR |
360 | break; |
361 | case MTYPE_STN640x480: | |
da591937 | 362 | cmx2xx_display = &generic_stn_640x480; |
3696a8a4 MR |
363 | break; |
364 | default: /* fallback to CRT 640x480 */ | |
da591937 | 365 | cmx2xx_display = &generic_crt_640x480; |
3696a8a4 MR |
366 | break; |
367 | } | |
368 | return 1; | |
369 | } | |
370 | ||
371 | /* | |
372 | This should be done really early to get proper configuration for | |
373 | frame buffer. | |
da591937 | 374 | Indeed, pxafb parameters can be used istead, but CM-X2XX bootloader |
3696a8a4 MR |
375 | has limitied line length for kernel command line, and also it will |
376 | break compatibitlty with proprietary releases already in field. | |
377 | */ | |
da591937 | 378 | __setup("monitor=", cmx2xx_set_display); |
3696a8a4 | 379 | |
da591937 | 380 | static void __init cmx2xx_init_display(void) |
2f01a973 | 381 | { |
4321e1a1 | 382 | pxa_set_fb_info(NULL, cmx2xx_display); |
2f01a973 MR |
383 | } |
384 | #else | |
da591937 | 385 | static inline void cmx2xx_init_display(void) {} |
2f01a973 MR |
386 | #endif |
387 | ||
3696a8a4 MR |
388 | #ifdef CONFIG_PM |
389 | static unsigned long sleep_save_msc[10]; | |
390 | ||
da591937 | 391 | static int cmx2xx_suspend(struct sys_device *dev, pm_message_t state) |
3696a8a4 | 392 | { |
da591937 | 393 | cmx2xx_pci_suspend(); |
3696a8a4 MR |
394 | |
395 | /* save MSC registers */ | |
ad68bb9f MV |
396 | sleep_save_msc[0] = __raw_readl(MSC0); |
397 | sleep_save_msc[1] = __raw_readl(MSC1); | |
398 | sleep_save_msc[2] = __raw_readl(MSC2); | |
3696a8a4 MR |
399 | |
400 | /* setup power saving mode registers */ | |
401 | PCFR = 0x0; | |
402 | PSLR = 0xff400000; | |
403 | PMCR = 0x00000005; | |
404 | PWER = 0x80000000; | |
405 | PFER = 0x00000000; | |
406 | PRER = 0x00000000; | |
407 | PGSR0 = 0xC0018800; | |
408 | PGSR1 = 0x004F0002; | |
409 | PGSR2 = 0x6021C000; | |
410 | PGSR3 = 0x00020000; | |
411 | ||
412 | return 0; | |
413 | } | |
414 | ||
da591937 | 415 | static int cmx2xx_resume(struct sys_device *dev) |
3696a8a4 | 416 | { |
da591937 | 417 | cmx2xx_pci_resume(); |
3696a8a4 MR |
418 | |
419 | /* restore MSC registers */ | |
ad68bb9f MV |
420 | __raw_writel(sleep_save_msc[0], MSC0); |
421 | __raw_writel(sleep_save_msc[1], MSC1); | |
422 | __raw_writel(sleep_save_msc[2], MSC2); | |
3696a8a4 MR |
423 | |
424 | return 0; | |
425 | } | |
426 | ||
da591937 | 427 | static struct sysdev_class cmx2xx_pm_sysclass = { |
af5ca3f4 | 428 | .name = "pm", |
da591937 MR |
429 | .resume = cmx2xx_resume, |
430 | .suspend = cmx2xx_suspend, | |
3696a8a4 MR |
431 | }; |
432 | ||
da591937 MR |
433 | static struct sys_device cmx2xx_pm_device = { |
434 | .cls = &cmx2xx_pm_sysclass, | |
3696a8a4 MR |
435 | }; |
436 | ||
da591937 | 437 | static int __init cmx2xx_pm_init(void) |
3696a8a4 MR |
438 | { |
439 | int error; | |
da591937 | 440 | error = sysdev_class_register(&cmx2xx_pm_sysclass); |
3696a8a4 | 441 | if (error == 0) |
da591937 | 442 | error = sysdev_register(&cmx2xx_pm_device); |
3696a8a4 MR |
443 | return error; |
444 | } | |
445 | #else | |
da591937 | 446 | static int __init cmx2xx_pm_init(void) { return 0; } |
3696a8a4 MR |
447 | #endif |
448 | ||
2f01a973 | 449 | #if defined(CONFIG_SND_PXA2XX_AC97) || defined(CONFIG_SND_PXA2XX_AC97_MODULE) |
da591937 | 450 | static void __init cmx2xx_init_ac97(void) |
3696a8a4 | 451 | { |
9f19d638 | 452 | pxa_set_ac97_info(NULL); |
2f01a973 MR |
453 | } |
454 | #else | |
da591937 | 455 | static inline void cmx2xx_init_ac97(void) {} |
2f01a973 | 456 | #endif |
3696a8a4 | 457 | |
da591937 MR |
458 | static void __init cmx2xx_init(void) |
459 | { | |
cc155c6f RK |
460 | pxa_set_ffuart_info(NULL); |
461 | pxa_set_btuart_info(NULL); | |
462 | pxa_set_stuart_info(NULL); | |
463 | ||
da591937 MR |
464 | cmx2xx_pm_init(); |
465 | ||
a7f3f030 MR |
466 | if (cpu_is_pxa25x()) |
467 | cmx255_init(); | |
468 | else | |
469 | cmx270_init(); | |
da591937 MR |
470 | |
471 | cmx2xx_init_dm9000(); | |
472 | cmx2xx_init_display(); | |
473 | cmx2xx_init_ac97(); | |
474 | cmx2xx_init_touchscreen(); | |
475 | cmx2xx_init_leds(); | |
476 | } | |
477 | ||
478 | static void __init cmx2xx_init_irq(void) | |
3696a8a4 | 479 | { |
a7f3f030 MR |
480 | if (cpu_is_pxa25x()) { |
481 | pxa25x_init_irq(); | |
482 | cmx2xx_pci_init_irq(CMX255_GPIO_IT8152_IRQ); | |
483 | } else { | |
484 | pxa27x_init_irq(); | |
485 | cmx2xx_pci_init_irq(CMX270_GPIO_IT8152_IRQ); | |
486 | } | |
2f01a973 | 487 | } |
3696a8a4 | 488 | |
2f01a973 MR |
489 | #ifdef CONFIG_PCI |
490 | /* Map PCI companion statically */ | |
da591937 | 491 | static struct map_desc cmx2xx_io_desc[] __initdata = { |
2f01a973 | 492 | [0] = { /* PCI bridge */ |
da591937 | 493 | .virtual = CMX2XX_IT8152_VIRT, |
2f01a973 MR |
494 | .pfn = __phys_to_pfn(PXA_CS4_PHYS), |
495 | .length = SZ_64M, | |
496 | .type = MT_DEVICE | |
497 | }, | |
498 | }; | |
3696a8a4 | 499 | |
da591937 | 500 | static void __init cmx2xx_map_io(void) |
2f01a973 | 501 | { |
851982c1 MV |
502 | if (cpu_is_pxa25x()) |
503 | pxa25x_map_io(); | |
504 | ||
505 | if (cpu_is_pxa27x()) | |
506 | pxa27x_map_io(); | |
507 | ||
da591937 | 508 | iotable_init(cmx2xx_io_desc, ARRAY_SIZE(cmx2xx_io_desc)); |
3696a8a4 | 509 | |
da591937 | 510 | it8152_base_address = CMX2XX_IT8152_VIRT; |
3696a8a4 | 511 | } |
2f01a973 | 512 | #else |
da591937 | 513 | static void __init cmx2xx_map_io(void) |
3696a8a4 | 514 | { |
851982c1 MV |
515 | if (cpu_is_pxa25x()) |
516 | pxa25x_map_io(); | |
517 | ||
518 | if (cpu_is_pxa27x()) | |
519 | pxa27x_map_io(); | |
3696a8a4 | 520 | } |
2f01a973 | 521 | #endif |
3696a8a4 | 522 | |
da591937 | 523 | MACHINE_START(ARMCORE, "Compulab CM-X2XX") |
3696a8a4 | 524 | .boot_params = 0xa0000100, |
da591937 | 525 | .map_io = cmx2xx_map_io, |
6ac6b817 | 526 | .nr_irqs = CMX2XX_NR_IRQS, |
da591937 | 527 | .init_irq = cmx2xx_init_irq, |
3696a8a4 | 528 | .timer = &pxa_timer, |
da591937 | 529 | .init_machine = cmx2xx_init, |
3696a8a4 | 530 | MACHINE_END |