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cf75d8d2 MR |
1 | /* |
2 | * linux/arch/arm/mach-pxa/cm-x300.c | |
3 | * | |
4 | * Support for the CompuLab CM-X300 modules | |
5 | * | |
14fd9e00 | 6 | * Copyright (C) 2008,2009 CompuLab Ltd. |
cf75d8d2 MR |
7 | * |
8 | * Mike Rapoport <mike@compulab.co.il> | |
14fd9e00 | 9 | * Igor Grinberg <grinberg@compulab.co.il> |
cf75d8d2 MR |
10 | * |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License version 2 as | |
13 | * published by the Free Software Foundation. | |
14 | */ | |
15 | ||
16 | #include <linux/module.h> | |
17 | #include <linux/kernel.h> | |
18 | #include <linux/interrupt.h> | |
19 | #include <linux/init.h> | |
b3d01da6 | 20 | #include <linux/delay.h> |
cf75d8d2 MR |
21 | #include <linux/platform_device.h> |
22 | ||
23 | #include <linux/gpio.h> | |
24 | #include <linux/dm9000.h> | |
25 | #include <linux/leds.h> | |
1858ced3 | 26 | #include <linux/rtc-v3020.h> |
db205463 | 27 | #include <linux/pwm_backlight.h> |
cf75d8d2 MR |
28 | |
29 | #include <linux/i2c.h> | |
30 | #include <linux/i2c/pca953x.h> | |
31 | ||
9c017ca1 IG |
32 | #include <linux/mfd/da903x.h> |
33 | ||
83e560ee IG |
34 | #include <linux/spi/spi.h> |
35 | #include <linux/spi/spi_gpio.h> | |
36 | #include <linux/spi/tdo24m.h> | |
37 | ||
cf75d8d2 MR |
38 | #include <asm/mach-types.h> |
39 | #include <asm/mach/arch.h> | |
b5a5c474 | 40 | #include <asm/setup.h> |
cf75d8d2 | 41 | |
51c62982 | 42 | #include <mach/pxa300.h> |
edaa64c9 | 43 | #include <mach/pxa27x-udc.h> |
cf75d8d2 MR |
44 | #include <mach/pxafb.h> |
45 | #include <mach/mmc.h> | |
46 | #include <mach/ohci.h> | |
f0a83701 | 47 | #include <plat/i2c.h> |
82b95ecb | 48 | #include <plat/pxa3xx_nand.h> |
74e74def | 49 | #include <mach/audio.h> |
cf75d8d2 MR |
50 | |
51 | #include <asm/mach/map.h> | |
52 | ||
53 | #include "generic.h" | |
db205463 | 54 | #include "devices.h" |
cf75d8d2 MR |
55 | |
56 | #define CM_X300_ETH_PHYS 0x08000010 | |
57 | ||
0bff2fc3 MR |
58 | #define GPIO82_MMC_IRQ (82) |
59 | #define GPIO85_MMC_WP (85) | |
cf75d8d2 | 60 | |
0bff2fc3 | 61 | #define CM_X300_MMC_IRQ IRQ_GPIO(GPIO82_MMC_IRQ) |
cf75d8d2 | 62 | |
1858ced3 MR |
63 | #define GPIO95_RTC_CS (95) |
64 | #define GPIO96_RTC_WR (96) | |
65 | #define GPIO97_RTC_RD (97) | |
66 | #define GPIO98_RTC_IO (98) | |
67 | ||
def8252d | 68 | static mfp_cfg_t cm_x3xx_mfp_cfg[] __initdata = { |
cf75d8d2 MR |
69 | /* LCD */ |
70 | GPIO54_LCD_LDD_0, | |
71 | GPIO55_LCD_LDD_1, | |
72 | GPIO56_LCD_LDD_2, | |
73 | GPIO57_LCD_LDD_3, | |
74 | GPIO58_LCD_LDD_4, | |
75 | GPIO59_LCD_LDD_5, | |
76 | GPIO60_LCD_LDD_6, | |
77 | GPIO61_LCD_LDD_7, | |
78 | GPIO62_LCD_LDD_8, | |
79 | GPIO63_LCD_LDD_9, | |
80 | GPIO64_LCD_LDD_10, | |
81 | GPIO65_LCD_LDD_11, | |
82 | GPIO66_LCD_LDD_12, | |
83 | GPIO67_LCD_LDD_13, | |
84 | GPIO68_LCD_LDD_14, | |
85 | GPIO69_LCD_LDD_15, | |
86 | GPIO72_LCD_FCLK, | |
87 | GPIO73_LCD_LCLK, | |
88 | GPIO74_LCD_PCLK, | |
89 | GPIO75_LCD_BIAS, | |
90 | ||
91 | /* BTUART */ | |
92 | GPIO111_UART2_RTS, | |
93 | GPIO112_UART2_RXD | MFP_LPM_EDGE_FALL, | |
94 | GPIO113_UART2_TXD, | |
95 | GPIO114_UART2_CTS | MFP_LPM_EDGE_BOTH, | |
96 | ||
97 | /* STUART */ | |
98 | GPIO109_UART3_TXD, | |
99 | GPIO110_UART3_RXD | MFP_LPM_EDGE_FALL, | |
100 | ||
101 | /* AC97 */ | |
102 | GPIO23_AC97_nACRESET, | |
103 | GPIO24_AC97_SYSCLK, | |
104 | GPIO29_AC97_BITCLK, | |
105 | GPIO25_AC97_SDATA_IN_0, | |
106 | GPIO27_AC97_SDATA_OUT, | |
107 | GPIO28_AC97_SYNC, | |
108 | ||
109 | /* Keypad */ | |
110 | GPIO115_KP_MKIN_0 | MFP_LPM_EDGE_BOTH, | |
111 | GPIO116_KP_MKIN_1 | MFP_LPM_EDGE_BOTH, | |
112 | GPIO117_KP_MKIN_2 | MFP_LPM_EDGE_BOTH, | |
113 | GPIO118_KP_MKIN_3 | MFP_LPM_EDGE_BOTH, | |
114 | GPIO119_KP_MKIN_4 | MFP_LPM_EDGE_BOTH, | |
115 | GPIO120_KP_MKIN_5 | MFP_LPM_EDGE_BOTH, | |
116 | GPIO2_2_KP_MKIN_6 | MFP_LPM_EDGE_BOTH, | |
117 | GPIO3_2_KP_MKIN_7 | MFP_LPM_EDGE_BOTH, | |
118 | GPIO121_KP_MKOUT_0, | |
119 | GPIO122_KP_MKOUT_1, | |
120 | GPIO123_KP_MKOUT_2, | |
121 | GPIO124_KP_MKOUT_3, | |
122 | GPIO125_KP_MKOUT_4, | |
123 | GPIO4_2_KP_MKOUT_5, | |
124 | ||
125 | /* MMC1 */ | |
126 | GPIO3_MMC1_DAT0, | |
127 | GPIO4_MMC1_DAT1 | MFP_LPM_EDGE_BOTH, | |
128 | GPIO5_MMC1_DAT2, | |
129 | GPIO6_MMC1_DAT3, | |
130 | GPIO7_MMC1_CLK, | |
131 | GPIO8_MMC1_CMD, /* CMD0 for slot 0 */ | |
132 | ||
133 | /* MMC2 */ | |
134 | GPIO9_MMC2_DAT0, | |
135 | GPIO10_MMC2_DAT1 | MFP_LPM_EDGE_BOTH, | |
136 | GPIO11_MMC2_DAT2, | |
137 | GPIO12_MMC2_DAT3, | |
138 | GPIO13_MMC2_CLK, | |
139 | GPIO14_MMC2_CMD, | |
140 | ||
141 | /* FFUART */ | |
142 | GPIO30_UART1_RXD | MFP_LPM_EDGE_FALL, | |
143 | GPIO31_UART1_TXD, | |
144 | GPIO32_UART1_CTS, | |
145 | GPIO37_UART1_RTS, | |
146 | GPIO33_UART1_DCD, | |
147 | GPIO34_UART1_DSR | MFP_LPM_EDGE_FALL, | |
148 | GPIO35_UART1_RI, | |
149 | GPIO36_UART1_DTR, | |
150 | ||
151 | /* GPIOs */ | |
cf75d8d2 MR |
152 | GPIO82_GPIO | MFP_PULL_HIGH, /* MMC CD */ |
153 | GPIO85_GPIO, /* MMC WP */ | |
154 | GPIO99_GPIO, /* Ethernet IRQ */ | |
6f584cfa | 155 | |
1858ced3 MR |
156 | /* RTC GPIOs */ |
157 | GPIO95_GPIO, /* RTC CS */ | |
158 | GPIO96_GPIO, /* RTC WR */ | |
159 | GPIO97_GPIO, /* RTC RD */ | |
160 | GPIO98_GPIO, /* RTC IO */ | |
161 | ||
6f584cfa EM |
162 | /* Standard I2C */ |
163 | GPIO21_I2C_SCL, | |
164 | GPIO22_I2C_SDA, | |
db205463 IG |
165 | |
166 | /* PWM Backlight */ | |
167 | GPIO19_PWM2_OUT, | |
cf75d8d2 MR |
168 | }; |
169 | ||
def8252d | 170 | static mfp_cfg_t cm_x3xx_rev_lt130_mfp_cfg[] __initdata = { |
55052ea2 IG |
171 | /* GPIOs */ |
172 | GPIO79_GPIO, /* LED */ | |
173 | GPIO77_GPIO, /* WiFi reset */ | |
174 | GPIO78_GPIO, /* BT reset */ | |
175 | }; | |
176 | ||
def8252d | 177 | static mfp_cfg_t cm_x3xx_rev_ge130_mfp_cfg[] __initdata = { |
55052ea2 IG |
178 | /* GPIOs */ |
179 | GPIO76_GPIO, /* LED */ | |
180 | GPIO71_GPIO, /* WiFi reset */ | |
181 | GPIO70_GPIO, /* BT reset */ | |
182 | }; | |
183 | ||
def8252d IG |
184 | static mfp_cfg_t cm_x310_mfp_cfg[] __initdata = { |
185 | /* USB PORT 2 */ | |
186 | ULPI_STP, | |
187 | ULPI_NXT, | |
188 | ULPI_DIR, | |
189 | GPIO30_ULPI_DATA_OUT_0, | |
190 | GPIO31_ULPI_DATA_OUT_1, | |
191 | GPIO32_ULPI_DATA_OUT_2, | |
192 | GPIO33_ULPI_DATA_OUT_3, | |
193 | GPIO34_ULPI_DATA_OUT_4, | |
194 | GPIO35_ULPI_DATA_OUT_5, | |
195 | GPIO36_ULPI_DATA_OUT_6, | |
196 | GPIO37_ULPI_DATA_OUT_7, | |
197 | GPIO38_ULPI_CLK, | |
198 | /* external PHY reset pin */ | |
199 | GPIO127_GPIO, | |
200 | ||
201 | /* USB PORT 3 */ | |
202 | GPIO77_USB_P3_1, | |
203 | GPIO78_USB_P3_2, | |
204 | GPIO79_USB_P3_3, | |
205 | GPIO80_USB_P3_4, | |
206 | GPIO81_USB_P3_5, | |
207 | GPIO82_USB_P3_6, | |
208 | GPIO0_2_USBH_PEN, | |
209 | }; | |
210 | ||
cf75d8d2 MR |
211 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) |
212 | static struct resource dm9000_resources[] = { | |
213 | [0] = { | |
214 | .start = CM_X300_ETH_PHYS, | |
215 | .end = CM_X300_ETH_PHYS + 0x3, | |
216 | .flags = IORESOURCE_MEM, | |
217 | }, | |
218 | [1] = { | |
219 | .start = CM_X300_ETH_PHYS + 0x4, | |
220 | .end = CM_X300_ETH_PHYS + 0x4 + 500, | |
221 | .flags = IORESOURCE_MEM, | |
222 | }, | |
223 | [2] = { | |
224 | .start = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO99)), | |
225 | .end = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO99)), | |
226 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, | |
227 | } | |
228 | }; | |
229 | ||
230 | static struct dm9000_plat_data cm_x300_dm9000_platdata = { | |
bff22c9b | 231 | .flags = DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM, |
cf75d8d2 MR |
232 | }; |
233 | ||
234 | static struct platform_device dm9000_device = { | |
235 | .name = "dm9000", | |
236 | .id = 0, | |
237 | .num_resources = ARRAY_SIZE(dm9000_resources), | |
238 | .resource = dm9000_resources, | |
239 | .dev = { | |
240 | .platform_data = &cm_x300_dm9000_platdata, | |
241 | } | |
242 | ||
243 | }; | |
244 | ||
245 | static void __init cm_x300_init_dm9000(void) | |
246 | { | |
247 | platform_device_register(&dm9000_device); | |
248 | } | |
249 | #else | |
250 | static inline void cm_x300_init_dm9000(void) {} | |
251 | #endif | |
252 | ||
83e560ee | 253 | /* LCD */ |
cf75d8d2 MR |
254 | #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) |
255 | static struct pxafb_mode_info cm_x300_lcd_modes[] = { | |
256 | [0] = { | |
83e560ee | 257 | .pixclock = 38250, |
cf75d8d2 MR |
258 | .bpp = 16, |
259 | .xres = 480, | |
260 | .yres = 640, | |
261 | .hsync_len = 8, | |
262 | .vsync_len = 2, | |
263 | .left_margin = 8, | |
83e560ee | 264 | .upper_margin = 2, |
cf75d8d2 MR |
265 | .right_margin = 24, |
266 | .lower_margin = 4, | |
267 | .cmap_greyscale = 0, | |
268 | }, | |
269 | [1] = { | |
270 | .pixclock = 153800, | |
271 | .bpp = 16, | |
272 | .xres = 240, | |
273 | .yres = 320, | |
274 | .hsync_len = 8, | |
275 | .vsync_len = 2, | |
276 | .left_margin = 8, | |
277 | .upper_margin = 2, | |
278 | .right_margin = 88, | |
279 | .lower_margin = 2, | |
280 | .cmap_greyscale = 0, | |
281 | }, | |
282 | }; | |
283 | ||
284 | static struct pxafb_mach_info cm_x300_lcd = { | |
285 | .modes = cm_x300_lcd_modes, | |
83e560ee | 286 | .num_modes = ARRAY_SIZE(cm_x300_lcd_modes), |
cf75d8d2 MR |
287 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, |
288 | }; | |
289 | ||
290 | static void __init cm_x300_init_lcd(void) | |
291 | { | |
292 | set_pxa_fb_info(&cm_x300_lcd); | |
293 | } | |
294 | #else | |
295 | static inline void cm_x300_init_lcd(void) {} | |
296 | #endif | |
297 | ||
db205463 IG |
298 | #if defined(CONFIG_BACKLIGHT_PWM) || defined(CONFIG_BACKLIGHT_PWM_MODULE) |
299 | static struct platform_pwm_backlight_data cm_x300_backlight_data = { | |
300 | .pwm_id = 2, | |
301 | .max_brightness = 100, | |
302 | .dft_brightness = 100, | |
303 | .pwm_period_ns = 10000, | |
304 | }; | |
305 | ||
306 | static struct platform_device cm_x300_backlight_device = { | |
307 | .name = "pwm-backlight", | |
308 | .dev = { | |
309 | .parent = &pxa27x_device_pwm0.dev, | |
310 | .platform_data = &cm_x300_backlight_data, | |
311 | }, | |
312 | }; | |
313 | ||
314 | static void cm_x300_init_bl(void) | |
315 | { | |
316 | platform_device_register(&cm_x300_backlight_device); | |
317 | } | |
318 | #else | |
319 | static inline void cm_x300_init_bl(void) {} | |
320 | #endif | |
321 | ||
83e560ee IG |
322 | #if defined(CONFIG_SPI_GPIO) || defined(CONFIG_SPI_GPIO_MODULE) |
323 | #define GPIO_LCD_BASE (144) | |
324 | #define GPIO_LCD_DIN (GPIO_LCD_BASE + 8) /* aux_gpio3_0 */ | |
325 | #define GPIO_LCD_DOUT (GPIO_LCD_BASE + 9) /* aux_gpio3_1 */ | |
326 | #define GPIO_LCD_SCL (GPIO_LCD_BASE + 10) /* aux_gpio3_2 */ | |
327 | #define GPIO_LCD_CS (GPIO_LCD_BASE + 11) /* aux_gpio3_3 */ | |
328 | #define LCD_SPI_BUS_NUM (1) | |
329 | ||
330 | static struct spi_gpio_platform_data cm_x300_spi_gpio_pdata = { | |
331 | .sck = GPIO_LCD_SCL, | |
332 | .mosi = GPIO_LCD_DIN, | |
333 | .miso = GPIO_LCD_DOUT, | |
334 | .num_chipselect = 1, | |
335 | }; | |
336 | ||
337 | static struct platform_device cm_x300_spi_gpio = { | |
338 | .name = "spi_gpio", | |
339 | .id = LCD_SPI_BUS_NUM, | |
340 | .dev = { | |
341 | .platform_data = &cm_x300_spi_gpio_pdata, | |
342 | }, | |
343 | }; | |
344 | ||
345 | static struct tdo24m_platform_data cm_x300_tdo24m_pdata = { | |
346 | .model = TDO35S, | |
347 | }; | |
348 | ||
349 | static struct spi_board_info cm_x300_spi_devices[] __initdata = { | |
350 | { | |
351 | .modalias = "tdo24m", | |
352 | .max_speed_hz = 1000000, | |
353 | .bus_num = LCD_SPI_BUS_NUM, | |
354 | .chip_select = 0, | |
355 | .controller_data = (void *) GPIO_LCD_CS, | |
356 | .platform_data = &cm_x300_tdo24m_pdata, | |
357 | }, | |
358 | }; | |
359 | ||
360 | static void __init cm_x300_init_spi(void) | |
361 | { | |
362 | spi_register_board_info(cm_x300_spi_devices, | |
363 | ARRAY_SIZE(cm_x300_spi_devices)); | |
364 | platform_device_register(&cm_x300_spi_gpio); | |
365 | } | |
366 | #else | |
367 | static inline void cm_x300_init_spi(void) {} | |
368 | #endif | |
369 | ||
74e74def IG |
370 | #if defined(CONFIG_SND_PXA2XX_LIB_AC97) |
371 | static void __init cm_x300_init_ac97(void) | |
372 | { | |
373 | pxa_set_ac97_info(NULL); | |
374 | } | |
375 | #else | |
376 | static inline void cm_x300_init_ac97(void) {} | |
377 | #endif | |
378 | ||
cf75d8d2 MR |
379 | #if defined(CONFIG_MTD_NAND_PXA3xx) || defined(CONFIG_MTD_NAND_PXA3xx_MODULE) |
380 | static struct mtd_partition cm_x300_nand_partitions[] = { | |
381 | [0] = { | |
382 | .name = "OBM", | |
383 | .offset = 0, | |
384 | .size = SZ_256K, | |
385 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
386 | }, | |
387 | [1] = { | |
388 | .name = "U-Boot", | |
389 | .offset = MTDPART_OFS_APPEND, | |
390 | .size = SZ_256K, | |
391 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
392 | }, | |
393 | [2] = { | |
394 | .name = "Environment", | |
395 | .offset = MTDPART_OFS_APPEND, | |
396 | .size = SZ_256K, | |
397 | }, | |
398 | [3] = { | |
399 | .name = "reserved", | |
400 | .offset = MTDPART_OFS_APPEND, | |
401 | .size = SZ_256K + SZ_1M, | |
402 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
403 | }, | |
404 | [4] = { | |
405 | .name = "kernel", | |
406 | .offset = MTDPART_OFS_APPEND, | |
407 | .size = SZ_4M, | |
408 | }, | |
409 | [5] = { | |
410 | .name = "fs", | |
411 | .offset = MTDPART_OFS_APPEND, | |
412 | .size = MTDPART_SIZ_FULL, | |
413 | }, | |
414 | }; | |
415 | ||
416 | static struct pxa3xx_nand_platform_data cm_x300_nand_info = { | |
417 | .enable_arbiter = 1, | |
b3992b66 | 418 | .keep_config = 1, |
cf75d8d2 MR |
419 | .parts = cm_x300_nand_partitions, |
420 | .nr_parts = ARRAY_SIZE(cm_x300_nand_partitions), | |
421 | }; | |
422 | ||
423 | static void __init cm_x300_init_nand(void) | |
424 | { | |
425 | pxa3xx_set_nand_info(&cm_x300_nand_info); | |
426 | } | |
427 | #else | |
428 | static inline void cm_x300_init_nand(void) {} | |
429 | #endif | |
430 | ||
431 | #if defined(CONFIG_MMC) || defined(CONFIG_MMC_MODULE) | |
0bff2fc3 MR |
432 | static struct pxamci_platform_data cm_x300_mci_platform_data = { |
433 | .detect_delay = 20, | |
434 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, | |
435 | .gpio_card_detect = GPIO82_MMC_IRQ, | |
436 | .gpio_card_ro = GPIO85_MMC_WP, | |
437 | .gpio_power = -1, | |
438 | }; | |
439 | ||
440 | /* The second MMC slot of CM-X300 is hardwired to Libertas card and has | |
cf75d8d2 | 441 | no detection/ro pins */ |
0bff2fc3 MR |
442 | static int cm_x300_mci2_init(struct device *dev, |
443 | irq_handler_t cm_x300_detect_int, | |
444 | void *data) | |
cf75d8d2 MR |
445 | { |
446 | return 0; | |
447 | } | |
448 | ||
0bff2fc3 | 449 | static void cm_x300_mci2_exit(struct device *dev, void *data) |
cf75d8d2 MR |
450 | { |
451 | } | |
452 | ||
0bff2fc3 | 453 | static struct pxamci_platform_data cm_x300_mci2_platform_data = { |
7a648256 RJ |
454 | .detect_delay = 20, |
455 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, | |
0bff2fc3 MR |
456 | .init = cm_x300_mci2_init, |
457 | .exit = cm_x300_mci2_exit, | |
7a648256 RJ |
458 | .gpio_card_detect = -1, |
459 | .gpio_card_ro = -1, | |
460 | .gpio_power = -1, | |
cf75d8d2 MR |
461 | }; |
462 | ||
cf75d8d2 MR |
463 | static void __init cm_x300_init_mmc(void) |
464 | { | |
465 | pxa_set_mci_info(&cm_x300_mci_platform_data); | |
466 | pxa3xx_set_mci2_info(&cm_x300_mci2_platform_data); | |
467 | } | |
468 | #else | |
469 | static inline void cm_x300_init_mmc(void) {} | |
470 | #endif | |
471 | ||
472 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) | |
edaa64c9 IG |
473 | static int cm_x300_ohci_init(struct device *dev) |
474 | { | |
475 | if (cpu_is_pxa300()) | |
476 | UP2OCR = UP2OCR_HXS | |
477 | | UP2OCR_HXOE | UP2OCR_DMPDE | UP2OCR_DPPDE; | |
478 | ||
479 | return 0; | |
480 | } | |
481 | ||
cf75d8d2 MR |
482 | static struct pxaohci_platform_data cm_x300_ohci_platform_data = { |
483 | .port_mode = PMM_PERPORT_MODE, | |
edaa64c9 IG |
484 | .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW, |
485 | .init = cm_x300_ohci_init, | |
cf75d8d2 | 486 | }; |
097b5334 | 487 | |
cf75d8d2 MR |
488 | static void __init cm_x300_init_ohci(void) |
489 | { | |
490 | pxa_set_ohci_info(&cm_x300_ohci_platform_data); | |
491 | } | |
492 | #else | |
493 | static inline void cm_x300_init_ohci(void) {} | |
494 | #endif | |
495 | ||
496 | #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) | |
497 | static struct gpio_led cm_x300_leds[] = { | |
498 | [0] = { | |
499 | .name = "cm-x300:green", | |
500 | .default_trigger = "heartbeat", | |
cf75d8d2 MR |
501 | .active_low = 1, |
502 | }, | |
503 | }; | |
504 | ||
505 | static struct gpio_led_platform_data cm_x300_gpio_led_pdata = { | |
506 | .num_leds = ARRAY_SIZE(cm_x300_leds), | |
507 | .leds = cm_x300_leds, | |
508 | }; | |
509 | ||
510 | static struct platform_device cm_x300_led_device = { | |
511 | .name = "leds-gpio", | |
512 | .id = -1, | |
513 | .dev = { | |
514 | .platform_data = &cm_x300_gpio_led_pdata, | |
515 | }, | |
516 | }; | |
517 | ||
518 | static void __init cm_x300_init_leds(void) | |
519 | { | |
55052ea2 IG |
520 | if (system_rev < 130) |
521 | cm_x300_leds[0].gpio = 79; | |
522 | else | |
523 | cm_x300_leds[0].gpio = 76; | |
524 | ||
cf75d8d2 MR |
525 | platform_device_register(&cm_x300_led_device); |
526 | } | |
527 | #else | |
528 | static inline void cm_x300_init_leds(void) {} | |
529 | #endif | |
530 | ||
531 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | |
532 | /* PCA9555 */ | |
533 | static struct pca953x_platform_data cm_x300_gpio_ext_pdata_0 = { | |
534 | .gpio_base = 128, | |
535 | }; | |
536 | ||
537 | static struct pca953x_platform_data cm_x300_gpio_ext_pdata_1 = { | |
538 | .gpio_base = 144, | |
539 | }; | |
540 | ||
541 | static struct i2c_board_info cm_x300_gpio_ext_info[] = { | |
542 | [0] = { | |
543 | I2C_BOARD_INFO("pca9555", 0x24), | |
544 | .platform_data = &cm_x300_gpio_ext_pdata_0, | |
545 | }, | |
546 | [1] = { | |
547 | I2C_BOARD_INFO("pca9555", 0x25), | |
548 | .platform_data = &cm_x300_gpio_ext_pdata_1, | |
549 | }, | |
550 | }; | |
551 | ||
552 | static void __init cm_x300_init_i2c(void) | |
553 | { | |
554 | pxa_set_i2c_info(NULL); | |
555 | i2c_register_board_info(0, cm_x300_gpio_ext_info, | |
556 | ARRAY_SIZE(cm_x300_gpio_ext_info)); | |
557 | } | |
558 | #else | |
559 | static inline void cm_x300_init_i2c(void) {} | |
560 | #endif | |
561 | ||
1858ced3 MR |
562 | #if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE) |
563 | struct v3020_platform_data cm_x300_v3020_pdata = { | |
564 | .use_gpio = 1, | |
565 | .gpio_cs = GPIO95_RTC_CS, | |
566 | .gpio_wr = GPIO96_RTC_WR, | |
567 | .gpio_rd = GPIO97_RTC_RD, | |
568 | .gpio_io = GPIO98_RTC_IO, | |
569 | }; | |
570 | ||
571 | static struct platform_device cm_x300_rtc_device = { | |
572 | .name = "v3020", | |
573 | .id = -1, | |
574 | .dev = { | |
575 | .platform_data = &cm_x300_v3020_pdata, | |
576 | } | |
577 | }; | |
578 | ||
579 | static void __init cm_x300_init_rtc(void) | |
580 | { | |
581 | platform_device_register(&cm_x300_rtc_device); | |
582 | } | |
583 | #else | |
584 | static inline void cm_x300_init_rtc(void) {} | |
585 | #endif | |
586 | ||
9c017ca1 IG |
587 | /* DA9030 */ |
588 | struct da903x_subdev_info cm_x300_da9030_subdevs[] = { | |
589 | { | |
590 | .name = "da903x-backlight", | |
591 | .id = DA9030_ID_WLED, | |
592 | } | |
593 | }; | |
594 | ||
595 | static struct da903x_platform_data cm_x300_da9030_info = { | |
596 | .num_subdevs = ARRAY_SIZE(cm_x300_da9030_subdevs), | |
597 | .subdevs = cm_x300_da9030_subdevs, | |
598 | }; | |
599 | ||
600 | static struct i2c_board_info cm_x300_pmic_info = { | |
601 | I2C_BOARD_INFO("da9030", 0x49), | |
602 | .irq = IRQ_GPIO(0), | |
603 | .platform_data = &cm_x300_da9030_info, | |
604 | }; | |
605 | ||
606 | static struct i2c_pxa_platform_data cm_x300_pwr_i2c_info = { | |
607 | .use_pio = 1, | |
608 | }; | |
609 | ||
610 | static void __init cm_x300_init_da9030(void) | |
611 | { | |
612 | pxa3xx_set_i2c_power_info(&cm_x300_pwr_i2c_info); | |
613 | i2c_register_board_info(1, &cm_x300_pmic_info, 1); | |
614 | } | |
615 | ||
b3d01da6 IG |
616 | static void __init cm_x300_init_wi2wi(void) |
617 | { | |
618 | int bt_reset, wlan_en; | |
619 | int err; | |
620 | ||
621 | if (system_rev < 130) { | |
622 | wlan_en = 77; | |
623 | bt_reset = 78; | |
624 | } else { | |
625 | wlan_en = 71; | |
626 | bt_reset = 70; | |
627 | } | |
628 | ||
629 | /* Libertas and CSR reset */ | |
630 | err = gpio_request(wlan_en, "wlan en"); | |
631 | if (err) { | |
632 | pr_err("CM-X300: failed to request wlan en gpio: %d\n", err); | |
633 | } else { | |
634 | gpio_direction_output(wlan_en, 1); | |
635 | gpio_free(wlan_en); | |
636 | } | |
637 | ||
638 | err = gpio_request(bt_reset, "bt reset"); | |
639 | if (err) { | |
640 | pr_err("CM-X300: failed to request bt reset gpio: %d\n", err); | |
641 | } else { | |
642 | gpio_direction_output(bt_reset, 1); | |
643 | udelay(10); | |
644 | gpio_set_value(bt_reset, 0); | |
645 | udelay(10); | |
646 | gpio_set_value(bt_reset, 1); | |
647 | gpio_free(bt_reset); | |
648 | } | |
649 | } | |
650 | ||
651 | /* MFP */ | |
55052ea2 | 652 | static void __init cm_x300_init_mfp(void) |
cf75d8d2 MR |
653 | { |
654 | /* board-processor specific GPIO initialization */ | |
def8252d | 655 | pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x3xx_mfp_cfg)); |
cf75d8d2 | 656 | |
55052ea2 | 657 | if (system_rev < 130) |
def8252d | 658 | pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x3xx_rev_lt130_mfp_cfg)); |
55052ea2 | 659 | else |
def8252d IG |
660 | pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x3xx_rev_ge130_mfp_cfg)); |
661 | ||
662 | if (cpu_is_pxa310()) | |
663 | pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x310_mfp_cfg)); | |
55052ea2 IG |
664 | } |
665 | ||
666 | static void __init cm_x300_init(void) | |
667 | { | |
668 | cm_x300_init_mfp(); | |
669 | ||
cc155c6f RK |
670 | pxa_set_ffuart_info(NULL); |
671 | pxa_set_btuart_info(NULL); | |
672 | pxa_set_stuart_info(NULL); | |
673 | ||
9c017ca1 | 674 | cm_x300_init_da9030(); |
cf75d8d2 MR |
675 | cm_x300_init_dm9000(); |
676 | cm_x300_init_lcd(); | |
677 | cm_x300_init_ohci(); | |
678 | cm_x300_init_mmc(); | |
679 | cm_x300_init_nand(); | |
680 | cm_x300_init_leds(); | |
681 | cm_x300_init_i2c(); | |
83e560ee | 682 | cm_x300_init_spi(); |
1858ced3 | 683 | cm_x300_init_rtc(); |
74e74def | 684 | cm_x300_init_ac97(); |
b3d01da6 | 685 | cm_x300_init_wi2wi(); |
db205463 | 686 | cm_x300_init_bl(); |
cf75d8d2 MR |
687 | } |
688 | ||
b5a5c474 MR |
689 | static void __init cm_x300_fixup(struct machine_desc *mdesc, struct tag *tags, |
690 | char **cmdline, struct meminfo *mi) | |
691 | { | |
692 | mi->nr_banks = 2; | |
693 | mi->bank[0].start = 0xa0000000; | |
694 | mi->bank[0].node = 0; | |
695 | mi->bank[0].size = (64*1024*1024); | |
696 | mi->bank[1].start = 0xc0000000; | |
697 | mi->bank[1].node = 0; | |
698 | mi->bank[1].size = (64*1024*1024); | |
699 | } | |
700 | ||
cf75d8d2 MR |
701 | MACHINE_START(CM_X300, "CM-X300 module") |
702 | .phys_io = 0x40000000, | |
703 | .boot_params = 0xa0000100, | |
704 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | |
705 | .map_io = pxa_map_io, | |
706 | .init_irq = pxa3xx_init_irq, | |
707 | .timer = &pxa_timer, | |
708 | .init_machine = cm_x300_init, | |
b5a5c474 | 709 | .fixup = cm_x300_fixup, |
cf75d8d2 | 710 | MACHINE_END |