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cf75d8d2 MR |
1 | /* |
2 | * linux/arch/arm/mach-pxa/cm-x300.c | |
3 | * | |
4 | * Support for the CompuLab CM-X300 modules | |
5 | * | |
6 | * Copyright (C) 2008 CompuLab Ltd. | |
7 | * | |
8 | * Mike Rapoport <mike@compulab.co.il> | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | */ | |
14 | ||
15 | #include <linux/module.h> | |
16 | #include <linux/kernel.h> | |
17 | #include <linux/interrupt.h> | |
18 | #include <linux/init.h> | |
19 | #include <linux/platform_device.h> | |
20 | ||
21 | #include <linux/gpio.h> | |
22 | #include <linux/dm9000.h> | |
23 | #include <linux/leds.h> | |
1858ced3 | 24 | #include <linux/rtc-v3020.h> |
cf75d8d2 MR |
25 | |
26 | #include <linux/i2c.h> | |
27 | #include <linux/i2c/pca953x.h> | |
28 | ||
29 | #include <asm/mach-types.h> | |
30 | #include <asm/mach/arch.h> | |
b5a5c474 | 31 | #include <asm/setup.h> |
cf75d8d2 | 32 | |
51c62982 | 33 | #include <mach/pxa300.h> |
cf75d8d2 MR |
34 | #include <mach/pxafb.h> |
35 | #include <mach/mmc.h> | |
36 | #include <mach/ohci.h> | |
f0a83701 | 37 | #include <plat/i2c.h> |
82b95ecb | 38 | #include <plat/pxa3xx_nand.h> |
cf75d8d2 MR |
39 | |
40 | #include <asm/mach/map.h> | |
41 | ||
42 | #include "generic.h" | |
43 | ||
44 | #define CM_X300_ETH_PHYS 0x08000010 | |
45 | ||
0bff2fc3 MR |
46 | #define GPIO82_MMC_IRQ (82) |
47 | #define GPIO85_MMC_WP (85) | |
cf75d8d2 | 48 | |
0bff2fc3 | 49 | #define CM_X300_MMC_IRQ IRQ_GPIO(GPIO82_MMC_IRQ) |
cf75d8d2 | 50 | |
1858ced3 MR |
51 | #define GPIO95_RTC_CS (95) |
52 | #define GPIO96_RTC_WR (96) | |
53 | #define GPIO97_RTC_RD (97) | |
54 | #define GPIO98_RTC_IO (98) | |
55 | ||
cf75d8d2 MR |
56 | static mfp_cfg_t cm_x300_mfp_cfg[] __initdata = { |
57 | /* LCD */ | |
58 | GPIO54_LCD_LDD_0, | |
59 | GPIO55_LCD_LDD_1, | |
60 | GPIO56_LCD_LDD_2, | |
61 | GPIO57_LCD_LDD_3, | |
62 | GPIO58_LCD_LDD_4, | |
63 | GPIO59_LCD_LDD_5, | |
64 | GPIO60_LCD_LDD_6, | |
65 | GPIO61_LCD_LDD_7, | |
66 | GPIO62_LCD_LDD_8, | |
67 | GPIO63_LCD_LDD_9, | |
68 | GPIO64_LCD_LDD_10, | |
69 | GPIO65_LCD_LDD_11, | |
70 | GPIO66_LCD_LDD_12, | |
71 | GPIO67_LCD_LDD_13, | |
72 | GPIO68_LCD_LDD_14, | |
73 | GPIO69_LCD_LDD_15, | |
74 | GPIO72_LCD_FCLK, | |
75 | GPIO73_LCD_LCLK, | |
76 | GPIO74_LCD_PCLK, | |
77 | GPIO75_LCD_BIAS, | |
78 | ||
79 | /* BTUART */ | |
80 | GPIO111_UART2_RTS, | |
81 | GPIO112_UART2_RXD | MFP_LPM_EDGE_FALL, | |
82 | GPIO113_UART2_TXD, | |
83 | GPIO114_UART2_CTS | MFP_LPM_EDGE_BOTH, | |
84 | ||
85 | /* STUART */ | |
86 | GPIO109_UART3_TXD, | |
87 | GPIO110_UART3_RXD | MFP_LPM_EDGE_FALL, | |
88 | ||
89 | /* AC97 */ | |
90 | GPIO23_AC97_nACRESET, | |
91 | GPIO24_AC97_SYSCLK, | |
92 | GPIO29_AC97_BITCLK, | |
93 | GPIO25_AC97_SDATA_IN_0, | |
94 | GPIO27_AC97_SDATA_OUT, | |
95 | GPIO28_AC97_SYNC, | |
96 | ||
97 | /* Keypad */ | |
98 | GPIO115_KP_MKIN_0 | MFP_LPM_EDGE_BOTH, | |
99 | GPIO116_KP_MKIN_1 | MFP_LPM_EDGE_BOTH, | |
100 | GPIO117_KP_MKIN_2 | MFP_LPM_EDGE_BOTH, | |
101 | GPIO118_KP_MKIN_3 | MFP_LPM_EDGE_BOTH, | |
102 | GPIO119_KP_MKIN_4 | MFP_LPM_EDGE_BOTH, | |
103 | GPIO120_KP_MKIN_5 | MFP_LPM_EDGE_BOTH, | |
104 | GPIO2_2_KP_MKIN_6 | MFP_LPM_EDGE_BOTH, | |
105 | GPIO3_2_KP_MKIN_7 | MFP_LPM_EDGE_BOTH, | |
106 | GPIO121_KP_MKOUT_0, | |
107 | GPIO122_KP_MKOUT_1, | |
108 | GPIO123_KP_MKOUT_2, | |
109 | GPIO124_KP_MKOUT_3, | |
110 | GPIO125_KP_MKOUT_4, | |
111 | GPIO4_2_KP_MKOUT_5, | |
112 | ||
113 | /* MMC1 */ | |
114 | GPIO3_MMC1_DAT0, | |
115 | GPIO4_MMC1_DAT1 | MFP_LPM_EDGE_BOTH, | |
116 | GPIO5_MMC1_DAT2, | |
117 | GPIO6_MMC1_DAT3, | |
118 | GPIO7_MMC1_CLK, | |
119 | GPIO8_MMC1_CMD, /* CMD0 for slot 0 */ | |
120 | ||
121 | /* MMC2 */ | |
122 | GPIO9_MMC2_DAT0, | |
123 | GPIO10_MMC2_DAT1 | MFP_LPM_EDGE_BOTH, | |
124 | GPIO11_MMC2_DAT2, | |
125 | GPIO12_MMC2_DAT3, | |
126 | GPIO13_MMC2_CLK, | |
127 | GPIO14_MMC2_CMD, | |
128 | ||
129 | /* FFUART */ | |
130 | GPIO30_UART1_RXD | MFP_LPM_EDGE_FALL, | |
131 | GPIO31_UART1_TXD, | |
132 | GPIO32_UART1_CTS, | |
133 | GPIO37_UART1_RTS, | |
134 | GPIO33_UART1_DCD, | |
135 | GPIO34_UART1_DSR | MFP_LPM_EDGE_FALL, | |
136 | GPIO35_UART1_RI, | |
137 | GPIO36_UART1_DTR, | |
138 | ||
139 | /* GPIOs */ | |
cf75d8d2 MR |
140 | GPIO82_GPIO | MFP_PULL_HIGH, /* MMC CD */ |
141 | GPIO85_GPIO, /* MMC WP */ | |
142 | GPIO99_GPIO, /* Ethernet IRQ */ | |
6f584cfa | 143 | |
1858ced3 MR |
144 | /* RTC GPIOs */ |
145 | GPIO95_GPIO, /* RTC CS */ | |
146 | GPIO96_GPIO, /* RTC WR */ | |
147 | GPIO97_GPIO, /* RTC RD */ | |
148 | GPIO98_GPIO, /* RTC IO */ | |
149 | ||
6f584cfa EM |
150 | /* Standard I2C */ |
151 | GPIO21_I2C_SCL, | |
152 | GPIO22_I2C_SDA, | |
cf75d8d2 MR |
153 | }; |
154 | ||
55052ea2 IG |
155 | static mfp_cfg_t cm_x300_rev_lt130_mfp_cfg[] __initdata = { |
156 | /* GPIOs */ | |
157 | GPIO79_GPIO, /* LED */ | |
158 | GPIO77_GPIO, /* WiFi reset */ | |
159 | GPIO78_GPIO, /* BT reset */ | |
160 | }; | |
161 | ||
162 | static mfp_cfg_t cm_x300_rev_ge130_mfp_cfg[] __initdata = { | |
163 | /* GPIOs */ | |
164 | GPIO76_GPIO, /* LED */ | |
165 | GPIO71_GPIO, /* WiFi reset */ | |
166 | GPIO70_GPIO, /* BT reset */ | |
167 | }; | |
168 | ||
cf75d8d2 MR |
169 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) |
170 | static struct resource dm9000_resources[] = { | |
171 | [0] = { | |
172 | .start = CM_X300_ETH_PHYS, | |
173 | .end = CM_X300_ETH_PHYS + 0x3, | |
174 | .flags = IORESOURCE_MEM, | |
175 | }, | |
176 | [1] = { | |
177 | .start = CM_X300_ETH_PHYS + 0x4, | |
178 | .end = CM_X300_ETH_PHYS + 0x4 + 500, | |
179 | .flags = IORESOURCE_MEM, | |
180 | }, | |
181 | [2] = { | |
182 | .start = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO99)), | |
183 | .end = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO99)), | |
184 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, | |
185 | } | |
186 | }; | |
187 | ||
188 | static struct dm9000_plat_data cm_x300_dm9000_platdata = { | |
bff22c9b | 189 | .flags = DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM, |
cf75d8d2 MR |
190 | }; |
191 | ||
192 | static struct platform_device dm9000_device = { | |
193 | .name = "dm9000", | |
194 | .id = 0, | |
195 | .num_resources = ARRAY_SIZE(dm9000_resources), | |
196 | .resource = dm9000_resources, | |
197 | .dev = { | |
198 | .platform_data = &cm_x300_dm9000_platdata, | |
199 | } | |
200 | ||
201 | }; | |
202 | ||
203 | static void __init cm_x300_init_dm9000(void) | |
204 | { | |
205 | platform_device_register(&dm9000_device); | |
206 | } | |
207 | #else | |
208 | static inline void cm_x300_init_dm9000(void) {} | |
209 | #endif | |
210 | ||
211 | #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) | |
212 | static struct pxafb_mode_info cm_x300_lcd_modes[] = { | |
213 | [0] = { | |
214 | .pixclock = 38000, | |
215 | .bpp = 16, | |
216 | .xres = 480, | |
217 | .yres = 640, | |
218 | .hsync_len = 8, | |
219 | .vsync_len = 2, | |
220 | .left_margin = 8, | |
221 | .upper_margin = 0, | |
222 | .right_margin = 24, | |
223 | .lower_margin = 4, | |
224 | .cmap_greyscale = 0, | |
225 | }, | |
226 | [1] = { | |
227 | .pixclock = 153800, | |
228 | .bpp = 16, | |
229 | .xres = 240, | |
230 | .yres = 320, | |
231 | .hsync_len = 8, | |
232 | .vsync_len = 2, | |
233 | .left_margin = 8, | |
234 | .upper_margin = 2, | |
235 | .right_margin = 88, | |
236 | .lower_margin = 2, | |
237 | .cmap_greyscale = 0, | |
238 | }, | |
239 | }; | |
240 | ||
241 | static struct pxafb_mach_info cm_x300_lcd = { | |
242 | .modes = cm_x300_lcd_modes, | |
243 | .num_modes = 2, | |
244 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, | |
245 | }; | |
246 | ||
247 | static void __init cm_x300_init_lcd(void) | |
248 | { | |
249 | set_pxa_fb_info(&cm_x300_lcd); | |
250 | } | |
251 | #else | |
252 | static inline void cm_x300_init_lcd(void) {} | |
253 | #endif | |
254 | ||
255 | #if defined(CONFIG_MTD_NAND_PXA3xx) || defined(CONFIG_MTD_NAND_PXA3xx_MODULE) | |
256 | static struct mtd_partition cm_x300_nand_partitions[] = { | |
257 | [0] = { | |
258 | .name = "OBM", | |
259 | .offset = 0, | |
260 | .size = SZ_256K, | |
261 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
262 | }, | |
263 | [1] = { | |
264 | .name = "U-Boot", | |
265 | .offset = MTDPART_OFS_APPEND, | |
266 | .size = SZ_256K, | |
267 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
268 | }, | |
269 | [2] = { | |
270 | .name = "Environment", | |
271 | .offset = MTDPART_OFS_APPEND, | |
272 | .size = SZ_256K, | |
273 | }, | |
274 | [3] = { | |
275 | .name = "reserved", | |
276 | .offset = MTDPART_OFS_APPEND, | |
277 | .size = SZ_256K + SZ_1M, | |
278 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
279 | }, | |
280 | [4] = { | |
281 | .name = "kernel", | |
282 | .offset = MTDPART_OFS_APPEND, | |
283 | .size = SZ_4M, | |
284 | }, | |
285 | [5] = { | |
286 | .name = "fs", | |
287 | .offset = MTDPART_OFS_APPEND, | |
288 | .size = MTDPART_SIZ_FULL, | |
289 | }, | |
290 | }; | |
291 | ||
292 | static struct pxa3xx_nand_platform_data cm_x300_nand_info = { | |
293 | .enable_arbiter = 1, | |
b3992b66 | 294 | .keep_config = 1, |
cf75d8d2 MR |
295 | .parts = cm_x300_nand_partitions, |
296 | .nr_parts = ARRAY_SIZE(cm_x300_nand_partitions), | |
297 | }; | |
298 | ||
299 | static void __init cm_x300_init_nand(void) | |
300 | { | |
301 | pxa3xx_set_nand_info(&cm_x300_nand_info); | |
302 | } | |
303 | #else | |
304 | static inline void cm_x300_init_nand(void) {} | |
305 | #endif | |
306 | ||
307 | #if defined(CONFIG_MMC) || defined(CONFIG_MMC_MODULE) | |
0bff2fc3 MR |
308 | static struct pxamci_platform_data cm_x300_mci_platform_data = { |
309 | .detect_delay = 20, | |
310 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, | |
311 | .gpio_card_detect = GPIO82_MMC_IRQ, | |
312 | .gpio_card_ro = GPIO85_MMC_WP, | |
313 | .gpio_power = -1, | |
314 | }; | |
315 | ||
316 | /* The second MMC slot of CM-X300 is hardwired to Libertas card and has | |
cf75d8d2 | 317 | no detection/ro pins */ |
0bff2fc3 MR |
318 | static int cm_x300_mci2_init(struct device *dev, |
319 | irq_handler_t cm_x300_detect_int, | |
320 | void *data) | |
cf75d8d2 MR |
321 | { |
322 | return 0; | |
323 | } | |
324 | ||
0bff2fc3 | 325 | static void cm_x300_mci2_exit(struct device *dev, void *data) |
cf75d8d2 MR |
326 | { |
327 | } | |
328 | ||
0bff2fc3 | 329 | static struct pxamci_platform_data cm_x300_mci2_platform_data = { |
7a648256 RJ |
330 | .detect_delay = 20, |
331 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, | |
0bff2fc3 MR |
332 | .init = cm_x300_mci2_init, |
333 | .exit = cm_x300_mci2_exit, | |
7a648256 RJ |
334 | .gpio_card_detect = -1, |
335 | .gpio_card_ro = -1, | |
336 | .gpio_power = -1, | |
cf75d8d2 MR |
337 | }; |
338 | ||
cf75d8d2 MR |
339 | static void __init cm_x300_init_mmc(void) |
340 | { | |
341 | pxa_set_mci_info(&cm_x300_mci_platform_data); | |
342 | pxa3xx_set_mci2_info(&cm_x300_mci2_platform_data); | |
343 | } | |
344 | #else | |
345 | static inline void cm_x300_init_mmc(void) {} | |
346 | #endif | |
347 | ||
348 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) | |
cf75d8d2 MR |
349 | static struct pxaohci_platform_data cm_x300_ohci_platform_data = { |
350 | .port_mode = PMM_PERPORT_MODE, | |
097b5334 | 351 | .flags = ENABLE_PORT1 | ENABLE_PORT2 | POWER_CONTROL_LOW, |
cf75d8d2 | 352 | }; |
097b5334 | 353 | |
cf75d8d2 MR |
354 | static void __init cm_x300_init_ohci(void) |
355 | { | |
356 | pxa_set_ohci_info(&cm_x300_ohci_platform_data); | |
357 | } | |
358 | #else | |
359 | static inline void cm_x300_init_ohci(void) {} | |
360 | #endif | |
361 | ||
362 | #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) | |
363 | static struct gpio_led cm_x300_leds[] = { | |
364 | [0] = { | |
365 | .name = "cm-x300:green", | |
366 | .default_trigger = "heartbeat", | |
cf75d8d2 MR |
367 | .active_low = 1, |
368 | }, | |
369 | }; | |
370 | ||
371 | static struct gpio_led_platform_data cm_x300_gpio_led_pdata = { | |
372 | .num_leds = ARRAY_SIZE(cm_x300_leds), | |
373 | .leds = cm_x300_leds, | |
374 | }; | |
375 | ||
376 | static struct platform_device cm_x300_led_device = { | |
377 | .name = "leds-gpio", | |
378 | .id = -1, | |
379 | .dev = { | |
380 | .platform_data = &cm_x300_gpio_led_pdata, | |
381 | }, | |
382 | }; | |
383 | ||
384 | static void __init cm_x300_init_leds(void) | |
385 | { | |
55052ea2 IG |
386 | if (system_rev < 130) |
387 | cm_x300_leds[0].gpio = 79; | |
388 | else | |
389 | cm_x300_leds[0].gpio = 76; | |
390 | ||
cf75d8d2 MR |
391 | platform_device_register(&cm_x300_led_device); |
392 | } | |
393 | #else | |
394 | static inline void cm_x300_init_leds(void) {} | |
395 | #endif | |
396 | ||
397 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | |
398 | /* PCA9555 */ | |
399 | static struct pca953x_platform_data cm_x300_gpio_ext_pdata_0 = { | |
400 | .gpio_base = 128, | |
401 | }; | |
402 | ||
403 | static struct pca953x_platform_data cm_x300_gpio_ext_pdata_1 = { | |
404 | .gpio_base = 144, | |
405 | }; | |
406 | ||
407 | static struct i2c_board_info cm_x300_gpio_ext_info[] = { | |
408 | [0] = { | |
409 | I2C_BOARD_INFO("pca9555", 0x24), | |
410 | .platform_data = &cm_x300_gpio_ext_pdata_0, | |
411 | }, | |
412 | [1] = { | |
413 | I2C_BOARD_INFO("pca9555", 0x25), | |
414 | .platform_data = &cm_x300_gpio_ext_pdata_1, | |
415 | }, | |
416 | }; | |
417 | ||
418 | static void __init cm_x300_init_i2c(void) | |
419 | { | |
420 | pxa_set_i2c_info(NULL); | |
421 | i2c_register_board_info(0, cm_x300_gpio_ext_info, | |
422 | ARRAY_SIZE(cm_x300_gpio_ext_info)); | |
423 | } | |
424 | #else | |
425 | static inline void cm_x300_init_i2c(void) {} | |
426 | #endif | |
427 | ||
1858ced3 MR |
428 | #if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE) |
429 | struct v3020_platform_data cm_x300_v3020_pdata = { | |
430 | .use_gpio = 1, | |
431 | .gpio_cs = GPIO95_RTC_CS, | |
432 | .gpio_wr = GPIO96_RTC_WR, | |
433 | .gpio_rd = GPIO97_RTC_RD, | |
434 | .gpio_io = GPIO98_RTC_IO, | |
435 | }; | |
436 | ||
437 | static struct platform_device cm_x300_rtc_device = { | |
438 | .name = "v3020", | |
439 | .id = -1, | |
440 | .dev = { | |
441 | .platform_data = &cm_x300_v3020_pdata, | |
442 | } | |
443 | }; | |
444 | ||
445 | static void __init cm_x300_init_rtc(void) | |
446 | { | |
447 | platform_device_register(&cm_x300_rtc_device); | |
448 | } | |
449 | #else | |
450 | static inline void cm_x300_init_rtc(void) {} | |
451 | #endif | |
452 | ||
55052ea2 | 453 | static void __init cm_x300_init_mfp(void) |
cf75d8d2 MR |
454 | { |
455 | /* board-processor specific GPIO initialization */ | |
456 | pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x300_mfp_cfg)); | |
457 | ||
55052ea2 IG |
458 | if (system_rev < 130) |
459 | pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x300_rev_lt130_mfp_cfg)); | |
460 | else | |
461 | pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x300_rev_ge130_mfp_cfg)); | |
462 | } | |
463 | ||
464 | static void __init cm_x300_init(void) | |
465 | { | |
466 | cm_x300_init_mfp(); | |
467 | ||
cc155c6f RK |
468 | pxa_set_ffuart_info(NULL); |
469 | pxa_set_btuart_info(NULL); | |
470 | pxa_set_stuart_info(NULL); | |
471 | ||
cf75d8d2 MR |
472 | cm_x300_init_dm9000(); |
473 | cm_x300_init_lcd(); | |
474 | cm_x300_init_ohci(); | |
475 | cm_x300_init_mmc(); | |
476 | cm_x300_init_nand(); | |
477 | cm_x300_init_leds(); | |
478 | cm_x300_init_i2c(); | |
1858ced3 | 479 | cm_x300_init_rtc(); |
cf75d8d2 MR |
480 | } |
481 | ||
b5a5c474 MR |
482 | static void __init cm_x300_fixup(struct machine_desc *mdesc, struct tag *tags, |
483 | char **cmdline, struct meminfo *mi) | |
484 | { | |
485 | mi->nr_banks = 2; | |
486 | mi->bank[0].start = 0xa0000000; | |
487 | mi->bank[0].node = 0; | |
488 | mi->bank[0].size = (64*1024*1024); | |
489 | mi->bank[1].start = 0xc0000000; | |
490 | mi->bank[1].node = 0; | |
491 | mi->bank[1].size = (64*1024*1024); | |
492 | } | |
493 | ||
cf75d8d2 MR |
494 | MACHINE_START(CM_X300, "CM-X300 module") |
495 | .phys_io = 0x40000000, | |
496 | .boot_params = 0xa0000100, | |
497 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | |
498 | .map_io = pxa_map_io, | |
499 | .init_irq = pxa3xx_init_irq, | |
500 | .timer = &pxa_timer, | |
501 | .init_machine = cm_x300_init, | |
b5a5c474 | 502 | .fixup = cm_x300_fixup, |
cf75d8d2 | 503 | MACHINE_END |