[deliverable/linux.git] / arch / arm / mach-pxa / corgi_ssp.c

/*
 *  SSP control code for Sharp Corgi devices
 *
 *  Copyright (c) 2004-2005 Richard Purdie
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License version 2 as
 *  published by the Free Software Foundation.
 *
 */

#include <linux/module.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
#include <asm/hardware.h>
#include <asm/mach-types.h>

#include <asm/arch/ssp.h>
#include <asm/arch/pxa-regs.h>
#include "sharpsl.h"

static DEFINE_SPINLOCK(corgi_ssp_lock);
static struct ssp_dev corgi_ssp_dev;
static struct ssp_state corgi_ssp_state;
static struct corgissp_machinfo *ssp_machinfo;

/*
 * There are three devices connected to the SSP interface:
 *   1. A touchscreen controller (TI ADS7846 compatible)
 *   2. An LCD contoller (with some Backlight functionality)
 *   3. A battery moinitoring IC (Maxim MAX1111)
 *
 * Each device uses a different speed/mode of communication.
 *
 * The touchscreen is very sensitive and the most frequently used
 * so the port is left configured for this.
 *
 * Devices are selected using Chip Selects on GPIOs.
 */

/*
 *  ADS7846 Routines
 */
unsigned long corgi_ssp_ads7846_putget(ulong data)
{
	unsigned long ret,flag;

	spin_lock_irqsave(&corgi_ssp_lock, flag);
	GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);

	ssp_write_word(&corgi_ssp_dev,data);
	ret = ssp_read_word(&corgi_ssp_dev);

	GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
	spin_unlock_irqrestore(&corgi_ssp_lock, flag);

	return ret;
}

/*
 * NOTE: These functions should always be called in interrupt context
 * and use the _lock and _unlock functions. They are very time sensitive.
 */
void corgi_ssp_ads7846_lock(void)
{
	spin_lock(&corgi_ssp_lock);
	GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
}

void corgi_ssp_ads7846_unlock(void)
{
	GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
	spin_unlock(&corgi_ssp_lock);
}

void corgi_ssp_ads7846_put(ulong data)
{
	ssp_write_word(&corgi_ssp_dev,data);
}

unsigned long corgi_ssp_ads7846_get(void)
{
	return ssp_read_word(&corgi_ssp_dev);
}

EXPORT_SYMBOL(corgi_ssp_ads7846_putget);
EXPORT_SYMBOL(corgi_ssp_ads7846_lock);
EXPORT_SYMBOL(corgi_ssp_ads7846_unlock);
EXPORT_SYMBOL(corgi_ssp_ads7846_put);
EXPORT_SYMBOL(corgi_ssp_ads7846_get);


/*
 *  LCD/Backlight Routines
 */
unsigned long corgi_ssp_dac_put(ulong data)
{
	unsigned long flag, sscr1 = SSCR1_SPH;

	spin_lock_irqsave(&corgi_ssp_lock, flag);

	if (machine_is_spitz() || machine_is_akita() || machine_is_borzoi())
		sscr1 = 0;

	ssp_disable(&corgi_ssp_dev);
	ssp_config(&corgi_ssp_dev, (SSCR0_Motorola | (SSCR0_DSS & 0x07 )), sscr1, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_lcdcon));
	ssp_enable(&corgi_ssp_dev);

	GPCR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon);
	ssp_write_word(&corgi_ssp_dev,data);
	/* Read null data back from device to prevent SSP overflow */
	ssp_read_word(&corgi_ssp_dev);
	GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon);

	ssp_disable(&corgi_ssp_dev);
	ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846));
	ssp_enable(&corgi_ssp_dev);

	spin_unlock_irqrestore(&corgi_ssp_lock, flag);

	return 0;
}

void corgi_ssp_lcdtg_send(u8 adrs, u8 data)
{
	corgi_ssp_dac_put(((adrs & 0x07) << 5) | (data & 0x1f));
}

void corgi_ssp_blduty_set(int duty)
{
	corgi_ssp_lcdtg_send(0x02,duty);
}

EXPORT_SYMBOL(corgi_ssp_lcdtg_send);
EXPORT_SYMBOL(corgi_ssp_blduty_set);

/*
 *  Max1111 Routines
 */
int corgi_ssp_max1111_get(ulong data)
{
	unsigned long flag;
	int voltage,voltage1,voltage2;

	spin_lock_irqsave(&corgi_ssp_lock, flag);
	GPCR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111);
	ssp_disable(&corgi_ssp_dev);
	ssp_config(&corgi_ssp_dev, (SSCR0_Motorola | (SSCR0_DSS & 0x07 )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_max1111));
	ssp_enable(&corgi_ssp_dev);

	udelay(1);

	/* TB1/RB1 */
	ssp_write_word(&corgi_ssp_dev,data);
	ssp_read_word(&corgi_ssp_dev); /* null read */

	/* TB12/RB2 */
	ssp_write_word(&corgi_ssp_dev,0);
	voltage1=ssp_read_word(&corgi_ssp_dev);

	/* TB13/RB3*/
	ssp_write_word(&corgi_ssp_dev,0);
	voltage2=ssp_read_word(&corgi_ssp_dev);

	ssp_disable(&corgi_ssp_dev);
	ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846));
	ssp_enable(&corgi_ssp_dev);
	GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111);
	spin_unlock_irqrestore(&corgi_ssp_lock, flag);

	if (voltage1 & 0xc0 || voltage2 & 0x3f)
		voltage = -1;
	else
		voltage = ((voltage1 << 2) & 0xfc) | ((voltage2 >> 6) & 0x03);

	return voltage;
}

EXPORT_SYMBOL(corgi_ssp_max1111_get);

/*
 *  Support Routines
 */

void __init corgi_ssp_set_machinfo(struct corgissp_machinfo *machinfo)
{
	ssp_machinfo = machinfo;
}

static int __init corgi_ssp_probe(struct device *dev)
{
	int ret;

	/* Chip Select - Disable All */
	GPDR(ssp_machinfo->cs_lcdcon) |= GPIO_bit(ssp_machinfo->cs_lcdcon); /* output */
	GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon);  /* High - Disable LCD Control/Timing Gen */
	GPDR(ssp_machinfo->cs_max1111) |= GPIO_bit(ssp_machinfo->cs_max1111); /* output */
	GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111);  /* High - Disable MAX1111*/
	GPDR(ssp_machinfo->cs_ads7846) |= GPIO_bit(ssp_machinfo->cs_ads7846);  /* output */
	GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);   /* High - Disable ADS7846*/

	ret = ssp_init(&corgi_ssp_dev,ssp_machinfo->port);

	if (ret)
		printk(KERN_ERR "Unable to register SSP handler!\n");
	else {
		ssp_disable(&corgi_ssp_dev);
		ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846));
		ssp_enable(&corgi_ssp_dev);
	}

	return ret;
}

static int corgi_ssp_remove(struct device *dev)
{
	ssp_exit(&corgi_ssp_dev);
	return 0;
}

static int corgi_ssp_suspend(struct device *dev, pm_message_t state)
{
	ssp_flush(&corgi_ssp_dev);
	ssp_save_state(&corgi_ssp_dev,&corgi_ssp_state);

	return 0;
}

static int corgi_ssp_resume(struct device *dev)
{
	GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon);  /* High - Disable LCD Control/Timing Gen */
	GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111); /* High - Disable MAX1111*/
	GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); /* High - Disable ADS7846*/
	ssp_restore_state(&corgi_ssp_dev,&corgi_ssp_state);
	ssp_enable(&corgi_ssp_dev);

	return 0;
}

static struct device_driver corgissp_driver = {
	.name		= "corgi-ssp",
	.bus		= &platform_bus_type,
	.probe		= corgi_ssp_probe,
	.remove		= corgi_ssp_remove,
	.suspend	= corgi_ssp_suspend,
	.resume		= corgi_ssp_resume,
};

int __init corgi_ssp_init(void)
{
	return driver_register(&corgissp_driver);
}

arch_initcall(corgi_ssp_init);
Commit	Line	Data
1da177e4 LT	1	/*
	2	* SSP control code for Sharp Corgi devices
	3	*
50a5de44	4	* Copyright (c) 2004-2005 Richard Purdie
1da177e4 LT	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2 as
	8	* published by the Free Software Foundation.
	9	*
	10	*/
	11
	12	#include <linux/module.h>
	13	#include <linux/init.h>
	14	#include <linux/kernel.h>
	15	#include <linux/sched.h>
	16	#include <linux/slab.h>
	17	#include <linux/delay.h>
d052d1be	18	#include <linux/platform_device.h>
1da177e4	19	#include <asm/hardware.h>
50a5de44	20	#include <asm/mach-types.h>
1da177e4 LT	21
1da177e4 LT	22	#include <asm/arch/ssp.h>
1da177e4	23	#include <asm/arch/pxa-regs.h>
50a5de44	24	#include "sharpsl.h"
1da177e4	25
a9f6a0dd	26	static DEFINE_SPINLOCK(corgi_ssp_lock);
1da177e4 LT	27	static struct ssp_dev corgi_ssp_dev;
1da177e4 LT	28	static struct ssp_state corgi_ssp_state;
50a5de44	29	static struct corgissp_machinfo *ssp_machinfo;
1da177e4 LT	30
	31	/*
	32	* There are three devices connected to the SSP interface:
	33	* 1. A touchscreen controller (TI ADS7846 compatible)
	34	* 2. An LCD contoller (with some Backlight functionality)
	35	* 3. A battery moinitoring IC (Maxim MAX1111)
	36	*
	37	* Each device uses a different speed/mode of communication.
	38	*
	39	* The touchscreen is very sensitive and the most frequently used
	40	* so the port is left configured for this.
	41	*
	42	* Devices are selected using Chip Selects on GPIOs.
	43	*/
	44
	45	/*
	46	* ADS7846 Routines
	47	*/
	48	unsigned long corgi_ssp_ads7846_putget(ulong data)
	49	{
	50	unsigned long ret,flag;
	51
	52	spin_lock_irqsave(&corgi_ssp_lock, flag);
50a5de44	53	GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
1da177e4 LT	54
	55	ssp_write_word(&corgi_ssp_dev,data);
	56	ret = ssp_read_word(&corgi_ssp_dev);
	57
50a5de44	58	GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
1da177e4 LT	59	spin_unlock_irqrestore(&corgi_ssp_lock, flag);
	60
	61	return ret;
	62	}
	63
	64	/*
	65	* NOTE: These functions should always be called in interrupt context
	66	* and use the _lock and _unlock functions. They are very time sensitive.
	67	*/
	68	void corgi_ssp_ads7846_lock(void)
	69	{
	70	spin_lock(&corgi_ssp_lock);
50a5de44	71	GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
1da177e4 LT	72	}
	73
	74	void corgi_ssp_ads7846_unlock(void)
	75	{
50a5de44	76	GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846);
1da177e4 LT	77	spin_unlock(&corgi_ssp_lock);
	78	}
	79
	80	void corgi_ssp_ads7846_put(ulong data)
	81	{
	82	ssp_write_word(&corgi_ssp_dev,data);
	83	}
	84
	85	unsigned long corgi_ssp_ads7846_get(void)
	86	{
	87	return ssp_read_word(&corgi_ssp_dev);
	88	}
	89
	90	EXPORT_SYMBOL(corgi_ssp_ads7846_putget);
	91	EXPORT_SYMBOL(corgi_ssp_ads7846_lock);
	92	EXPORT_SYMBOL(corgi_ssp_ads7846_unlock);
	93	EXPORT_SYMBOL(corgi_ssp_ads7846_put);
	94	EXPORT_SYMBOL(corgi_ssp_ads7846_get);
	95
	96
	97	/*
	98	* LCD/Backlight Routines
	99	*/
	100	unsigned long corgi_ssp_dac_put(ulong data)
	101	{
50a5de44	102	unsigned long flag, sscr1 = SSCR1_SPH;
1da177e4 LT	103
1da177e4 LT	104	spin_lock_irqsave(&corgi_ssp_lock, flag);
50a5de44 RP	105
	106	if (machine_is_spitz() \|\| machine_is_akita() \|\| machine_is_borzoi())
	107	sscr1 = 0;
1da177e4 LT	108
1da177e4 LT	109	ssp_disable(&corgi_ssp_dev);
50a5de44	110	ssp_config(&corgi_ssp_dev, (SSCR0_Motorola \| (SSCR0_DSS & 0x07 )), sscr1, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_lcdcon));
1da177e4 LT	111	ssp_enable(&corgi_ssp_dev);
1da177e4 LT	112
50a5de44	113	GPCR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon);
1da177e4 LT	114	ssp_write_word(&corgi_ssp_dev,data);
	115	/* Read null data back from device to prevent SSP overflow */
	116	ssp_read_word(&corgi_ssp_dev);
50a5de44	117	GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon);
1da177e4 LT	118
1da177e4 LT	119	ssp_disable(&corgi_ssp_dev);
50a5de44	120	ssp_config(&corgi_ssp_dev, (SSCR0_National \| (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846));
1da177e4	121	ssp_enable(&corgi_ssp_dev);
50a5de44	122
1da177e4 LT	123	spin_unlock_irqrestore(&corgi_ssp_lock, flag);
	124
	125	return 0;
	126	}
	127
	128	void corgi_ssp_lcdtg_send(u8 adrs, u8 data)
	129	{
	130	corgi_ssp_dac_put(((adrs & 0x07) << 5) \| (data & 0x1f));
	131	}
	132
	133	void corgi_ssp_blduty_set(int duty)
	134	{
	135	corgi_ssp_lcdtg_send(0x02,duty);
	136	}
	137
	138	EXPORT_SYMBOL(corgi_ssp_lcdtg_send);
	139	EXPORT_SYMBOL(corgi_ssp_blduty_set);
	140
	141	/*
	142	* Max1111 Routines
	143	*/
	144	int corgi_ssp_max1111_get(ulong data)
	145	{
	146	unsigned long flag;
	147	int voltage,voltage1,voltage2;
	148
	149	spin_lock_irqsave(&corgi_ssp_lock, flag);
50a5de44	150	GPCR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111);
1da177e4	151	ssp_disable(&corgi_ssp_dev);
50a5de44	152	ssp_config(&corgi_ssp_dev, (SSCR0_Motorola \| (SSCR0_DSS & 0x07 )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_max1111));
1da177e4 LT	153	ssp_enable(&corgi_ssp_dev);
	154
	155	udelay(1);
	156
	157	/* TB1/RB1 */
	158	ssp_write_word(&corgi_ssp_dev,data);
	159	ssp_read_word(&corgi_ssp_dev); /* null read */
	160
	161	/* TB12/RB2 */
	162	ssp_write_word(&corgi_ssp_dev,0);
	163	voltage1=ssp_read_word(&corgi_ssp_dev);
	164
	165	/* TB13/RB3*/
	166	ssp_write_word(&corgi_ssp_dev,0);
	167	voltage2=ssp_read_word(&corgi_ssp_dev);
	168
	169	ssp_disable(&corgi_ssp_dev);
50a5de44	170	ssp_config(&corgi_ssp_dev, (SSCR0_National \| (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846));
1da177e4	171	ssp_enable(&corgi_ssp_dev);
50a5de44	172	GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111);
1da177e4 LT	173	spin_unlock_irqrestore(&corgi_ssp_lock, flag);
	174
	175	if (voltage1 & 0xc0 \|\| voltage2 & 0x3f)
	176	voltage = -1;
	177	else
	178	voltage = ((voltage1 << 2) & 0xfc) \| ((voltage2 >> 6) & 0x03);
	179
	180	return voltage;
	181	}
	182
	183	EXPORT_SYMBOL(corgi_ssp_max1111_get);
	184
	185	/*
	186	* Support Routines
	187	*/
50a5de44 RP	188
	189	void __init corgi_ssp_set_machinfo(struct corgissp_machinfo *machinfo)
	190	{
	191	ssp_machinfo = machinfo;
	192	}
	193
	194	static int __init corgi_ssp_probe(struct device *dev)
1da177e4 LT	195	{
	196	int ret;
	197
	198	/* Chip Select - Disable All */
50a5de44 RP	199	GPDR(ssp_machinfo->cs_lcdcon) \|= GPIO_bit(ssp_machinfo->cs_lcdcon); /* output */
	200	GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); /* High - Disable LCD Control/Timing Gen */
	201	GPDR(ssp_machinfo->cs_max1111) \|= GPIO_bit(ssp_machinfo->cs_max1111); /* output */
	202	GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111); /* High - Disable MAX1111*/
	203	GPDR(ssp_machinfo->cs_ads7846) \|= GPIO_bit(ssp_machinfo->cs_ads7846); /* output */
	204	GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); /* High - Disable ADS7846*/
1da177e4	205
50a5de44	206	ret = ssp_init(&corgi_ssp_dev,ssp_machinfo->port);
1da177e4 LT	207
	208	if (ret)
	209	printk(KERN_ERR "Unable to register SSP handler!\n");
	210	else {
	211	ssp_disable(&corgi_ssp_dev);
50a5de44	212	ssp_config(&corgi_ssp_dev, (SSCR0_National \| (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846));
1da177e4 LT	213	ssp_enable(&corgi_ssp_dev);
	214	}
	215
	216	return ret;
	217	}
	218
	219	static int corgi_ssp_remove(struct device *dev)
	220	{
	221	ssp_exit(&corgi_ssp_dev);
	222	return 0;
	223	}
	224
9480e307	225	static int corgi_ssp_suspend(struct device *dev, pm_message_t state)
1da177e4	226	{
9480e307 RK	227	ssp_flush(&corgi_ssp_dev);
	228	ssp_save_state(&corgi_ssp_dev,&corgi_ssp_state);
	229
1da177e4 LT	230	return 0;
	231	}
	232
9480e307	233	static int corgi_ssp_resume(struct device *dev)
1da177e4	234	{
9480e307 RK	235	GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); /* High - Disable LCD Control/Timing Gen */
	236	GPSR(ssp_machinfo->cs_max1111) = GPIO_bit(ssp_machinfo->cs_max1111); /* High - Disable MAX1111*/
	237	GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); /* High - Disable ADS7846*/
	238	ssp_restore_state(&corgi_ssp_dev,&corgi_ssp_state);
	239	ssp_enable(&corgi_ssp_dev);
	240
1da177e4 LT	241	return 0;
	242	}
	243
	244	static struct device_driver corgissp_driver = {
	245	.name = "corgi-ssp",
	246	.bus = &platform_bus_type,
	247	.probe = corgi_ssp_probe,
	248	.remove = corgi_ssp_remove,
	249	.suspend = corgi_ssp_suspend,
	250	.resume = corgi_ssp_resume,
	251	};
	252
	253	int __init corgi_ssp_init(void)
	254	{
	255	return driver_register(&corgissp_driver);
	256	}
	257
	258	arch_initcall(corgi_ssp_init);