[deliverable/linux.git] / arch / arm / mach-pxa / devices.c

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>

#include <asm/arch/gpio.h>
#include <asm/arch/udc.h>
#include <asm/arch/pxafb.h>
#include <asm/arch/mmc.h>
#include <asm/arch/irda.h>
#include <asm/arch/i2c.h>
#include <asm/arch/ohci.h>
#include <asm/arch/pxa27x_keypad.h>
#include <asm/arch/camera.h>

#include "devices.h"

void __init pxa_register_device(struct platform_device *dev, void *data)
{
	int ret;

	dev->dev.platform_data = data;

	ret = platform_device_register(dev);
	if (ret)
		dev_err(&dev->dev, "unable to register device: %d\n", ret);
}

static struct resource pxamci_resources[] = {
	[0] = {
		.start	= 0x41100000,
		.end	= 0x41100fff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_MMC,
		.end	= IRQ_MMC,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		.start	= 21,
		.end	= 21,
		.flags	= IORESOURCE_DMA,
	},
	[3] = {
		.start	= 22,
		.end	= 22,
		.flags	= IORESOURCE_DMA,
	},
};

static u64 pxamci_dmamask = 0xffffffffUL;

struct platform_device pxa_device_mci = {
	.name		= "pxa2xx-mci",
	.id		= 0,
	.dev		= {
		.dma_mask = &pxamci_dmamask,
		.coherent_dma_mask = 0xffffffff,
	},
	.num_resources	= ARRAY_SIZE(pxamci_resources),
	.resource	= pxamci_resources,
};

void __init pxa_set_mci_info(struct pxamci_platform_data *info)
{
	pxa_register_device(&pxa_device_mci, info);
}


static struct pxa2xx_udc_mach_info pxa_udc_info;

void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
{
	memcpy(&pxa_udc_info, info, sizeof *info);
}

static struct resource pxa2xx_udc_resources[] = {
	[0] = {
		.start	= 0x40600000,
		.end	= 0x4060ffff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_USB,
		.end	= IRQ_USB,
		.flags	= IORESOURCE_IRQ,
	},
};

static u64 udc_dma_mask = ~(u32)0;

struct platform_device pxa_device_udc = {
	.name		= "pxa2xx-udc",
	.id		= -1,
	.resource	= pxa2xx_udc_resources,
	.num_resources	= ARRAY_SIZE(pxa2xx_udc_resources),
	.dev		=  {
		.platform_data	= &pxa_udc_info,
		.dma_mask	= &udc_dma_mask,
	}
};

static struct resource pxafb_resources[] = {
	[0] = {
		.start	= 0x44000000,
		.end	= 0x4400ffff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_LCD,
		.end	= IRQ_LCD,
		.flags	= IORESOURCE_IRQ,
	},
};

static u64 fb_dma_mask = ~(u64)0;

struct platform_device pxa_device_fb = {
	.name		= "pxa2xx-fb",
	.id		= -1,
	.dev		= {
		.dma_mask	= &fb_dma_mask,
		.coherent_dma_mask = 0xffffffff,
	},
	.num_resources	= ARRAY_SIZE(pxafb_resources),
	.resource	= pxafb_resources,
};

void __init set_pxa_fb_info(struct pxafb_mach_info *info)
{
	pxa_register_device(&pxa_device_fb, info);
}

void __init set_pxa_fb_parent(struct device *parent_dev)
{
	pxa_device_fb.dev.parent = parent_dev;
}

static struct resource pxa_resource_ffuart[] = {
	{
		.start	= __PREG(FFUART),
		.end	= __PREG(FFUART) + 35,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_FFUART,
		.end	= IRQ_FFUART,
		.flags	= IORESOURCE_IRQ,
	}
};

struct platform_device pxa_device_ffuart= {
	.name		= "pxa2xx-uart",
	.id		= 0,
	.resource	= pxa_resource_ffuart,
	.num_resources	= ARRAY_SIZE(pxa_resource_ffuart),
};

static struct resource pxa_resource_btuart[] = {
	{
		.start	= __PREG(BTUART),
		.end	= __PREG(BTUART) + 35,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_BTUART,
		.end	= IRQ_BTUART,
		.flags	= IORESOURCE_IRQ,
	}
};

struct platform_device pxa_device_btuart = {
	.name		= "pxa2xx-uart",
	.id		= 1,
	.resource	= pxa_resource_btuart,
	.num_resources	= ARRAY_SIZE(pxa_resource_btuart),
};

static struct resource pxa_resource_stuart[] = {
	{
		.start	= __PREG(STUART),
		.end	= __PREG(STUART) + 35,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_STUART,
		.end	= IRQ_STUART,
		.flags	= IORESOURCE_IRQ,
	}
};

struct platform_device pxa_device_stuart = {
	.name		= "pxa2xx-uart",
	.id		= 2,
	.resource	= pxa_resource_stuart,
	.num_resources	= ARRAY_SIZE(pxa_resource_stuart),
};

static struct resource pxa_resource_hwuart[] = {
	{
		.start	= __PREG(HWUART),
		.end	= __PREG(HWUART) + 47,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_HWUART,
		.end	= IRQ_HWUART,
		.flags	= IORESOURCE_IRQ,
	}
};

struct platform_device pxa_device_hwuart = {
	.name		= "pxa2xx-uart",
	.id		= 3,
	.resource	= pxa_resource_hwuart,
	.num_resources	= ARRAY_SIZE(pxa_resource_hwuart),
};

static struct resource pxai2c_resources[] = {
	{
		.start	= 0x40301680,
		.end	= 0x403016a3,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_I2C,
		.end	= IRQ_I2C,
		.flags	= IORESOURCE_IRQ,
	},
};

struct platform_device pxa_device_i2c = {
	.name		= "pxa2xx-i2c",
	.id		= 0,
	.resource	= pxai2c_resources,
	.num_resources	= ARRAY_SIZE(pxai2c_resources),
};

void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
{
	pxa_register_device(&pxa_device_i2c, info);
}

static struct resource pxai2s_resources[] = {
	{
		.start	= 0x40400000,
		.end	= 0x40400083,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_I2S,
		.end	= IRQ_I2S,
		.flags	= IORESOURCE_IRQ,
	},
};

struct platform_device pxa_device_i2s = {
	.name		= "pxa2xx-i2s",
	.id		= -1,
	.resource	= pxai2s_resources,
	.num_resources	= ARRAY_SIZE(pxai2s_resources),
};

static u64 pxaficp_dmamask = ~(u32)0;

struct platform_device pxa_device_ficp = {
	.name		= "pxa2xx-ir",
	.id		= -1,
	.dev		= {
		.dma_mask = &pxaficp_dmamask,
		.coherent_dma_mask = 0xffffffff,
	},
};

void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
{
	pxa_register_device(&pxa_device_ficp, info);
}

struct platform_device pxa_device_rtc = {
	.name		= "sa1100-rtc",
	.id		= -1,
};

#ifdef CONFIG_PXA25x

static struct resource pxa25x_resource_pwm0[] = {
	[0] = {
		.start	= 0x40b00000,
		.end	= 0x40b0000f,
		.flags	= IORESOURCE_MEM,
	},
};

struct platform_device pxa25x_device_pwm0 = {
	.name		= "pxa25x-pwm",
	.id		= 0,
	.resource	= pxa25x_resource_pwm0,
	.num_resources	= ARRAY_SIZE(pxa25x_resource_pwm0),
};

static struct resource pxa25x_resource_pwm1[] = {
	[0] = {
		.start	= 0x40c00000,
		.end	= 0x40c0000f,
		.flags	= IORESOURCE_MEM,
	},
};

struct platform_device pxa25x_device_pwm1 = {
	.name		= "pxa25x-pwm",
	.id		= 1,
	.resource	= pxa25x_resource_pwm1,
	.num_resources	= ARRAY_SIZE(pxa25x_resource_pwm1),
};

static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);

static struct resource pxa25x_resource_ssp[] = {
	[0] = {
		.start	= 0x41000000,
		.end	= 0x4100001f,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_SSP,
		.end	= IRQ_SSP,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		/* DRCMR for RX */
		.start	= 13,
		.end	= 13,
		.flags	= IORESOURCE_DMA,
	},
	[3] = {
		/* DRCMR for TX */
		.start	= 14,
		.end	= 14,
		.flags	= IORESOURCE_DMA,
	},
};

struct platform_device pxa25x_device_ssp = {
	.name		= "pxa25x-ssp",
	.id		= 0,
	.dev		= {
		.dma_mask = &pxa25x_ssp_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.resource	= pxa25x_resource_ssp,
	.num_resources	= ARRAY_SIZE(pxa25x_resource_ssp),
};

static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);

static struct resource pxa25x_resource_nssp[] = {
	[0] = {
		.start	= 0x41400000,
		.end	= 0x4140002f,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_NSSP,
		.end	= IRQ_NSSP,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		/* DRCMR for RX */
		.start	= 15,
		.end	= 15,
		.flags	= IORESOURCE_DMA,
	},
	[3] = {
		/* DRCMR for TX */
		.start	= 16,
		.end	= 16,
		.flags	= IORESOURCE_DMA,
	},
};

struct platform_device pxa25x_device_nssp = {
	.name		= "pxa25x-nssp",
	.id		= 1,
	.dev		= {
		.dma_mask = &pxa25x_nssp_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.resource	= pxa25x_resource_nssp,
	.num_resources	= ARRAY_SIZE(pxa25x_resource_nssp),
};

static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);

static struct resource pxa25x_resource_assp[] = {
	[0] = {
		.start	= 0x41500000,
		.end	= 0x4150002f,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_ASSP,
		.end	= IRQ_ASSP,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		/* DRCMR for RX */
		.start	= 23,
		.end	= 23,
		.flags	= IORESOURCE_DMA,
	},
	[3] = {
		/* DRCMR for TX */
		.start	= 24,
		.end	= 24,
		.flags	= IORESOURCE_DMA,
	},
};

struct platform_device pxa25x_device_assp = {
	/* ASSP is basically equivalent to NSSP */
	.name		= "pxa25x-nssp",
	.id		= 2,
	.dev		= {
		.dma_mask = &pxa25x_assp_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.resource	= pxa25x_resource_assp,
	.num_resources	= ARRAY_SIZE(pxa25x_resource_assp),
};
#endif /* CONFIG_PXA25x */

#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)

static struct resource pxa27x_resource_keypad[] = {
	[0] = {
		.start	= 0x41500000,
		.end	= 0x4150004c,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_KEYPAD,
		.end	= IRQ_KEYPAD,
		.flags	= IORESOURCE_IRQ,
	},
};

struct platform_device pxa27x_device_keypad = {
	.name		= "pxa27x-keypad",
	.id		= -1,
	.resource	= pxa27x_resource_keypad,
	.num_resources	= ARRAY_SIZE(pxa27x_resource_keypad),
};

void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
{
	pxa_register_device(&pxa27x_device_keypad, info);
}

static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);

static struct resource pxa27x_resource_ohci[] = {
	[0] = {
		.start  = 0x4C000000,
		.end    = 0x4C00ff6f,
		.flags  = IORESOURCE_MEM,
	},
	[1] = {
		.start  = IRQ_USBH1,
		.end    = IRQ_USBH1,
		.flags  = IORESOURCE_IRQ,
	},
};

struct platform_device pxa27x_device_ohci = {
	.name		= "pxa27x-ohci",
	.id		= -1,
	.dev		= {
		.dma_mask = &pxa27x_ohci_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.num_resources  = ARRAY_SIZE(pxa27x_resource_ohci),
	.resource       = pxa27x_resource_ohci,
};

void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
{
	pxa_register_device(&pxa27x_device_ohci, info);
}

static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);

static struct resource pxa27x_resource_ssp1[] = {
	[0] = {
		.start	= 0x41000000,
		.end	= 0x4100003f,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_SSP,
		.end	= IRQ_SSP,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		/* DRCMR for RX */
		.start	= 13,
		.end	= 13,
		.flags	= IORESOURCE_DMA,
	},
	[3] = {
		/* DRCMR for TX */
		.start	= 14,
		.end	= 14,
		.flags	= IORESOURCE_DMA,
	},
};

struct platform_device pxa27x_device_ssp1 = {
	.name		= "pxa27x-ssp",
	.id		= 0,
	.dev		= {
		.dma_mask = &pxa27x_ssp1_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.resource	= pxa27x_resource_ssp1,
	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp1),
};

static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);

static struct resource pxa27x_resource_ssp2[] = {
	[0] = {
		.start	= 0x41700000,
		.end	= 0x4170003f,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_SSP2,
		.end	= IRQ_SSP2,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		/* DRCMR for RX */
		.start	= 15,
		.end	= 15,
		.flags	= IORESOURCE_DMA,
	},
	[3] = {
		/* DRCMR for TX */
		.start	= 16,
		.end	= 16,
		.flags	= IORESOURCE_DMA,
	},
};

struct platform_device pxa27x_device_ssp2 = {
	.name		= "pxa27x-ssp",
	.id		= 1,
	.dev		= {
		.dma_mask = &pxa27x_ssp2_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.resource	= pxa27x_resource_ssp2,
	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp2),
};

static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);

static struct resource pxa27x_resource_ssp3[] = {
	[0] = {
		.start	= 0x41900000,
		.end	= 0x4190003f,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_SSP3,
		.end	= IRQ_SSP3,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		/* DRCMR for RX */
		.start	= 66,
		.end	= 66,
		.flags	= IORESOURCE_DMA,
	},
	[3] = {
		/* DRCMR for TX */
		.start	= 67,
		.end	= 67,
		.flags	= IORESOURCE_DMA,
	},
};

struct platform_device pxa27x_device_ssp3 = {
	.name		= "pxa27x-ssp",
	.id		= 2,
	.dev		= {
		.dma_mask = &pxa27x_ssp3_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.resource	= pxa27x_resource_ssp3,
	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp3),
};

static struct resource pxa27x_resource_pwm0[] = {
	[0] = {
		.start	= 0x40b00000,
		.end	= 0x40b0001f,
		.flags	= IORESOURCE_MEM,
	},
};

struct platform_device pxa27x_device_pwm0 = {
	.name		= "pxa27x-pwm",
	.id		= 0,
	.resource	= pxa27x_resource_pwm0,
	.num_resources	= ARRAY_SIZE(pxa27x_resource_pwm0),
};

static struct resource pxa27x_resource_pwm1[] = {
	[0] = {
		.start	= 0x40c00000,
		.end	= 0x40c0001f,
		.flags	= IORESOURCE_MEM,
	},
};

struct platform_device pxa27x_device_pwm1 = {
	.name		= "pxa27x-pwm",
	.id		= 1,
	.resource	= pxa27x_resource_pwm1,
	.num_resources	= ARRAY_SIZE(pxa27x_resource_pwm1),
};

static struct resource pxa27x_resource_camera[] = {
	[0] = {
		.start	= 0x50000000,
		.end	= 0x50000fff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_CAMERA,
		.end	= IRQ_CAMERA,
		.flags	= IORESOURCE_IRQ,
	},
};

static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);

static struct platform_device pxa27x_device_camera = {
	.name		= "pxa27x-camera",
	.id		= 0, /* This is used to put cameras on this interface */
	.dev		= {
		.dma_mask      		= &pxa27x_dma_mask_camera,
		.coherent_dma_mask	= 0xffffffff,
	},
	.num_resources	= ARRAY_SIZE(pxa27x_resource_camera),
	.resource	= pxa27x_resource_camera,
};

void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
{
	pxa_register_device(&pxa27x_device_camera, info);
}
#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */

#ifdef CONFIG_PXA3xx
static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);

static struct resource pxa3xx_resource_ssp4[] = {
	[0] = {
		.start	= 0x41a00000,
		.end	= 0x41a0003f,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_SSP4,
		.end	= IRQ_SSP4,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		/* DRCMR for RX */
		.start	= 2,
		.end	= 2,
		.flags	= IORESOURCE_DMA,
	},
	[3] = {
		/* DRCMR for TX */
		.start	= 3,
		.end	= 3,
		.flags	= IORESOURCE_DMA,
	},
};

struct platform_device pxa3xx_device_ssp4 = {
	/* PXA3xx SSP is basically equivalent to PXA27x */
	.name		= "pxa27x-ssp",
	.id		= 3,
	.dev		= {
		.dma_mask = &pxa3xx_ssp4_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.resource	= pxa3xx_resource_ssp4,
	.num_resources	= ARRAY_SIZE(pxa3xx_resource_ssp4),
};

static struct resource pxa3xx_resources_mci2[] = {
	[0] = {
		.start	= 0x42000000,
		.end	= 0x42000fff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_MMC2,
		.end	= IRQ_MMC2,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		.start	= 93,
		.end	= 93,
		.flags	= IORESOURCE_DMA,
	},
	[3] = {
		.start	= 94,
		.end	= 94,
		.flags	= IORESOURCE_DMA,
	},
};

struct platform_device pxa3xx_device_mci2 = {
	.name		= "pxa2xx-mci",
	.id		= 1,
	.dev		= {
		.dma_mask = &pxamci_dmamask,
		.coherent_dma_mask =	0xffffffff,
	},
	.num_resources	= ARRAY_SIZE(pxa3xx_resources_mci2),
	.resource	= pxa3xx_resources_mci2,
};

void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info)
{
	pxa_register_device(&pxa3xx_device_mci2, info);
}

static struct resource pxa3xx_resources_mci3[] = {
	[0] = {
		.start	= 0x42500000,
		.end	= 0x42500fff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_MMC3,
		.end	= IRQ_MMC3,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		.start	= 100,
		.end	= 100,
		.flags	= IORESOURCE_DMA,
	},
	[3] = {
		.start	= 101,
		.end	= 101,
		.flags	= IORESOURCE_DMA,
	},
};

struct platform_device pxa3xx_device_mci3 = {
	.name		= "pxa2xx-mci",
	.id		= 2,
	.dev		= {
		.dma_mask = &pxamci_dmamask,
		.coherent_dma_mask = 0xffffffff,
	},
	.num_resources	= ARRAY_SIZE(pxa3xx_resources_mci3),
	.resource	= pxa3xx_resources_mci3,
};

void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
{
	pxa_register_device(&pxa3xx_device_mci3, info);
}

#endif /* CONFIG_PXA3xx */
Commit	Line	Data
8f58de7c	1	#include <linux/module.h>
	2	#include <linux/kernel.h>
	3	#include <linux/init.h>
	4	#include <linux/platform_device.h>
	5	#include <linux/dma-mapping.h>
	6
	7	#include <asm/arch/gpio.h>
	8	#include <asm/arch/udc.h>
	9	#include <asm/arch/pxafb.h>
	10	#include <asm/arch/mmc.h>
	11	#include <asm/arch/irda.h>
	12	#include <asm/arch/i2c.h>
cd5604d5	13	#include <asm/arch/ohci.h>
37320980	14	#include <asm/arch/pxa27x_keypad.h>
3f3acefb	15	#include <asm/arch/camera.h>
8f58de7c	16
	17	#include "devices.h"
	18
	19	void __init pxa_register_device(struct platform_device dev, void data)
	20	{
	21	int ret;
	22
	23	dev->dev.platform_data = data;
	24
	25	ret = platform_device_register(dev);
	26	if (ret)
	27	dev_err(&dev->dev, "unable to register device: %d\n", ret);
	28	}
	29
	30	static struct resource pxamci_resources[] = {
	31	[0] = {
	32	.start = 0x41100000,
	33	.end = 0x41100fff,
	34	.flags = IORESOURCE_MEM,
	35	},
	36	[1] = {
	37	.start = IRQ_MMC,
	38	.end = IRQ_MMC,
	39	.flags = IORESOURCE_IRQ,
	40	},
	41	[2] = {
	42	.start = 21,
	43	.end = 21,
	44	.flags = IORESOURCE_DMA,
	45	},
	46	[3] = {
	47	.start = 22,
	48	.end = 22,
	49	.flags = IORESOURCE_DMA,
	50	},
	51	};
	52
	53	static u64 pxamci_dmamask = 0xffffffffUL;
	54
	55	struct platform_device pxa_device_mci = {
	56	.name = "pxa2xx-mci",
fafc9d3f	57	.id = 0,
8f58de7c	58	.dev = {
	59	.dma_mask = &pxamci_dmamask,
	60	.coherent_dma_mask = 0xffffffff,
	61	},
	62	.num_resources = ARRAY_SIZE(pxamci_resources),
	63	.resource = pxamci_resources,
	64	};
	65
	66	void __init pxa_set_mci_info(struct pxamci_platform_data *info)
	67	{
	68	pxa_register_device(&pxa_device_mci, info);
	69	}
	70
	71
	72	static struct pxa2xx_udc_mach_info pxa_udc_info;
	73
	74	void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
	75	{
	76	memcpy(&pxa_udc_info, info, sizeof *info);
	77	}
	78
	79	static struct resource pxa2xx_udc_resources[] = {
	80	[0] = {
	81	.start = 0x40600000,
	82	.end = 0x4060ffff,
	83	.flags = IORESOURCE_MEM,
	84	},
	85	[1] = {
	86	.start = IRQ_USB,
	87	.end = IRQ_USB,
	88	.flags = IORESOURCE_IRQ,
	89	},
	90	};
	91
	92	static u64 udc_dma_mask = ~(u32)0;
	93
	94	struct platform_device pxa_device_udc = {
	95	.name = "pxa2xx-udc",
	96	.id = -1,
	97	.resource = pxa2xx_udc_resources,
	98	.num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
	99	.dev = {
	100	.platform_data = &pxa_udc_info,
	101	.dma_mask = &udc_dma_mask,
	102	}
	103	};
	104
	105	static struct resource pxafb_resources[] = {
	106	[0] = {
	107	.start = 0x44000000,
	108	.end = 0x4400ffff,
	109	.flags = IORESOURCE_MEM,
	110	},
	111	[1] = {
	112	.start = IRQ_LCD,
	113	.end = IRQ_LCD,
	114	.flags = IORESOURCE_IRQ,
	115	},
	116	};
	117
	118	static u64 fb_dma_mask = ~(u64)0;
	119
	120	struct platform_device pxa_device_fb = {
	121	.name = "pxa2xx-fb",
122	.id = -1,
123	.dev = {
124	.dma_mask = &fb_dma_mask,
125	.coherent_dma_mask = 0xffffffff,
126	},
127	.num_resources = ARRAY_SIZE(pxafb_resources),
128	.resource = pxafb_resources,
129	};
130
131	void __init set_pxa_fb_info(struct pxafb_mach_info *info)
132	{
133	pxa_register_device(&pxa_device_fb, info);
134	}
135
136	void __init set_pxa_fb_parent(struct device *parent_dev)
137	{
138	pxa_device_fb.dev.parent = parent_dev;
139	}
140
141	static struct resource pxa_resource_ffuart[] = {
142	{
143	.start = __PREG(FFUART),
144	.end = __PREG(FFUART) + 35,
145	.flags = IORESOURCE_MEM,
146	}, {
147	.start = IRQ_FFUART,
148	.end = IRQ_FFUART,
149	.flags = IORESOURCE_IRQ,
150	}
151	};
152
153	struct platform_device pxa_device_ffuart= {
154	.name = "pxa2xx-uart",
155	.id = 0,
156	.resource = pxa_resource_ffuart,
157	.num_resources = ARRAY_SIZE(pxa_resource_ffuart),
158	};
159
160	static struct resource pxa_resource_btuart[] = {
161	{
162	.start = __PREG(BTUART),
163	.end = __PREG(BTUART) + 35,
164	.flags = IORESOURCE_MEM,
165	}, {
166	.start = IRQ_BTUART,
167	.end = IRQ_BTUART,
168	.flags = IORESOURCE_IRQ,
169	}
170	};
171
172	struct platform_device pxa_device_btuart = {
173	.name = "pxa2xx-uart",
174	.id = 1,
175	.resource = pxa_resource_btuart,
176	.num_resources = ARRAY_SIZE(pxa_resource_btuart),
177	};
178
179	static struct resource pxa_resource_stuart[] = {
180	{
181	.start = __PREG(STUART),
182	.end = __PREG(STUART) + 35,
183	.flags = IORESOURCE_MEM,
184	}, {
185	.start = IRQ_STUART,
186	.end = IRQ_STUART,
187	.flags = IORESOURCE_IRQ,
188	}
189	};
190
191	struct platform_device pxa_device_stuart = {
192	.name = "pxa2xx-uart",
193	.id = 2,
194	.resource = pxa_resource_stuart,
195	.num_resources = ARRAY_SIZE(pxa_resource_stuart),
196	};
197
198	static struct resource pxa_resource_hwuart[] = {
199	{
200	.start = __PREG(HWUART),
201	.end = __PREG(HWUART) + 47,
202	.flags = IORESOURCE_MEM,
203	}, {
204	.start = IRQ_HWUART,
205	.end = IRQ_HWUART,
206	.flags = IORESOURCE_IRQ,
207	}
208	};
209
210	struct platform_device pxa_device_hwuart = {
211	.name = "pxa2xx-uart",
212	.id = 3,
213	.resource = pxa_resource_hwuart,
214	.num_resources = ARRAY_SIZE(pxa_resource_hwuart),
215	};
216
217	static struct resource pxai2c_resources[] = {
218	{
219	.start = 0x40301680,
220	.end = 0x403016a3,
221	.flags = IORESOURCE_MEM,
222	}, {
223	.start = IRQ_I2C,
224	.end = IRQ_I2C,
225	.flags = IORESOURCE_IRQ,
226	},
227	};
228
229	struct platform_device pxa_device_i2c = {
230	.name = "pxa2xx-i2c",
231	.id = 0,
232	.resource = pxai2c_resources,
233	.num_resources = ARRAY_SIZE(pxai2c_resources),
234	};
235
236	void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
237	{
238	pxa_register_device(&pxa_device_i2c, info);
239	}
240
241	static struct resource pxai2s_resources[] = {
242	{
243	.start = 0x40400000,
244	.end = 0x40400083,
245	.flags = IORESOURCE_MEM,
246	}, {
247	.start = IRQ_I2S,
248	.end = IRQ_I2S,
249	.flags = IORESOURCE_IRQ,
250	},
251	};
252
253	struct platform_device pxa_device_i2s = {
254	.name = "pxa2xx-i2s",
255	.id = -1,
256	.resource = pxai2s_resources,
257	.num_resources = ARRAY_SIZE(pxai2s_resources),
258	};
259
260	static u64 pxaficp_dmamask = ~(u32)0;
261
262	struct platform_device pxa_device_ficp = {
263	.name = "pxa2xx-ir",
264	.id = -1,
265	.dev = {
266	.dma_mask = &pxaficp_dmamask,
267	.coherent_dma_mask = 0xffffffff,
268	},
269	};
270
271	void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
272	{
273	pxa_register_device(&pxa_device_ficp, info);
274	}
275
276	struct platform_device pxa_device_rtc = {
277	.name = "sa1100-rtc",
278	.id = -1,
279	};
280
281	#ifdef CONFIG_PXA25x
282
75540c1a	283	static struct resource pxa25x_resource_pwm0[] = {
	284	[0] = {
	285	.start = 0x40b00000,
	286	.end = 0x40b0000f,
	287	.flags = IORESOURCE_MEM,
	288	},
	289	};
	290
	291	struct platform_device pxa25x_device_pwm0 = {
	292	.name = "pxa25x-pwm",
	293	.id = 0,
	294	.resource = pxa25x_resource_pwm0,
	295	.num_resources = ARRAY_SIZE(pxa25x_resource_pwm0),
	296	};
	297
	298	static struct resource pxa25x_resource_pwm1[] = {
	299	[0] = {
	300	.start = 0x40c00000,
	301	.end = 0x40c0000f,
	302	.flags = IORESOURCE_MEM,
	303	},
	304	};
	305
	306	struct platform_device pxa25x_device_pwm1 = {
	307	.name = "pxa25x-pwm",
	308	.id = 1,
	309	.resource = pxa25x_resource_pwm1,
	310	.num_resources = ARRAY_SIZE(pxa25x_resource_pwm1),
	311	};
	312
8f58de7c	313	static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
	314
	315	static struct resource pxa25x_resource_ssp[] = {
	316	[0] = {
	317	.start = 0x41000000,
	318	.end = 0x4100001f,
	319	.flags = IORESOURCE_MEM,
	320	},
	321	[1] = {
	322	.start = IRQ_SSP,
	323	.end = IRQ_SSP,
	324	.flags = IORESOURCE_IRQ,
	325	},
	326	[2] = {
	327	/* DRCMR for RX */
	328	.start = 13,
	329	.end = 13,
	330	.flags = IORESOURCE_DMA,
	331	},
	332	[3] = {
	333	/* DRCMR for TX */
	334	.start = 14,
	335	.end = 14,
	336	.flags = IORESOURCE_DMA,
	337	},
	338	};
	339
	340	struct platform_device pxa25x_device_ssp = {
	341	.name = "pxa25x-ssp",
	342	.id = 0,
	343	.dev = {
	344	.dma_mask = &pxa25x_ssp_dma_mask,
	345	.coherent_dma_mask = DMA_BIT_MASK(32),
	346	},
	347	.resource = pxa25x_resource_ssp,
	348	.num_resources = ARRAY_SIZE(pxa25x_resource_ssp),
	349	};
	350
	351	static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);
	352
	353	static struct resource pxa25x_resource_nssp[] = {
	354	[0] = {
	355	.start = 0x41400000,
	356	.end = 0x4140002f,
	357	.flags = IORESOURCE_MEM,
	358	},
	359	[1] = {
	360	.start = IRQ_NSSP,
	361	.end = IRQ_NSSP,
	362	.flags = IORESOURCE_IRQ,
	363	},
	364	[2] = {
	365	/* DRCMR for RX */
	366	.start = 15,
	367	.end = 15,
	368	.flags = IORESOURCE_DMA,
	369	},
	370	[3] = {
	371	/* DRCMR for TX */
	372	.start = 16,
	373	.end = 16,
	374	.flags = IORESOURCE_DMA,
	375	},
	376	};
377
378	struct platform_device pxa25x_device_nssp = {
379	.name = "pxa25x-nssp",
380	.id = 1,
381	.dev = {
382	.dma_mask = &pxa25x_nssp_dma_mask,
383	.coherent_dma_mask = DMA_BIT_MASK(32),
384	},
385	.resource = pxa25x_resource_nssp,
386	.num_resources = ARRAY_SIZE(pxa25x_resource_nssp),
387	};
388
389	static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);
390
391	static struct resource pxa25x_resource_assp[] = {
392	[0] = {
393	.start = 0x41500000,
394	.end = 0x4150002f,
395	.flags = IORESOURCE_MEM,
396	},
397	[1] = {
398	.start = IRQ_ASSP,
399	.end = IRQ_ASSP,
400	.flags = IORESOURCE_IRQ,
401	},
402	[2] = {
403	/* DRCMR for RX */
404	.start = 23,
405	.end = 23,
406	.flags = IORESOURCE_DMA,
407	},
408	[3] = {
409	/* DRCMR for TX */
410	.start = 24,
411	.end = 24,
412	.flags = IORESOURCE_DMA,
413	},
414	};
415
416	struct platform_device pxa25x_device_assp = {
417	/* ASSP is basically equivalent to NSSP */
418	.name = "pxa25x-nssp",
419	.id = 2,
420	.dev = {
421	.dma_mask = &pxa25x_assp_dma_mask,
422	.coherent_dma_mask = DMA_BIT_MASK(32),
423	},
424	.resource = pxa25x_resource_assp,
425	.num_resources = ARRAY_SIZE(pxa25x_resource_assp),
426	};
427	#endif /* CONFIG_PXA25x */
428
429	#if defined(CONFIG_PXA27x) \|\| defined(CONFIG_PXA3xx)
430
37320980	431	static struct resource pxa27x_resource_keypad[] = {
	432	[0] = {
	433	.start = 0x41500000,
	434	.end = 0x4150004c,
	435	.flags = IORESOURCE_MEM,
	436	},
	437	[1] = {
	438	.start = IRQ_KEYPAD,
	439	.end = IRQ_KEYPAD,
	440	.flags = IORESOURCE_IRQ,
	441	},
	442	};
	443
	444	struct platform_device pxa27x_device_keypad = {
	445	.name = "pxa27x-keypad",
	446	.id = -1,
	447	.resource = pxa27x_resource_keypad,
	448	.num_resources = ARRAY_SIZE(pxa27x_resource_keypad),
	449	};
	450
	451	void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
	452	{
	453	pxa_register_device(&pxa27x_device_keypad, info);
	454	}
	455
ec68e45b	456	static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
	457
	458	static struct resource pxa27x_resource_ohci[] = {
	459	[0] = {
	460	.start = 0x4C000000,
	461	.end = 0x4C00ff6f,
	462	.flags = IORESOURCE_MEM,
	463	},
	464	[1] = {
	465	.start = IRQ_USBH1,
	466	.end = IRQ_USBH1,
	467	.flags = IORESOURCE_IRQ,
	468	},
	469	};
	470
	471	struct platform_device pxa27x_device_ohci = {
	472	.name = "pxa27x-ohci",
	473	.id = -1,
	474	.dev = {
	475	.dma_mask = &pxa27x_ohci_dma_mask,
	476	.coherent_dma_mask = DMA_BIT_MASK(32),
	477	},
	478	.num_resources = ARRAY_SIZE(pxa27x_resource_ohci),
	479	.resource = pxa27x_resource_ohci,
	480	};
	481
	482	void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
	483	{
	484	pxa_register_device(&pxa27x_device_ohci, info);
	485	}
	486
8f58de7c	487	static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
	488
	489	static struct resource pxa27x_resource_ssp1[] = {
	490	[0] = {
	491	.start = 0x41000000,
	492	.end = 0x4100003f,
	493	.flags = IORESOURCE_MEM,
	494	},
	495	[1] = {
	496	.start = IRQ_SSP,
	497	.end = IRQ_SSP,
	498	.flags = IORESOURCE_IRQ,
	499	},
	500	[2] = {
	501	/* DRCMR for RX */
	502	.start = 13,
	503	.end = 13,
	504	.flags = IORESOURCE_DMA,
	505	},
	506	[3] = {
	507	/* DRCMR for TX */
	508	.start = 14,
	509	.end = 14,
	510	.flags = IORESOURCE_DMA,
	511	},
	512	};
	513
	514	struct platform_device pxa27x_device_ssp1 = {
	515	.name = "pxa27x-ssp",
	516	.id = 0,
	517	.dev = {
	518	.dma_mask = &pxa27x_ssp1_dma_mask,
	519	.coherent_dma_mask = DMA_BIT_MASK(32),
	520	},
	521	.resource = pxa27x_resource_ssp1,
	522	.num_resources = ARRAY_SIZE(pxa27x_resource_ssp1),
	523	};
	524
	525	static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);
	526
	527	static struct resource pxa27x_resource_ssp2[] = {
	528	[0] = {
	529	.start = 0x41700000,
	530	.end = 0x4170003f,
	531	.flags = IORESOURCE_MEM,
	532	},
	533	[1] = {
	534	.start = IRQ_SSP2,
	535	.end = IRQ_SSP2,
	536	.flags = IORESOURCE_IRQ,
	537	},
	538	[2] = {
	539	/* DRCMR for RX */
	540	.start = 15,
	541	.end = 15,
	542	.flags = IORESOURCE_DMA,
	543	},
	544	[3] = {
	545	/* DRCMR for TX */
	546	.start = 16,
	547	.end = 16,
	548	.flags = IORESOURCE_DMA,
	549	},
	550	};
551
552	struct platform_device pxa27x_device_ssp2 = {
553	.name = "pxa27x-ssp",
554	.id = 1,
555	.dev = {
556	.dma_mask = &pxa27x_ssp2_dma_mask,
557	.coherent_dma_mask = DMA_BIT_MASK(32),
558	},
559	.resource = pxa27x_resource_ssp2,
560	.num_resources = ARRAY_SIZE(pxa27x_resource_ssp2),
561	};
562
563	static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);
564
565	static struct resource pxa27x_resource_ssp3[] = {
566	[0] = {
567	.start = 0x41900000,
568	.end = 0x4190003f,
569	.flags = IORESOURCE_MEM,
570	},
571	[1] = {
572	.start = IRQ_SSP3,
573	.end = IRQ_SSP3,
574	.flags = IORESOURCE_IRQ,
575	},
576	[2] = {
577	/* DRCMR for RX */
578	.start = 66,
579	.end = 66,
580	.flags = IORESOURCE_DMA,
581	},
582	[3] = {
583	/* DRCMR for TX */
584	.start = 67,
585	.end = 67,
586	.flags = IORESOURCE_DMA,
587	},
588	};
589
590	struct platform_device pxa27x_device_ssp3 = {
591	.name = "pxa27x-ssp",
592	.id = 2,
593	.dev = {
594	.dma_mask = &pxa27x_ssp3_dma_mask,
595	.coherent_dma_mask = DMA_BIT_MASK(32),
596	},
597	.resource = pxa27x_resource_ssp3,
598	.num_resources = ARRAY_SIZE(pxa27x_resource_ssp3),
599	};
3f3acefb	600
75540c1a	601	static struct resource pxa27x_resource_pwm0[] = {
	602	[0] = {
	603	.start = 0x40b00000,
	604	.end = 0x40b0001f,
	605	.flags = IORESOURCE_MEM,
	606	},
	607	};
	608
	609	struct platform_device pxa27x_device_pwm0 = {
	610	.name = "pxa27x-pwm",
	611	.id = 0,
	612	.resource = pxa27x_resource_pwm0,
	613	.num_resources = ARRAY_SIZE(pxa27x_resource_pwm0),
	614	};
	615
	616	static struct resource pxa27x_resource_pwm1[] = {
	617	[0] = {
	618	.start = 0x40c00000,
	619	.end = 0x40c0001f,
	620	.flags = IORESOURCE_MEM,
	621	},
	622	};
	623
	624	struct platform_device pxa27x_device_pwm1 = {
	625	.name = "pxa27x-pwm",
	626	.id = 1,
	627	.resource = pxa27x_resource_pwm1,
	628	.num_resources = ARRAY_SIZE(pxa27x_resource_pwm1),
	629	};
	630
3f3acefb GL	631	static struct resource pxa27x_resource_camera[] = {
	632	[0] = {
	633	.start = 0x50000000,
	634	.end = 0x50000fff,
	635	.flags = IORESOURCE_MEM,
	636	},
	637	[1] = {
	638	.start = IRQ_CAMERA,
	639	.end = IRQ_CAMERA,
	640	.flags = IORESOURCE_IRQ,
	641	},
	642	};
	643
	644	static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);
	645
	646	static struct platform_device pxa27x_device_camera = {
	647	.name = "pxa27x-camera",
	648	.id = 0, /* This is used to put cameras on this interface */
	649	.dev = {
	650	.dma_mask = &pxa27x_dma_mask_camera,
	651	.coherent_dma_mask = 0xffffffff,
	652	},
	653	.num_resources = ARRAY_SIZE(pxa27x_resource_camera),
	654	.resource = pxa27x_resource_camera,
	655	};
	656
	657	void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
	658	{
	659	pxa_register_device(&pxa27x_device_camera, info);
	660	}
8f58de7c	661	#endif /* CONFIG_PXA27x \|\| CONFIG_PXA3xx */
	662
	663	#ifdef CONFIG_PXA3xx
	664	static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
	665
	666	static struct resource pxa3xx_resource_ssp4[] = {
	667	[0] = {
	668	.start = 0x41a00000,
	669	.end = 0x41a0003f,
	670	.flags = IORESOURCE_MEM,
	671	},
	672	[1] = {
	673	.start = IRQ_SSP4,
	674	.end = IRQ_SSP4,
	675	.flags = IORESOURCE_IRQ,
	676	},
	677	[2] = {
	678	/* DRCMR for RX */
	679	.start = 2,
	680	.end = 2,
	681	.flags = IORESOURCE_DMA,
	682	},
	683	[3] = {
	684	/* DRCMR for TX */
	685	.start = 3,
	686	.end = 3,
	687	.flags = IORESOURCE_DMA,
	688	},
	689	};
	690
	691	struct platform_device pxa3xx_device_ssp4 = {
	692	/* PXA3xx SSP is basically equivalent to PXA27x */
	693	.name = "pxa27x-ssp",
	694	.id = 3,
	695	.dev = {
	696	.dma_mask = &pxa3xx_ssp4_dma_mask,
	697	.coherent_dma_mask = DMA_BIT_MASK(32),
	698	},
	699	.resource = pxa3xx_resource_ssp4,
	700	.num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4),
	701	};
8d33b055 BW	702
	703	static struct resource pxa3xx_resources_mci2[] = {
	704	[0] = {
	705	.start = 0x42000000,
	706	.end = 0x42000fff,
	707	.flags = IORESOURCE_MEM,
	708	},
	709	[1] = {
	710	.start = IRQ_MMC2,
	711	.end = IRQ_MMC2,
	712	.flags = IORESOURCE_IRQ,
	713	},
	714	[2] = {
	715	.start = 93,
	716	.end = 93,
	717	.flags = IORESOURCE_DMA,
	718	},
	719	[3] = {
	720	.start = 94,
	721	.end = 94,
	722	.flags = IORESOURCE_DMA,
	723	},
	724	};
	725
	726	struct platform_device pxa3xx_device_mci2 = {
	727	.name = "pxa2xx-mci",
	728	.id = 1,
	729	.dev = {
	730	.dma_mask = &pxamci_dmamask,
	731	.coherent_dma_mask = 0xffffffff,
	732	},
	733	.num_resources = ARRAY_SIZE(pxa3xx_resources_mci2),
	734	.resource = pxa3xx_resources_mci2,
	735	};
	736
	737	void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info)
	738	{
	739	pxa_register_device(&pxa3xx_device_mci2, info);
	740	}
	741
5a1f21b1 BW	742	static struct resource pxa3xx_resources_mci3[] = {
	743	[0] = {
	744	.start = 0x42500000,
	745	.end = 0x42500fff,
	746	.flags = IORESOURCE_MEM,
	747	},
	748	[1] = {
	749	.start = IRQ_MMC3,
	750	.end = IRQ_MMC3,
	751	.flags = IORESOURCE_IRQ,
	752	},
	753	[2] = {
	754	.start = 100,
	755	.end = 100,
	756	.flags = IORESOURCE_DMA,
	757	},
	758	[3] = {
	759	.start = 101,
	760	.end = 101,
	761	.flags = IORESOURCE_DMA,
	762	},
	763	};
	764
	765	struct platform_device pxa3xx_device_mci3 = {
	766	.name = "pxa2xx-mci",
	767	.id = 2,
	768	.dev = {
	769	.dma_mask = &pxamci_dmamask,
	770	.coherent_dma_mask = 0xffffffff,
	771	},
	772	.num_resources = ARRAY_SIZE(pxa3xx_resources_mci3),
	773	.resource = pxa3xx_resources_mci3,
	774	};
	775
	776	void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
	777	{
	778	pxa_register_device(&pxa3xx_device_mci3, info);
	779	}
	780
8f58de7c	781	#endif /* CONFIG_PXA3xx */