[deliverable/linux.git] / arch / arm / mach-pxa / devices.c

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>

#include <asm/arch/gpio.h>
#include <asm/arch/udc.h>
#include <asm/arch/pxafb.h>
#include <asm/arch/mmc.h>
#include <asm/arch/irda.h>
#include <asm/arch/i2c.h>
#include <asm/arch/mfp-pxa27x.h>
#include <asm/arch/ohci.h>
#include <asm/arch/pxa27x_keypad.h>
#include <asm/arch/pxa2xx_spi.h>
#include <asm/arch/camera.h>
#include <asm/arch/audio.h>

#include "devices.h"
#include "generic.h"

void __init pxa_register_device(struct platform_device *dev, void *data)
{
	int ret;

	dev->dev.platform_data = data;

	ret = platform_device_register(dev);
	if (ret)
		dev_err(&dev->dev, "unable to register device: %d\n", ret);
}

static struct resource pxamci_resources[] = {
	[0] = {
		.start	= 0x41100000,
		.end	= 0x41100fff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_MMC,
		.end	= IRQ_MMC,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		.start	= 21,
		.end	= 21,
		.flags	= IORESOURCE_DMA,
	},
	[3] = {
		.start	= 22,
		.end	= 22,
		.flags	= IORESOURCE_DMA,
	},
};

static u64 pxamci_dmamask = 0xffffffffUL;

struct platform_device pxa_device_mci = {
	.name		= "pxa2xx-mci",
	.id		= 0,
	.dev		= {
		.dma_mask = &pxamci_dmamask,
		.coherent_dma_mask = 0xffffffff,
	},
	.num_resources	= ARRAY_SIZE(pxamci_resources),
	.resource	= pxamci_resources,
};

void __init pxa_set_mci_info(struct pxamci_platform_data *info)
{
	pxa_register_device(&pxa_device_mci, info);
}


static struct pxa2xx_udc_mach_info pxa_udc_info;

void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
{
	memcpy(&pxa_udc_info, info, sizeof *info);
}

static struct resource pxa2xx_udc_resources[] = {
	[0] = {
		.start	= 0x40600000,
		.end	= 0x4060ffff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_USB,
		.end	= IRQ_USB,
		.flags	= IORESOURCE_IRQ,
	},
};

static u64 udc_dma_mask = ~(u32)0;

struct platform_device pxa25x_device_udc = {
	.name		= "pxa25x-udc",
	.id		= -1,
	.resource	= pxa2xx_udc_resources,
	.num_resources	= ARRAY_SIZE(pxa2xx_udc_resources),
	.dev		=  {
		.platform_data	= &pxa_udc_info,
		.dma_mask	= &udc_dma_mask,
	}
};

struct platform_device pxa27x_device_udc = {
	.name		= "pxa27x-udc",
	.id		= -1,
	.resource	= pxa2xx_udc_resources,
	.num_resources	= ARRAY_SIZE(pxa2xx_udc_resources),
	.dev		=  {
		.platform_data	= &pxa_udc_info,
		.dma_mask	= &udc_dma_mask,
	}
};

static struct resource pxafb_resources[] = {
	[0] = {
		.start	= 0x44000000,
		.end	= 0x4400ffff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_LCD,
		.end	= IRQ_LCD,
		.flags	= IORESOURCE_IRQ,
	},
};

static u64 fb_dma_mask = ~(u64)0;

struct platform_device pxa_device_fb = {
	.name		= "pxa2xx-fb",
	.id		= -1,
	.dev		= {
		.dma_mask	= &fb_dma_mask,
		.coherent_dma_mask = 0xffffffff,
	},
	.num_resources	= ARRAY_SIZE(pxafb_resources),
	.resource	= pxafb_resources,
};

void __init set_pxa_fb_info(struct pxafb_mach_info *info)
{
	pxa_register_device(&pxa_device_fb, info);
}

void __init set_pxa_fb_parent(struct device *parent_dev)
{
	pxa_device_fb.dev.parent = parent_dev;
}

static struct resource pxa_resource_ffuart[] = {
	{
		.start	= __PREG(FFUART),
		.end	= __PREG(FFUART) + 35,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_FFUART,
		.end	= IRQ_FFUART,
		.flags	= IORESOURCE_IRQ,
	}
};

struct platform_device pxa_device_ffuart= {
	.name		= "pxa2xx-uart",
	.id		= 0,
	.resource	= pxa_resource_ffuart,
	.num_resources	= ARRAY_SIZE(pxa_resource_ffuart),
};

static struct resource pxa_resource_btuart[] = {
	{
		.start	= __PREG(BTUART),
		.end	= __PREG(BTUART) + 35,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_BTUART,
		.end	= IRQ_BTUART,
		.flags	= IORESOURCE_IRQ,
	}
};

struct platform_device pxa_device_btuart = {
	.name		= "pxa2xx-uart",
	.id		= 1,
	.resource	= pxa_resource_btuart,
	.num_resources	= ARRAY_SIZE(pxa_resource_btuart),
};

static struct resource pxa_resource_stuart[] = {
	{
		.start	= __PREG(STUART),
		.end	= __PREG(STUART) + 35,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_STUART,
		.end	= IRQ_STUART,
		.flags	= IORESOURCE_IRQ,
	}
};

struct platform_device pxa_device_stuart = {
	.name		= "pxa2xx-uart",
	.id		= 2,
	.resource	= pxa_resource_stuart,
	.num_resources	= ARRAY_SIZE(pxa_resource_stuart),
};

static struct resource pxa_resource_hwuart[] = {
	{
		.start	= __PREG(HWUART),
		.end	= __PREG(HWUART) + 47,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_HWUART,
		.end	= IRQ_HWUART,
		.flags	= IORESOURCE_IRQ,
	}
};

struct platform_device pxa_device_hwuart = {
	.name		= "pxa2xx-uart",
	.id		= 3,
	.resource	= pxa_resource_hwuart,
	.num_resources	= ARRAY_SIZE(pxa_resource_hwuart),
};

static struct resource pxai2c_resources[] = {
	{
		.start	= 0x40301680,
		.end	= 0x403016a3,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_I2C,
		.end	= IRQ_I2C,
		.flags	= IORESOURCE_IRQ,
	},
};

struct platform_device pxa_device_i2c = {
	.name		= "pxa2xx-i2c",
	.id		= 0,
	.resource	= pxai2c_resources,
	.num_resources	= ARRAY_SIZE(pxai2c_resources),
};

static unsigned long pxa27x_i2c_mfp_cfg[] = {
	GPIO117_I2C_SCL,
	GPIO118_I2C_SDA,
};

void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
{
	if (cpu_is_pxa27x())
		pxa2xx_mfp_config(ARRAY_AND_SIZE(pxa27x_i2c_mfp_cfg));
	pxa_register_device(&pxa_device_i2c, info);
}

static struct resource pxai2s_resources[] = {
	{
		.start	= 0x40400000,
		.end	= 0x40400083,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IRQ_I2S,
		.end	= IRQ_I2S,
		.flags	= IORESOURCE_IRQ,
	},
};

struct platform_device pxa_device_i2s = {
	.name		= "pxa2xx-i2s",
	.id		= -1,
	.resource	= pxai2s_resources,
	.num_resources	= ARRAY_SIZE(pxai2s_resources),
};

static u64 pxaficp_dmamask = ~(u32)0;

struct platform_device pxa_device_ficp = {
	.name		= "pxa2xx-ir",
	.id		= -1,
	.dev		= {
		.dma_mask = &pxaficp_dmamask,
		.coherent_dma_mask = 0xffffffff,
	},
};

void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
{
	pxa_register_device(&pxa_device_ficp, info);
}

struct platform_device pxa_device_rtc = {
	.name		= "sa1100-rtc",
	.id		= -1,
};

static struct resource pxa_ac97_resources[] = {
	[0] = {
		.start  = 0x40500000,
		.end	= 0x40500000 + 0xfff,
		.flags  = IORESOURCE_MEM,
	},
	[1] = {
		.start  = IRQ_AC97,
		.end    = IRQ_AC97,
		.flags  = IORESOURCE_IRQ,
	},
};

static u64 pxa_ac97_dmamask = 0xffffffffUL;

struct platform_device pxa_device_ac97 = {
	.name           = "pxa2xx-ac97",
	.id             = -1,
	.dev            = {
		.dma_mask = &pxa_ac97_dmamask,
		.coherent_dma_mask = 0xffffffff,
	},
	.num_resources  = ARRAY_SIZE(pxa_ac97_resources),
	.resource       = pxa_ac97_resources,
};

void __init pxa_set_ac97_info(pxa2xx_audio_ops_t *ops)
{
	pxa_register_device(&pxa_device_ac97, ops);
}

#ifdef CONFIG_PXA25x

static struct resource pxa25x_resource_pwm0[] = {
	[0] = {
		.start	= 0x40b00000,
		.end	= 0x40b0000f,
		.flags	= IORESOURCE_MEM,
	},
};

struct platform_device pxa25x_device_pwm0 = {
	.name		= "pxa25x-pwm",
	.id		= 0,
	.resource	= pxa25x_resource_pwm0,
	.num_resources	= ARRAY_SIZE(pxa25x_resource_pwm0),
};

static struct resource pxa25x_resource_pwm1[] = {
	[0] = {
		.start	= 0x40c00000,
		.end	= 0x40c0000f,
		.flags	= IORESOURCE_MEM,
	},
};

struct platform_device pxa25x_device_pwm1 = {
	.name		= "pxa25x-pwm",
	.id		= 1,
	.resource	= pxa25x_resource_pwm1,
	.num_resources	= ARRAY_SIZE(pxa25x_resource_pwm1),
};

static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);

static struct resource pxa25x_resource_ssp[] = {
	[0] = {
		.start	= 0x41000000,
		.end	= 0x4100001f,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_SSP,
		.end	= IRQ_SSP,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		/* DRCMR for RX */
		.start	= 13,
		.end	= 13,
		.flags	= IORESOURCE_DMA,
	},
	[3] = {
		/* DRCMR for TX */
		.start	= 14,
		.end	= 14,
		.flags	= IORESOURCE_DMA,
	},
};

struct platform_device pxa25x_device_ssp = {
	.name		= "pxa25x-ssp",
	.id		= 0,
	.dev		= {
		.dma_mask = &pxa25x_ssp_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.resource	= pxa25x_resource_ssp,
	.num_resources	= ARRAY_SIZE(pxa25x_resource_ssp),
};

static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);

static struct resource pxa25x_resource_nssp[] = {
	[0] = {
		.start	= 0x41400000,
		.end	= 0x4140002f,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_NSSP,
		.end	= IRQ_NSSP,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		/* DRCMR for RX */
		.start	= 15,
		.end	= 15,
		.flags	= IORESOURCE_DMA,
	},
	[3] = {
		/* DRCMR for TX */
		.start	= 16,
		.end	= 16,
		.flags	= IORESOURCE_DMA,
	},
};

struct platform_device pxa25x_device_nssp = {
	.name		= "pxa25x-nssp",
	.id		= 1,
	.dev		= {
		.dma_mask = &pxa25x_nssp_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.resource	= pxa25x_resource_nssp,
	.num_resources	= ARRAY_SIZE(pxa25x_resource_nssp),
};

static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);

static struct resource pxa25x_resource_assp[] = {
	[0] = {
		.start	= 0x41500000,
		.end	= 0x4150002f,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_ASSP,
		.end	= IRQ_ASSP,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		/* DRCMR for RX */
		.start	= 23,
		.end	= 23,
		.flags	= IORESOURCE_DMA,
	},
	[3] = {
		/* DRCMR for TX */
		.start	= 24,
		.end	= 24,
		.flags	= IORESOURCE_DMA,
	},
};

struct platform_device pxa25x_device_assp = {
	/* ASSP is basically equivalent to NSSP */
	.name		= "pxa25x-nssp",
	.id		= 2,
	.dev		= {
		.dma_mask = &pxa25x_assp_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.resource	= pxa25x_resource_assp,
	.num_resources	= ARRAY_SIZE(pxa25x_resource_assp),
};
#endif /* CONFIG_PXA25x */

#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)

static struct resource pxa27x_resource_keypad[] = {
	[0] = {
		.start	= 0x41500000,
		.end	= 0x4150004c,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_KEYPAD,
		.end	= IRQ_KEYPAD,
		.flags	= IORESOURCE_IRQ,
	},
};

struct platform_device pxa27x_device_keypad = {
	.name		= "pxa27x-keypad",
	.id		= -1,
	.resource	= pxa27x_resource_keypad,
	.num_resources	= ARRAY_SIZE(pxa27x_resource_keypad),
};

void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
{
	pxa_register_device(&pxa27x_device_keypad, info);
}

static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);

static struct resource pxa27x_resource_ohci[] = {
	[0] = {
		.start  = 0x4C000000,
		.end    = 0x4C00ff6f,
		.flags  = IORESOURCE_MEM,
	},
	[1] = {
		.start  = IRQ_USBH1,
		.end    = IRQ_USBH1,
		.flags  = IORESOURCE_IRQ,
	},
};

struct platform_device pxa27x_device_ohci = {
	.name		= "pxa27x-ohci",
	.id		= -1,
	.dev		= {
		.dma_mask = &pxa27x_ohci_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.num_resources  = ARRAY_SIZE(pxa27x_resource_ohci),
	.resource       = pxa27x_resource_ohci,
};

void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
{
	pxa_register_device(&pxa27x_device_ohci, info);
}

static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);

static struct resource pxa27x_resource_ssp1[] = {
	[0] = {
		.start	= 0x41000000,
		.end	= 0x4100003f,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_SSP,
		.end	= IRQ_SSP,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		/* DRCMR for RX */
		.start	= 13,
		.end	= 13,
		.flags	= IORESOURCE_DMA,
	},
	[3] = {
		/* DRCMR for TX */
		.start	= 14,
		.end	= 14,
		.flags	= IORESOURCE_DMA,
	},
};

struct platform_device pxa27x_device_ssp1 = {
	.name		= "pxa27x-ssp",
	.id		= 0,
	.dev		= {
		.dma_mask = &pxa27x_ssp1_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.resource	= pxa27x_resource_ssp1,
	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp1),
};

static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);

static struct resource pxa27x_resource_ssp2[] = {
	[0] = {
		.start	= 0x41700000,
		.end	= 0x4170003f,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_SSP2,
		.end	= IRQ_SSP2,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		/* DRCMR for RX */
		.start	= 15,
		.end	= 15,
		.flags	= IORESOURCE_DMA,
	},
	[3] = {
		/* DRCMR for TX */
		.start	= 16,
		.end	= 16,
		.flags	= IORESOURCE_DMA,
	},
};

struct platform_device pxa27x_device_ssp2 = {
	.name		= "pxa27x-ssp",
	.id		= 1,
	.dev		= {
		.dma_mask = &pxa27x_ssp2_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.resource	= pxa27x_resource_ssp2,
	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp2),
};

static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);

static struct resource pxa27x_resource_ssp3[] = {
	[0] = {
		.start	= 0x41900000,
		.end	= 0x4190003f,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_SSP3,
		.end	= IRQ_SSP3,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		/* DRCMR for RX */
		.start	= 66,
		.end	= 66,
		.flags	= IORESOURCE_DMA,
	},
	[3] = {
		/* DRCMR for TX */
		.start	= 67,
		.end	= 67,
		.flags	= IORESOURCE_DMA,
	},
};

struct platform_device pxa27x_device_ssp3 = {
	.name		= "pxa27x-ssp",
	.id		= 2,
	.dev		= {
		.dma_mask = &pxa27x_ssp3_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.resource	= pxa27x_resource_ssp3,
	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp3),
};

static struct resource pxa27x_resource_pwm0[] = {
	[0] = {
		.start	= 0x40b00000,
		.end	= 0x40b0001f,
		.flags	= IORESOURCE_MEM,
	},
};

struct platform_device pxa27x_device_pwm0 = {
	.name		= "pxa27x-pwm",
	.id		= 0,
	.resource	= pxa27x_resource_pwm0,
	.num_resources	= ARRAY_SIZE(pxa27x_resource_pwm0),
};

static struct resource pxa27x_resource_pwm1[] = {
	[0] = {
		.start	= 0x40c00000,
		.end	= 0x40c0001f,
		.flags	= IORESOURCE_MEM,
	},
};

struct platform_device pxa27x_device_pwm1 = {
	.name		= "pxa27x-pwm",
	.id		= 1,
	.resource	= pxa27x_resource_pwm1,
	.num_resources	= ARRAY_SIZE(pxa27x_resource_pwm1),
};

static struct resource pxa27x_resource_camera[] = {
	[0] = {
		.start	= 0x50000000,
		.end	= 0x50000fff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_CAMERA,
		.end	= IRQ_CAMERA,
		.flags	= IORESOURCE_IRQ,
	},
};

static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);

static struct platform_device pxa27x_device_camera = {
	.name		= "pxa27x-camera",
	.id		= 0, /* This is used to put cameras on this interface */
	.dev		= {
		.dma_mask      		= &pxa27x_dma_mask_camera,
		.coherent_dma_mask	= 0xffffffff,
	},
	.num_resources	= ARRAY_SIZE(pxa27x_resource_camera),
	.resource	= pxa27x_resource_camera,
};

void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
{
	pxa_register_device(&pxa27x_device_camera, info);
}
#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */

#ifdef CONFIG_PXA3xx
static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);

static struct resource pxa3xx_resource_ssp4[] = {
	[0] = {
		.start	= 0x41a00000,
		.end	= 0x41a0003f,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_SSP4,
		.end	= IRQ_SSP4,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		/* DRCMR for RX */
		.start	= 2,
		.end	= 2,
		.flags	= IORESOURCE_DMA,
	},
	[3] = {
		/* DRCMR for TX */
		.start	= 3,
		.end	= 3,
		.flags	= IORESOURCE_DMA,
	},
};

struct platform_device pxa3xx_device_ssp4 = {
	/* PXA3xx SSP is basically equivalent to PXA27x */
	.name		= "pxa27x-ssp",
	.id		= 3,
	.dev		= {
		.dma_mask = &pxa3xx_ssp4_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.resource	= pxa3xx_resource_ssp4,
	.num_resources	= ARRAY_SIZE(pxa3xx_resource_ssp4),
};

static struct resource pxa3xx_resources_mci2[] = {
	[0] = {
		.start	= 0x42000000,
		.end	= 0x42000fff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_MMC2,
		.end	= IRQ_MMC2,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		.start	= 93,
		.end	= 93,
		.flags	= IORESOURCE_DMA,
	},
	[3] = {
		.start	= 94,
		.end	= 94,
		.flags	= IORESOURCE_DMA,
	},
};

struct platform_device pxa3xx_device_mci2 = {
	.name		= "pxa2xx-mci",
	.id		= 1,
	.dev		= {
		.dma_mask = &pxamci_dmamask,
		.coherent_dma_mask =	0xffffffff,
	},
	.num_resources	= ARRAY_SIZE(pxa3xx_resources_mci2),
	.resource	= pxa3xx_resources_mci2,
};

void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info)
{
	pxa_register_device(&pxa3xx_device_mci2, info);
}

static struct resource pxa3xx_resources_mci3[] = {
	[0] = {
		.start	= 0x42500000,
		.end	= 0x42500fff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_MMC3,
		.end	= IRQ_MMC3,
		.flags	= IORESOURCE_IRQ,
	},
	[2] = {
		.start	= 100,
		.end	= 100,
		.flags	= IORESOURCE_DMA,
	},
	[3] = {
		.start	= 101,
		.end	= 101,
		.flags	= IORESOURCE_DMA,
	},
};

struct platform_device pxa3xx_device_mci3 = {
	.name		= "pxa2xx-mci",
	.id		= 2,
	.dev		= {
		.dma_mask = &pxamci_dmamask,
		.coherent_dma_mask = 0xffffffff,
	},
	.num_resources	= ARRAY_SIZE(pxa3xx_resources_mci3),
	.resource	= pxa3xx_resources_mci3,
};

void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
{
	pxa_register_device(&pxa3xx_device_mci3, info);
}

#endif /* CONFIG_PXA3xx */

/* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
 * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */
void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info)
{
	struct platform_device *pd;

	pd = platform_device_alloc("pxa2xx-spi", id);
	if (pd == NULL) {
		printk(KERN_ERR "pxa2xx-spi: failed to allocate device id %d\n",
		       id);
		return;
	}

	pd->dev.platform_data = info;
	platform_device_add(pd);
}
Commit	Line	Data
8f58de7c	1	#include <linux/module.h>
	2	#include <linux/kernel.h>
	3	#include <linux/init.h>
	4	#include <linux/platform_device.h>
	5	#include <linux/dma-mapping.h>
	6
	7	#include <asm/arch/gpio.h>
	8	#include <asm/arch/udc.h>
	9	#include <asm/arch/pxafb.h>
	10	#include <asm/arch/mmc.h>
	11	#include <asm/arch/irda.h>
	12	#include <asm/arch/i2c.h>
bc3a5959	13	#include <asm/arch/mfp-pxa27x.h>
cd5604d5	14	#include <asm/arch/ohci.h>
37320980	15	#include <asm/arch/pxa27x_keypad.h>
e172274c	16	#include <asm/arch/pxa2xx_spi.h>
3f3acefb	17	#include <asm/arch/camera.h>
9f19d638	18	#include <asm/arch/audio.h>
8f58de7c	19
8f58de7c	20	#include "devices.h"
bc3a5959	21	#include "generic.h"
8f58de7c	22
	23	void __init pxa_register_device(struct platform_device dev, void data)
	24	{
	25	int ret;
	26
	27	dev->dev.platform_data = data;
	28
	29	ret = platform_device_register(dev);
	30	if (ret)
	31	dev_err(&dev->dev, "unable to register device: %d\n", ret);
	32	}
	33
	34	static struct resource pxamci_resources[] = {
	35	[0] = {
	36	.start = 0x41100000,
	37	.end = 0x41100fff,
	38	.flags = IORESOURCE_MEM,
	39	},
	40	[1] = {
	41	.start = IRQ_MMC,
	42	.end = IRQ_MMC,
	43	.flags = IORESOURCE_IRQ,
	44	},
	45	[2] = {
	46	.start = 21,
	47	.end = 21,
	48	.flags = IORESOURCE_DMA,
	49	},
	50	[3] = {
	51	.start = 22,
	52	.end = 22,
	53	.flags = IORESOURCE_DMA,
	54	},
	55	};
	56
	57	static u64 pxamci_dmamask = 0xffffffffUL;
	58
	59	struct platform_device pxa_device_mci = {
	60	.name = "pxa2xx-mci",
fafc9d3f	61	.id = 0,
8f58de7c	62	.dev = {
	63	.dma_mask = &pxamci_dmamask,
	64	.coherent_dma_mask = 0xffffffff,
	65	},
	66	.num_resources = ARRAY_SIZE(pxamci_resources),
	67	.resource = pxamci_resources,
	68	};
	69
	70	void __init pxa_set_mci_info(struct pxamci_platform_data *info)
	71	{
	72	pxa_register_device(&pxa_device_mci, info);
	73	}
	74
	75
	76	static struct pxa2xx_udc_mach_info pxa_udc_info;
	77
	78	void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
	79	{
	80	memcpy(&pxa_udc_info, info, sizeof *info);
	81	}
	82
	83	static struct resource pxa2xx_udc_resources[] = {
	84	[0] = {
	85	.start = 0x40600000,
	86	.end = 0x4060ffff,
	87	.flags = IORESOURCE_MEM,
	88	},
	89	[1] = {
	90	.start = IRQ_USB,
	91	.end = IRQ_USB,
	92	.flags = IORESOURCE_IRQ,
	93	},
	94	};
	95
	96	static u64 udc_dma_mask = ~(u32)0;
	97
7a857620 PZ	98	struct platform_device pxa25x_device_udc = {
	99	.name = "pxa25x-udc",
	100	.id = -1,
	101	.resource = pxa2xx_udc_resources,
	102	.num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
	103	.dev = {
	104	.platform_data = &pxa_udc_info,
	105	.dma_mask = &udc_dma_mask,
	106	}
	107	};
	108
	109	struct platform_device pxa27x_device_udc = {
	110	.name = "pxa27x-udc",
8f58de7c	111	.id = -1,
	112	.resource = pxa2xx_udc_resources,
	113	.num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
	114	.dev = {
	115	.platform_data = &pxa_udc_info,
	116	.dma_mask = &udc_dma_mask,
	117	}
	118	};
	119
	120	static struct resource pxafb_resources[] = {
	121	[0] = {
	122	.start = 0x44000000,
	123	.end = 0x4400ffff,
	124	.flags = IORESOURCE_MEM,
	125	},
	126	[1] = {
	127	.start = IRQ_LCD,
	128	.end = IRQ_LCD,
	129	.flags = IORESOURCE_IRQ,
	130	},
	131	};
	132
	133	static u64 fb_dma_mask = ~(u64)0;
	134
	135	struct platform_device pxa_device_fb = {
	136	.name = "pxa2xx-fb",
	137	.id = -1,
	138	.dev = {
	139	.dma_mask = &fb_dma_mask,
	140	.coherent_dma_mask = 0xffffffff,
	141	},
	142	.num_resources = ARRAY_SIZE(pxafb_resources),
	143	.resource = pxafb_resources,
	144	};
	145
	146	void __init set_pxa_fb_info(struct pxafb_mach_info *info)
	147	{
	148	pxa_register_device(&pxa_device_fb, info);
	149	}
	150
	151	void __init set_pxa_fb_parent(struct device *parent_dev)
	152	{
	153	pxa_device_fb.dev.parent = parent_dev;
	154	}
	155
	156	static struct resource pxa_resource_ffuart[] = {
	157	{
	158	.start = __PREG(FFUART),
	159	.end = __PREG(FFUART) + 35,
	160	.flags = IORESOURCE_MEM,
	161	}, {
	162	.start = IRQ_FFUART,
	163	.end = IRQ_FFUART,
	164	.flags = IORESOURCE_IRQ,
	165	}
	166	};
	167
	168	struct platform_device pxa_device_ffuart= {
	169	.name = "pxa2xx-uart",
	170	.id = 0,
	171	.resource = pxa_resource_ffuart,
	172	.num_resources = ARRAY_SIZE(pxa_resource_ffuart),
	173	};
	174
175	static struct resource pxa_resource_btuart[] = {
176	{
177	.start = __PREG(BTUART),
178	.end = __PREG(BTUART) + 35,
179	.flags = IORESOURCE_MEM,
180	}, {
181	.start = IRQ_BTUART,
182	.end = IRQ_BTUART,
183	.flags = IORESOURCE_IRQ,
184	}
185	};
186
187	struct platform_device pxa_device_btuart = {
188	.name = "pxa2xx-uart",
189	.id = 1,
190	.resource = pxa_resource_btuart,
191	.num_resources = ARRAY_SIZE(pxa_resource_btuart),
192	};
193
194	static struct resource pxa_resource_stuart[] = {
195	{
196	.start = __PREG(STUART),
197	.end = __PREG(STUART) + 35,
198	.flags = IORESOURCE_MEM,
199	}, {
200	.start = IRQ_STUART,
201	.end = IRQ_STUART,
202	.flags = IORESOURCE_IRQ,
203	}
204	};
205
206	struct platform_device pxa_device_stuart = {
207	.name = "pxa2xx-uart",
208	.id = 2,
209	.resource = pxa_resource_stuart,
210	.num_resources = ARRAY_SIZE(pxa_resource_stuart),
211	};
212
213	static struct resource pxa_resource_hwuart[] = {
214	{
215	.start = __PREG(HWUART),
216	.end = __PREG(HWUART) + 47,
217	.flags = IORESOURCE_MEM,
218	}, {
219	.start = IRQ_HWUART,
220	.end = IRQ_HWUART,
221	.flags = IORESOURCE_IRQ,
222	}
223	};
224
225	struct platform_device pxa_device_hwuart = {
226	.name = "pxa2xx-uart",
227	.id = 3,
228	.resource = pxa_resource_hwuart,
229	.num_resources = ARRAY_SIZE(pxa_resource_hwuart),
230	};
231
232	static struct resource pxai2c_resources[] = {
233	{
234	.start = 0x40301680,
235	.end = 0x403016a3,
236	.flags = IORESOURCE_MEM,
237	}, {
238	.start = IRQ_I2C,
239	.end = IRQ_I2C,
240	.flags = IORESOURCE_IRQ,
241	},
242	};
243
244	struct platform_device pxa_device_i2c = {
245	.name = "pxa2xx-i2c",
246	.id = 0,
247	.resource = pxai2c_resources,
248	.num_resources = ARRAY_SIZE(pxai2c_resources),
249	};
250
bc3a5959 PZ	251	static unsigned long pxa27x_i2c_mfp_cfg[] = {
	252	GPIO117_I2C_SCL,
	253	GPIO118_I2C_SDA,
	254	};
	255
8f58de7c	256	void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
8f58de7c	257	{
bc3a5959 PZ	258	if (cpu_is_pxa27x())
bc3a5959 PZ	259	pxa2xx_mfp_config(ARRAY_AND_SIZE(pxa27x_i2c_mfp_cfg));
8f58de7c	260	pxa_register_device(&pxa_device_i2c, info);
	261	}
	262
	263	static struct resource pxai2s_resources[] = {
	264	{
	265	.start = 0x40400000,
	266	.end = 0x40400083,
	267	.flags = IORESOURCE_MEM,
	268	}, {
	269	.start = IRQ_I2S,
	270	.end = IRQ_I2S,
	271	.flags = IORESOURCE_IRQ,
	272	},
	273	};
	274
	275	struct platform_device pxa_device_i2s = {
	276	.name = "pxa2xx-i2s",
	277	.id = -1,
	278	.resource = pxai2s_resources,
	279	.num_resources = ARRAY_SIZE(pxai2s_resources),
	280	};
	281
	282	static u64 pxaficp_dmamask = ~(u32)0;
	283
	284	struct platform_device pxa_device_ficp = {
	285	.name = "pxa2xx-ir",
	286	.id = -1,
	287	.dev = {
	288	.dma_mask = &pxaficp_dmamask,
	289	.coherent_dma_mask = 0xffffffff,
	290	},
	291	};
	292
	293	void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
	294	{
	295	pxa_register_device(&pxa_device_ficp, info);
	296	}
	297
	298	struct platform_device pxa_device_rtc = {
	299	.name = "sa1100-rtc",
	300	.id = -1,
	301	};
	302
9f19d638 MB	303	static struct resource pxa_ac97_resources[] = {
	304	[0] = {
	305	.start = 0x40500000,
	306	.end = 0x40500000 + 0xfff,
	307	.flags = IORESOURCE_MEM,
	308	},
	309	[1] = {
	310	.start = IRQ_AC97,
	311	.end = IRQ_AC97,
	312	.flags = IORESOURCE_IRQ,
	313	},
	314	};
	315
	316	static u64 pxa_ac97_dmamask = 0xffffffffUL;
	317
	318	struct platform_device pxa_device_ac97 = {
	319	.name = "pxa2xx-ac97",
	320	.id = -1,
	321	.dev = {
	322	.dma_mask = &pxa_ac97_dmamask,
	323	.coherent_dma_mask = 0xffffffff,
	324	},
	325	.num_resources = ARRAY_SIZE(pxa_ac97_resources),
	326	.resource = pxa_ac97_resources,
	327	};
	328
	329	void __init pxa_set_ac97_info(pxa2xx_audio_ops_t *ops)
	330	{
	331	pxa_register_device(&pxa_device_ac97, ops);
	332	}
	333
8f58de7c	334	#ifdef CONFIG_PXA25x
8f58de7c	335
75540c1a	336	static struct resource pxa25x_resource_pwm0[] = {
	337	[0] = {
	338	.start = 0x40b00000,
	339	.end = 0x40b0000f,
	340	.flags = IORESOURCE_MEM,
	341	},
	342	};
	343
	344	struct platform_device pxa25x_device_pwm0 = {
	345	.name = "pxa25x-pwm",
	346	.id = 0,
	347	.resource = pxa25x_resource_pwm0,
	348	.num_resources = ARRAY_SIZE(pxa25x_resource_pwm0),
	349	};
	350
	351	static struct resource pxa25x_resource_pwm1[] = {
	352	[0] = {
	353	.start = 0x40c00000,
	354	.end = 0x40c0000f,
	355	.flags = IORESOURCE_MEM,
	356	},
	357	};
	358
	359	struct platform_device pxa25x_device_pwm1 = {
	360	.name = "pxa25x-pwm",
	361	.id = 1,
	362	.resource = pxa25x_resource_pwm1,
	363	.num_resources = ARRAY_SIZE(pxa25x_resource_pwm1),
	364	};
	365
8f58de7c	366	static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
	367
	368	static struct resource pxa25x_resource_ssp[] = {
	369	[0] = {
	370	.start = 0x41000000,
	371	.end = 0x4100001f,
	372	.flags = IORESOURCE_MEM,
	373	},
	374	[1] = {
	375	.start = IRQ_SSP,
	376	.end = IRQ_SSP,
	377	.flags = IORESOURCE_IRQ,
	378	},
	379	[2] = {
	380	/* DRCMR for RX */
	381	.start = 13,
	382	.end = 13,
	383	.flags = IORESOURCE_DMA,
	384	},
	385	[3] = {
	386	/* DRCMR for TX */
	387	.start = 14,
	388	.end = 14,
	389	.flags = IORESOURCE_DMA,
	390	},
	391	};
	392
	393	struct platform_device pxa25x_device_ssp = {
	394	.name = "pxa25x-ssp",
	395	.id = 0,
	396	.dev = {
	397	.dma_mask = &pxa25x_ssp_dma_mask,
	398	.coherent_dma_mask = DMA_BIT_MASK(32),
	399	},
	400	.resource = pxa25x_resource_ssp,
	401	.num_resources = ARRAY_SIZE(pxa25x_resource_ssp),
	402	};
	403
	404	static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);
	405
	406	static struct resource pxa25x_resource_nssp[] = {
	407	[0] = {
	408	.start = 0x41400000,
	409	.end = 0x4140002f,
	410	.flags = IORESOURCE_MEM,
	411	},
	412	[1] = {
	413	.start = IRQ_NSSP,
	414	.end = IRQ_NSSP,
	415	.flags = IORESOURCE_IRQ,
	416	},
	417	[2] = {
	418	/* DRCMR for RX */
	419	.start = 15,
	420	.end = 15,
	421	.flags = IORESOURCE_DMA,
	422	},
	423	[3] = {
	424	/* DRCMR for TX */
	425	.start = 16,
	426	.end = 16,
	427	.flags = IORESOURCE_DMA,
	428	},
	429	};
430
431	struct platform_device pxa25x_device_nssp = {
432	.name = "pxa25x-nssp",
433	.id = 1,
434	.dev = {
435	.dma_mask = &pxa25x_nssp_dma_mask,
436	.coherent_dma_mask = DMA_BIT_MASK(32),
437	},
438	.resource = pxa25x_resource_nssp,
439	.num_resources = ARRAY_SIZE(pxa25x_resource_nssp),
440	};
441
442	static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);
443
444	static struct resource pxa25x_resource_assp[] = {
445	[0] = {
446	.start = 0x41500000,
447	.end = 0x4150002f,
448	.flags = IORESOURCE_MEM,
449	},
450	[1] = {
451	.start = IRQ_ASSP,
452	.end = IRQ_ASSP,
453	.flags = IORESOURCE_IRQ,
454	},
455	[2] = {
456	/* DRCMR for RX */
457	.start = 23,
458	.end = 23,
459	.flags = IORESOURCE_DMA,
460	},
461	[3] = {
462	/* DRCMR for TX */
463	.start = 24,
464	.end = 24,
465	.flags = IORESOURCE_DMA,
466	},
467	};
468
469	struct platform_device pxa25x_device_assp = {
470	/* ASSP is basically equivalent to NSSP */
471	.name = "pxa25x-nssp",
472	.id = 2,
473	.dev = {
474	.dma_mask = &pxa25x_assp_dma_mask,
475	.coherent_dma_mask = DMA_BIT_MASK(32),
476	},
477	.resource = pxa25x_resource_assp,
478	.num_resources = ARRAY_SIZE(pxa25x_resource_assp),
479	};
480	#endif /* CONFIG_PXA25x */
481
482	#if defined(CONFIG_PXA27x) \|\| defined(CONFIG_PXA3xx)
483
37320980	484	static struct resource pxa27x_resource_keypad[] = {
	485	[0] = {
	486	.start = 0x41500000,
	487	.end = 0x4150004c,
	488	.flags = IORESOURCE_MEM,
	489	},
	490	[1] = {
	491	.start = IRQ_KEYPAD,
	492	.end = IRQ_KEYPAD,
	493	.flags = IORESOURCE_IRQ,
	494	},
	495	};
	496
	497	struct platform_device pxa27x_device_keypad = {
	498	.name = "pxa27x-keypad",
	499	.id = -1,
	500	.resource = pxa27x_resource_keypad,
	501	.num_resources = ARRAY_SIZE(pxa27x_resource_keypad),
	502	};
	503
	504	void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
	505	{
	506	pxa_register_device(&pxa27x_device_keypad, info);
	507	}
	508
ec68e45b	509	static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
	510
	511	static struct resource pxa27x_resource_ohci[] = {
	512	[0] = {
	513	.start = 0x4C000000,
	514	.end = 0x4C00ff6f,
	515	.flags = IORESOURCE_MEM,
	516	},
	517	[1] = {
	518	.start = IRQ_USBH1,
	519	.end = IRQ_USBH1,
	520	.flags = IORESOURCE_IRQ,
	521	},
	522	};
	523
	524	struct platform_device pxa27x_device_ohci = {
	525	.name = "pxa27x-ohci",
	526	.id = -1,
	527	.dev = {
	528	.dma_mask = &pxa27x_ohci_dma_mask,
	529	.coherent_dma_mask = DMA_BIT_MASK(32),
	530	},
	531	.num_resources = ARRAY_SIZE(pxa27x_resource_ohci),
	532	.resource = pxa27x_resource_ohci,
	533	};
	534
	535	void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
	536	{
	537	pxa_register_device(&pxa27x_device_ohci, info);
	538	}
	539
8f58de7c	540	static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
	541
	542	static struct resource pxa27x_resource_ssp1[] = {
	543	[0] = {
	544	.start = 0x41000000,
	545	.end = 0x4100003f,
	546	.flags = IORESOURCE_MEM,
	547	},
	548	[1] = {
	549	.start = IRQ_SSP,
	550	.end = IRQ_SSP,
	551	.flags = IORESOURCE_IRQ,
	552	},
	553	[2] = {
	554	/* DRCMR for RX */
	555	.start = 13,
	556	.end = 13,
	557	.flags = IORESOURCE_DMA,
	558	},
	559	[3] = {
	560	/* DRCMR for TX */
	561	.start = 14,
	562	.end = 14,
	563	.flags = IORESOURCE_DMA,
	564	},
	565	};
	566
	567	struct platform_device pxa27x_device_ssp1 = {
	568	.name = "pxa27x-ssp",
	569	.id = 0,
	570	.dev = {
	571	.dma_mask = &pxa27x_ssp1_dma_mask,
	572	.coherent_dma_mask = DMA_BIT_MASK(32),
	573	},
	574	.resource = pxa27x_resource_ssp1,
	575	.num_resources = ARRAY_SIZE(pxa27x_resource_ssp1),
	576	};
	577
	578	static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);
	579
	580	static struct resource pxa27x_resource_ssp2[] = {
	581	[0] = {
	582	.start = 0x41700000,
	583	.end = 0x4170003f,
	584	.flags = IORESOURCE_MEM,
	585	},
	586	[1] = {
	587	.start = IRQ_SSP2,
	588	.end = IRQ_SSP2,
	589	.flags = IORESOURCE_IRQ,
	590	},
	591	[2] = {
	592	/* DRCMR for RX */
	593	.start = 15,
	594	.end = 15,
	595	.flags = IORESOURCE_DMA,
	596	},
	597	[3] = {
	598	/* DRCMR for TX */
	599	.start = 16,
	600	.end = 16,
	601	.flags = IORESOURCE_DMA,
	602	},
	603	};
604
605	struct platform_device pxa27x_device_ssp2 = {
606	.name = "pxa27x-ssp",
607	.id = 1,
608	.dev = {
609	.dma_mask = &pxa27x_ssp2_dma_mask,
610	.coherent_dma_mask = DMA_BIT_MASK(32),
611	},
612	.resource = pxa27x_resource_ssp2,
613	.num_resources = ARRAY_SIZE(pxa27x_resource_ssp2),
614	};
615
616	static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);
617
618	static struct resource pxa27x_resource_ssp3[] = {
619	[0] = {
620	.start = 0x41900000,
621	.end = 0x4190003f,
622	.flags = IORESOURCE_MEM,
623	},
624	[1] = {
625	.start = IRQ_SSP3,
626	.end = IRQ_SSP3,
627	.flags = IORESOURCE_IRQ,
628	},
629	[2] = {
630	/* DRCMR for RX */
631	.start = 66,
632	.end = 66,
633	.flags = IORESOURCE_DMA,
634	},
635	[3] = {
636	/* DRCMR for TX */
637	.start = 67,
638	.end = 67,
639	.flags = IORESOURCE_DMA,
640	},
641	};
642
643	struct platform_device pxa27x_device_ssp3 = {
644	.name = "pxa27x-ssp",
645	.id = 2,
646	.dev = {
647	.dma_mask = &pxa27x_ssp3_dma_mask,
648	.coherent_dma_mask = DMA_BIT_MASK(32),
649	},
650	.resource = pxa27x_resource_ssp3,
651	.num_resources = ARRAY_SIZE(pxa27x_resource_ssp3),
652	};
3f3acefb	653
75540c1a	654	static struct resource pxa27x_resource_pwm0[] = {
	655	[0] = {
	656	.start = 0x40b00000,
	657	.end = 0x40b0001f,
	658	.flags = IORESOURCE_MEM,
	659	},
	660	};
	661
	662	struct platform_device pxa27x_device_pwm0 = {
	663	.name = "pxa27x-pwm",
	664	.id = 0,
	665	.resource = pxa27x_resource_pwm0,
	666	.num_resources = ARRAY_SIZE(pxa27x_resource_pwm0),
	667	};
	668
	669	static struct resource pxa27x_resource_pwm1[] = {
	670	[0] = {
	671	.start = 0x40c00000,
	672	.end = 0x40c0001f,
	673	.flags = IORESOURCE_MEM,
	674	},
	675	};
	676
	677	struct platform_device pxa27x_device_pwm1 = {
	678	.name = "pxa27x-pwm",
	679	.id = 1,
	680	.resource = pxa27x_resource_pwm1,
	681	.num_resources = ARRAY_SIZE(pxa27x_resource_pwm1),
	682	};
	683
3f3acefb GL	684	static struct resource pxa27x_resource_camera[] = {
	685	[0] = {
	686	.start = 0x50000000,
	687	.end = 0x50000fff,
	688	.flags = IORESOURCE_MEM,
	689	},
	690	[1] = {
	691	.start = IRQ_CAMERA,
	692	.end = IRQ_CAMERA,
	693	.flags = IORESOURCE_IRQ,
	694	},
	695	};
	696
	697	static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);
	698
	699	static struct platform_device pxa27x_device_camera = {
	700	.name = "pxa27x-camera",
	701	.id = 0, /* This is used to put cameras on this interface */
	702	.dev = {
	703	.dma_mask = &pxa27x_dma_mask_camera,
	704	.coherent_dma_mask = 0xffffffff,
	705	},
	706	.num_resources = ARRAY_SIZE(pxa27x_resource_camera),
	707	.resource = pxa27x_resource_camera,
	708	};
	709
	710	void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
	711	{
	712	pxa_register_device(&pxa27x_device_camera, info);
	713	}
8f58de7c	714	#endif /* CONFIG_PXA27x \|\| CONFIG_PXA3xx */
	715
	716	#ifdef CONFIG_PXA3xx
	717	static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
	718
	719	static struct resource pxa3xx_resource_ssp4[] = {
	720	[0] = {
	721	.start = 0x41a00000,
	722	.end = 0x41a0003f,
	723	.flags = IORESOURCE_MEM,
	724	},
	725	[1] = {
	726	.start = IRQ_SSP4,
	727	.end = IRQ_SSP4,
	728	.flags = IORESOURCE_IRQ,
	729	},
	730	[2] = {
	731	/* DRCMR for RX */
	732	.start = 2,
	733	.end = 2,
	734	.flags = IORESOURCE_DMA,
	735	},
	736	[3] = {
	737	/* DRCMR for TX */
	738	.start = 3,
	739	.end = 3,
	740	.flags = IORESOURCE_DMA,
	741	},
	742	};
	743
	744	struct platform_device pxa3xx_device_ssp4 = {
	745	/* PXA3xx SSP is basically equivalent to PXA27x */
	746	.name = "pxa27x-ssp",
	747	.id = 3,
	748	.dev = {
	749	.dma_mask = &pxa3xx_ssp4_dma_mask,
	750	.coherent_dma_mask = DMA_BIT_MASK(32),
	751	},
	752	.resource = pxa3xx_resource_ssp4,
	753	.num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4),
	754	};
8d33b055 BW	755
	756	static struct resource pxa3xx_resources_mci2[] = {
	757	[0] = {
	758	.start = 0x42000000,
	759	.end = 0x42000fff,
	760	.flags = IORESOURCE_MEM,
	761	},
	762	[1] = {
	763	.start = IRQ_MMC2,
	764	.end = IRQ_MMC2,
	765	.flags = IORESOURCE_IRQ,
	766	},
	767	[2] = {
	768	.start = 93,
	769	.end = 93,
	770	.flags = IORESOURCE_DMA,
	771	},
	772	[3] = {
	773	.start = 94,
	774	.end = 94,
	775	.flags = IORESOURCE_DMA,
	776	},
	777	};
	778
	779	struct platform_device pxa3xx_device_mci2 = {
	780	.name = "pxa2xx-mci",
	781	.id = 1,
	782	.dev = {
	783	.dma_mask = &pxamci_dmamask,
	784	.coherent_dma_mask = 0xffffffff,
	785	},
	786	.num_resources = ARRAY_SIZE(pxa3xx_resources_mci2),
	787	.resource = pxa3xx_resources_mci2,
	788	};
	789
	790	void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info)
	791	{
	792	pxa_register_device(&pxa3xx_device_mci2, info);
	793	}
	794
5a1f21b1 BW	795	static struct resource pxa3xx_resources_mci3[] = {
	796	[0] = {
	797	.start = 0x42500000,
	798	.end = 0x42500fff,
	799	.flags = IORESOURCE_MEM,
	800	},
	801	[1] = {
	802	.start = IRQ_MMC3,
	803	.end = IRQ_MMC3,
	804	.flags = IORESOURCE_IRQ,
	805	},
	806	[2] = {
	807	.start = 100,
	808	.end = 100,
	809	.flags = IORESOURCE_DMA,
	810	},
	811	[3] = {
	812	.start = 101,
	813	.end = 101,
	814	.flags = IORESOURCE_DMA,
	815	},
	816	};
	817
	818	struct platform_device pxa3xx_device_mci3 = {
	819	.name = "pxa2xx-mci",
	820	.id = 2,
	821	.dev = {
	822	.dma_mask = &pxamci_dmamask,
	823	.coherent_dma_mask = 0xffffffff,
	824	},
	825	.num_resources = ARRAY_SIZE(pxa3xx_resources_mci3),
	826	.resource = pxa3xx_resources_mci3,
	827	};
	828
	829	void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
	830	{
	831	pxa_register_device(&pxa3xx_device_mci3, info);
	832	}
	833
8f58de7c	834	#endif /* CONFIG_PXA3xx */
e172274c GL	835
	836	/* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
	837	* See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */
	838	void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info)
	839	{
	840	struct platform_device *pd;
	841
	842	pd = platform_device_alloc("pxa2xx-spi", id);
	843	if (pd == NULL) {
	844	printk(KERN_ERR "pxa2xx-spi: failed to allocate device id %d\n",
	845	id);
	846	return;
	847	}
	848
	849	pd->dev.platform_data = info;
	850	platform_device_add(pd);
	851	}