Commit | Line | Data |
---|---|---|
3d50527b | 1 | /* |
3c85bce6 | 2 | * Support for CompuLab EM-X270 platform |
3d50527b | 3 | * |
3c85bce6 | 4 | * Copyright (C) 2007, 2008 CompuLab, Ltd. |
3d50527b MR |
5 | * Author: Mike Rapoport <mike@compulab.co.il> |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
12 | #include <linux/irq.h> | |
13 | #include <linux/platform_device.h> | |
14 | ||
15 | #include <linux/dm9000.h> | |
16 | #include <linux/rtc-v3020.h> | |
3d50527b MR |
17 | #include <linux/mtd/nand.h> |
18 | #include <linux/mtd/partitions.h> | |
28c88046 | 19 | #include <linux/mtd/physmap.h> |
3c85bce6 MR |
20 | #include <linux/input.h> |
21 | #include <linux/gpio_keys.h> | |
22 | #include <linux/gpio.h> | |
28c88046 MR |
23 | #include <linux/mfd/da903x.h> |
24 | #include <linux/regulator/machine.h> | |
25 | #include <linux/spi/spi.h> | |
26 | #include <linux/spi/tdo24m.h> | |
27 | ||
28 | #include <media/soc_camera.h> | |
3d50527b MR |
29 | |
30 | #include <asm/mach-types.h> | |
3d50527b MR |
31 | #include <asm/mach/arch.h> |
32 | ||
a09e64fb RK |
33 | #include <mach/mfp-pxa27x.h> |
34 | #include <mach/pxa-regs.h> | |
35 | #include <mach/pxa27x-udc.h> | |
36 | #include <mach/audio.h> | |
37 | #include <mach/pxafb.h> | |
38 | #include <mach/ohci.h> | |
39 | #include <mach/mmc.h> | |
40 | #include <mach/pxa27x_keypad.h> | |
28c88046 MR |
41 | #include <mach/i2c.h> |
42 | #include <mach/camera.h> | |
43 | #include <mach/pxa2xx_spi.h> | |
3d50527b MR |
44 | |
45 | #include "generic.h" | |
6432f46c | 46 | #include "devices.h" |
3d50527b MR |
47 | |
48 | /* GPIO IRQ usage */ | |
3c85bce6 MR |
49 | #define GPIO41_ETHIRQ (41) |
50 | #define GPIO13_MMC_CD (13) | |
51 | #define EM_X270_ETHIRQ IRQ_GPIO(GPIO41_ETHIRQ) | |
3c85bce6 MR |
52 | |
53 | /* NAND control GPIOs */ | |
54 | #define GPIO11_NAND_CS (11) | |
55 | #define GPIO56_NAND_RB (56) | |
56 | ||
28c88046 MR |
57 | /* Miscelaneous GPIOs */ |
58 | #define GPIO93_CAM_RESET (93) | |
6432f46c | 59 | #define GPIO95_MMC_WP (95) |
28c88046 | 60 | |
3c85bce6 MR |
61 | static unsigned long em_x270_pin_config[] = { |
62 | /* AC'97 */ | |
63 | GPIO28_AC97_BITCLK, | |
64 | GPIO29_AC97_SDATA_IN_0, | |
65 | GPIO30_AC97_SDATA_OUT, | |
66 | GPIO31_AC97_SYNC, | |
67 | GPIO98_AC97_SYSCLK, | |
68 | GPIO113_AC97_nRESET, | |
69 | ||
70 | /* BTUART */ | |
71 | GPIO42_BTUART_RXD, | |
72 | GPIO43_BTUART_TXD, | |
73 | GPIO44_BTUART_CTS, | |
74 | GPIO45_BTUART_RTS, | |
75 | ||
76 | /* STUART */ | |
77 | GPIO46_STUART_RXD, | |
78 | GPIO47_STUART_TXD, | |
79 | ||
80 | /* MCI controller */ | |
81 | GPIO32_MMC_CLK, | |
82 | GPIO112_MMC_CMD, | |
83 | GPIO92_MMC_DAT_0, | |
84 | GPIO109_MMC_DAT_1, | |
85 | GPIO110_MMC_DAT_2, | |
86 | GPIO111_MMC_DAT_3, | |
87 | ||
88 | /* LCD */ | |
89 | GPIO58_LCD_LDD_0, | |
90 | GPIO59_LCD_LDD_1, | |
91 | GPIO60_LCD_LDD_2, | |
92 | GPIO61_LCD_LDD_3, | |
93 | GPIO62_LCD_LDD_4, | |
94 | GPIO63_LCD_LDD_5, | |
95 | GPIO64_LCD_LDD_6, | |
96 | GPIO65_LCD_LDD_7, | |
97 | GPIO66_LCD_LDD_8, | |
98 | GPIO67_LCD_LDD_9, | |
99 | GPIO68_LCD_LDD_10, | |
100 | GPIO69_LCD_LDD_11, | |
101 | GPIO70_LCD_LDD_12, | |
102 | GPIO71_LCD_LDD_13, | |
103 | GPIO72_LCD_LDD_14, | |
104 | GPIO73_LCD_LDD_15, | |
105 | GPIO74_LCD_FCLK, | |
106 | GPIO75_LCD_LCLK, | |
107 | GPIO76_LCD_PCLK, | |
108 | GPIO77_LCD_BIAS, | |
109 | ||
110 | /* QCI */ | |
111 | GPIO84_CIF_FV, | |
112 | GPIO25_CIF_LV, | |
113 | GPIO53_CIF_MCLK, | |
114 | GPIO54_CIF_PCLK, | |
115 | GPIO81_CIF_DD_0, | |
116 | GPIO55_CIF_DD_1, | |
117 | GPIO51_CIF_DD_2, | |
118 | GPIO50_CIF_DD_3, | |
119 | GPIO52_CIF_DD_4, | |
120 | GPIO48_CIF_DD_5, | |
121 | GPIO17_CIF_DD_6, | |
122 | GPIO12_CIF_DD_7, | |
123 | ||
124 | /* I2C */ | |
125 | GPIO117_I2C_SCL, | |
126 | GPIO118_I2C_SDA, | |
127 | ||
128 | /* Keypad */ | |
129 | GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH, | |
130 | GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH, | |
131 | GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH, | |
132 | GPIO34_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH, | |
133 | GPIO39_KP_MKIN_4 | WAKEUP_ON_LEVEL_HIGH, | |
134 | GPIO99_KP_MKIN_5 | WAKEUP_ON_LEVEL_HIGH, | |
135 | GPIO91_KP_MKIN_6 | WAKEUP_ON_LEVEL_HIGH, | |
136 | GPIO36_KP_MKIN_7 | WAKEUP_ON_LEVEL_HIGH, | |
137 | GPIO103_KP_MKOUT_0, | |
138 | GPIO104_KP_MKOUT_1, | |
139 | GPIO105_KP_MKOUT_2, | |
140 | GPIO106_KP_MKOUT_3, | |
141 | GPIO107_KP_MKOUT_4, | |
142 | GPIO108_KP_MKOUT_5, | |
143 | GPIO96_KP_MKOUT_6, | |
144 | GPIO22_KP_MKOUT_7, | |
145 | ||
146 | /* SSP1 */ | |
147 | GPIO26_SSP1_RXD, | |
148 | GPIO23_SSP1_SCLK, | |
149 | GPIO24_SSP1_SFRM, | |
150 | GPIO57_SSP1_TXD, | |
151 | ||
152 | /* SSP2 */ | |
153 | GPIO19_SSP2_SCLK, | |
154 | GPIO14_SSP2_SFRM, | |
155 | GPIO89_SSP2_TXD, | |
156 | GPIO88_SSP2_RXD, | |
157 | ||
158 | /* SDRAM and local bus */ | |
159 | GPIO15_nCS_1, | |
160 | GPIO78_nCS_2, | |
161 | GPIO79_nCS_3, | |
162 | GPIO80_nCS_4, | |
163 | GPIO49_nPWE, | |
164 | GPIO18_RDY, | |
165 | ||
166 | /* GPIO */ | |
6432f46c MR |
167 | GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH, /* sleep/resume button */ |
168 | GPIO95_GPIO, /* MMC Write protect */ | |
3c85bce6 MR |
169 | |
170 | /* power controls */ | |
171 | GPIO20_GPIO | MFP_LPM_DRIVE_LOW, /* GPRS_PWEN */ | |
28c88046 | 172 | GPIO93_GPIO | MFP_LPM_DRIVE_LOW, /* Camera reset */ |
3c85bce6 MR |
173 | GPIO115_GPIO | MFP_LPM_DRIVE_LOW, /* WLAN_PWEN */ |
174 | ||
175 | /* NAND controls */ | |
176 | GPIO11_GPIO | MFP_LPM_DRIVE_HIGH, /* NAND CE# */ | |
177 | GPIO56_GPIO, /* NAND Ready/Busy */ | |
178 | ||
179 | /* interrupts */ | |
180 | GPIO13_GPIO, /* MMC card detect */ | |
181 | GPIO41_GPIO, /* DM9000 interrupt */ | |
182 | }; | |
3d50527b | 183 | |
3c85bce6 MR |
184 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) |
185 | static struct resource em_x270_dm9000_resource[] = { | |
3d50527b MR |
186 | [0] = { |
187 | .start = PXA_CS2_PHYS, | |
188 | .end = PXA_CS2_PHYS + 3, | |
189 | .flags = IORESOURCE_MEM, | |
190 | }, | |
191 | [1] = { | |
192 | .start = PXA_CS2_PHYS + 8, | |
193 | .end = PXA_CS2_PHYS + 8 + 0x3f, | |
194 | .flags = IORESOURCE_MEM, | |
195 | }, | |
196 | [2] = { | |
197 | .start = EM_X270_ETHIRQ, | |
198 | .end = EM_X270_ETHIRQ, | |
3c85bce6 | 199 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
3d50527b MR |
200 | } |
201 | }; | |
202 | ||
3c85bce6 | 203 | static struct dm9000_plat_data em_x270_dm9000_platdata = { |
3d50527b MR |
204 | .flags = DM9000_PLATF_32BITONLY, |
205 | }; | |
206 | ||
3c85bce6 | 207 | static struct platform_device em_x270_dm9000 = { |
3d50527b MR |
208 | .name = "dm9000", |
209 | .id = 0, | |
3c85bce6 MR |
210 | .num_resources = ARRAY_SIZE(em_x270_dm9000_resource), |
211 | .resource = em_x270_dm9000_resource, | |
3d50527b | 212 | .dev = { |
3c85bce6 | 213 | .platform_data = &em_x270_dm9000_platdata, |
3d50527b MR |
214 | } |
215 | }; | |
216 | ||
3c85bce6 MR |
217 | static void __init em_x270_init_dm9000(void) |
218 | { | |
219 | platform_device_register(&em_x270_dm9000); | |
220 | } | |
221 | #else | |
222 | static inline void em_x270_init_dm9000(void) {} | |
223 | #endif | |
3d50527b | 224 | |
3c85bce6 MR |
225 | /* V3020 RTC */ |
226 | #if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE) | |
3d50527b MR |
227 | static struct resource em_x270_v3020_resource[] = { |
228 | [0] = { | |
229 | .start = PXA_CS4_PHYS, | |
230 | .end = PXA_CS4_PHYS + 3, | |
231 | .flags = IORESOURCE_MEM, | |
232 | }, | |
233 | }; | |
234 | ||
235 | static struct v3020_platform_data em_x270_v3020_platdata = { | |
236 | .leftshift = 0, | |
237 | }; | |
238 | ||
239 | static struct platform_device em_x270_rtc = { | |
240 | .name = "v3020", | |
241 | .num_resources = ARRAY_SIZE(em_x270_v3020_resource), | |
242 | .resource = em_x270_v3020_resource, | |
243 | .id = -1, | |
244 | .dev = { | |
245 | .platform_data = &em_x270_v3020_platdata, | |
246 | } | |
247 | }; | |
248 | ||
3c85bce6 MR |
249 | static void __init em_x270_init_rtc(void) |
250 | { | |
251 | platform_device_register(&em_x270_rtc); | |
252 | } | |
253 | #else | |
254 | static inline void em_x270_init_rtc(void) {} | |
255 | #endif | |
3d50527b | 256 | |
3c85bce6 MR |
257 | /* NAND flash */ |
258 | #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE) | |
3d50527b MR |
259 | static inline void nand_cs_on(void) |
260 | { | |
3c85bce6 | 261 | gpio_set_value(GPIO11_NAND_CS, 0); |
3d50527b MR |
262 | } |
263 | ||
264 | static void nand_cs_off(void) | |
265 | { | |
266 | dsb(); | |
267 | ||
3c85bce6 | 268 | gpio_set_value(GPIO11_NAND_CS, 1); |
3d50527b MR |
269 | } |
270 | ||
271 | /* hardware specific access to control-lines */ | |
272 | static void em_x270_nand_cmd_ctl(struct mtd_info *mtd, int dat, | |
273 | unsigned int ctrl) | |
274 | { | |
275 | struct nand_chip *this = mtd->priv; | |
276 | unsigned long nandaddr = (unsigned long)this->IO_ADDR_W; | |
277 | ||
278 | dsb(); | |
279 | ||
280 | if (ctrl & NAND_CTRL_CHANGE) { | |
281 | if (ctrl & NAND_ALE) | |
282 | nandaddr |= (1 << 3); | |
283 | else | |
284 | nandaddr &= ~(1 << 3); | |
285 | if (ctrl & NAND_CLE) | |
286 | nandaddr |= (1 << 2); | |
287 | else | |
288 | nandaddr &= ~(1 << 2); | |
289 | if (ctrl & NAND_NCE) | |
290 | nand_cs_on(); | |
291 | else | |
292 | nand_cs_off(); | |
293 | } | |
294 | ||
295 | dsb(); | |
296 | this->IO_ADDR_W = (void __iomem *)nandaddr; | |
297 | if (dat != NAND_CMD_NONE) | |
298 | writel(dat, this->IO_ADDR_W); | |
299 | ||
300 | dsb(); | |
301 | } | |
302 | ||
303 | /* read device ready pin */ | |
304 | static int em_x270_nand_device_ready(struct mtd_info *mtd) | |
305 | { | |
306 | dsb(); | |
307 | ||
3c85bce6 | 308 | return gpio_get_value(GPIO56_NAND_RB); |
3d50527b MR |
309 | } |
310 | ||
311 | static struct mtd_partition em_x270_partition_info[] = { | |
312 | [0] = { | |
313 | .name = "em_x270-0", | |
314 | .offset = 0, | |
315 | .size = SZ_4M, | |
316 | }, | |
317 | [1] = { | |
318 | .name = "em_x270-1", | |
319 | .offset = MTDPART_OFS_APPEND, | |
320 | .size = MTDPART_SIZ_FULL | |
321 | }, | |
322 | }; | |
323 | ||
324 | static const char *em_x270_part_probes[] = { "cmdlinepart", NULL }; | |
325 | ||
326 | struct platform_nand_data em_x270_nand_platdata = { | |
327 | .chip = { | |
328 | .nr_chips = 1, | |
329 | .chip_offset = 0, | |
330 | .nr_partitions = ARRAY_SIZE(em_x270_partition_info), | |
331 | .partitions = em_x270_partition_info, | |
332 | .chip_delay = 20, | |
333 | .part_probe_types = em_x270_part_probes, | |
334 | }, | |
335 | .ctrl = { | |
336 | .hwcontrol = 0, | |
337 | .dev_ready = em_x270_nand_device_ready, | |
338 | .select_chip = 0, | |
339 | .cmd_ctrl = em_x270_nand_cmd_ctl, | |
340 | }, | |
341 | }; | |
342 | ||
343 | static struct resource em_x270_nand_resource[] = { | |
344 | [0] = { | |
345 | .start = PXA_CS1_PHYS, | |
346 | .end = PXA_CS1_PHYS + 12, | |
347 | .flags = IORESOURCE_MEM, | |
348 | }, | |
349 | }; | |
350 | ||
351 | static struct platform_device em_x270_nand = { | |
352 | .name = "gen_nand", | |
353 | .num_resources = ARRAY_SIZE(em_x270_nand_resource), | |
354 | .resource = em_x270_nand_resource, | |
355 | .id = -1, | |
356 | .dev = { | |
357 | .platform_data = &em_x270_nand_platdata, | |
358 | } | |
359 | }; | |
360 | ||
3c85bce6 MR |
361 | static void __init em_x270_init_nand(void) |
362 | { | |
363 | int err; | |
3d50527b | 364 | |
3c85bce6 MR |
365 | err = gpio_request(GPIO11_NAND_CS, "NAND CS"); |
366 | if (err) { | |
367 | pr_warning("EM-X270: failed to request NAND CS gpio\n"); | |
368 | return; | |
369 | } | |
370 | ||
371 | gpio_direction_output(GPIO11_NAND_CS, 1); | |
372 | ||
373 | err = gpio_request(GPIO56_NAND_RB, "NAND R/B"); | |
374 | if (err) { | |
375 | pr_warning("EM-X270: failed to request NAND R/B gpio\n"); | |
376 | gpio_free(GPIO11_NAND_CS); | |
377 | return; | |
378 | } | |
379 | ||
380 | gpio_direction_input(GPIO56_NAND_RB); | |
381 | ||
382 | platform_device_register(&em_x270_nand); | |
383 | } | |
384 | #else | |
385 | static inline void em_x270_init_nand(void) {} | |
386 | #endif | |
3d50527b | 387 | |
28c88046 MR |
388 | #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) |
389 | static struct mtd_partition em_x270_nor_parts[] = { | |
390 | { | |
391 | .name = "Bootloader", | |
392 | .offset = 0x00000000, | |
393 | .size = 0x00050000, | |
394 | .mask_flags = MTD_WRITEABLE /* force read-only */ | |
395 | }, { | |
396 | .name = "Environment", | |
397 | .offset = 0x00050000, | |
398 | .size = 0x00010000, | |
399 | }, { | |
400 | .name = "Reserved", | |
401 | .offset = 0x00060000, | |
402 | .size = 0x00050000, | |
403 | .mask_flags = MTD_WRITEABLE /* force read-only */ | |
404 | }, { | |
405 | .name = "Splashscreen", | |
406 | .offset = 0x000b0000, | |
407 | .size = 0x00050000, | |
408 | } | |
409 | }; | |
410 | ||
411 | static struct physmap_flash_data em_x270_nor_data[] = { | |
412 | [0] = { | |
413 | .width = 2, | |
414 | .parts = em_x270_nor_parts, | |
415 | .nr_parts = ARRAY_SIZE(em_x270_nor_parts), | |
416 | }, | |
417 | }; | |
418 | ||
419 | static struct resource em_x270_nor_flash_resource = { | |
420 | .start = PXA_CS0_PHYS, | |
421 | .end = PXA_CS0_PHYS + SZ_1M - 1, | |
422 | .flags = IORESOURCE_MEM, | |
423 | }; | |
424 | ||
425 | static struct platform_device em_x270_physmap_flash = { | |
426 | .name = "physmap-flash", | |
427 | .id = 0, | |
428 | .num_resources = 1, | |
429 | .resource = &em_x270_nor_flash_resource, | |
430 | .dev = { | |
431 | .platform_data = &em_x270_nor_data, | |
432 | }, | |
433 | }; | |
434 | ||
435 | static void __init em_x270_init_nor(void) | |
436 | { | |
437 | platform_device_register(&em_x270_physmap_flash); | |
438 | } | |
439 | #else | |
440 | static inline void em_x270_init_nor(void) {} | |
441 | #endif | |
442 | ||
3d50527b | 443 | /* PXA27x OHCI controller setup */ |
3c85bce6 | 444 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) |
3d50527b MR |
445 | static int em_x270_ohci_init(struct device *dev) |
446 | { | |
3d50527b MR |
447 | /* enable port 2 transiever */ |
448 | UP2OCR = UP2OCR_HXS | UP2OCR_HXOE; | |
449 | ||
450 | return 0; | |
451 | } | |
452 | ||
453 | static struct pxaohci_platform_data em_x270_ohci_platform_data = { | |
454 | .port_mode = PMM_PERPORT_MODE, | |
097b5334 | 455 | .flags = ENABLE_PORT1 | ENABLE_PORT2 | POWER_CONTROL_LOW, |
3d50527b MR |
456 | .init = em_x270_ohci_init, |
457 | }; | |
458 | ||
3c85bce6 MR |
459 | static void __init em_x270_init_ohci(void) |
460 | { | |
461 | pxa_set_ohci_info(&em_x270_ohci_platform_data); | |
462 | } | |
463 | #else | |
464 | static inline void em_x270_init_ohci(void) {} | |
465 | #endif | |
3d50527b | 466 | |
3c85bce6 MR |
467 | /* MCI controller setup */ |
468 | #if defined(CONFIG_MMC) || defined(CONFIG_MMC_MODULE) | |
6432f46c MR |
469 | static struct regulator *em_x270_sdio_ldo; |
470 | ||
3d50527b MR |
471 | static int em_x270_mci_init(struct device *dev, |
472 | irq_handler_t em_x270_detect_int, | |
473 | void *data) | |
474 | { | |
6432f46c MR |
475 | int err; |
476 | ||
477 | em_x270_sdio_ldo = regulator_get(dev, "vcc sdio"); | |
478 | if (IS_ERR(em_x270_sdio_ldo)) { | |
479 | dev_err(dev, "can't request SDIO power supply: %ld\n", | |
480 | PTR_ERR(em_x270_sdio_ldo)); | |
481 | return PTR_ERR(em_x270_sdio_ldo); | |
482 | } | |
483 | ||
484 | err = request_irq(gpio_to_irq(GPIO13_MMC_CD), em_x270_detect_int, | |
485 | IRQF_DISABLED | IRQF_TRIGGER_RISING | | |
486 | IRQF_TRIGGER_FALLING, | |
3c85bce6 | 487 | "MMC card detect", data); |
3d50527b | 488 | if (err) { |
6432f46c MR |
489 | dev_err(dev, "can't request MMC card detect IRQ: %d\n", err); |
490 | goto err_irq; | |
491 | } | |
492 | ||
493 | err = gpio_request(GPIO95_MMC_WP, "MMC WP"); | |
494 | if (err) { | |
495 | dev_err(dev, "can't request MMC write protect: %d\n", err); | |
496 | goto err_gpio_wp; | |
3d50527b MR |
497 | } |
498 | ||
6432f46c MR |
499 | gpio_direction_input(GPIO95_MMC_WP); |
500 | ||
3d50527b | 501 | return 0; |
6432f46c MR |
502 | |
503 | err_gpio_wp: | |
504 | free_irq(gpio_to_irq(GPIO13_MMC_CD), data); | |
505 | err_irq: | |
506 | regulator_put(em_x270_sdio_ldo); | |
507 | ||
508 | return err; | |
3d50527b MR |
509 | } |
510 | ||
511 | static void em_x270_mci_setpower(struct device *dev, unsigned int vdd) | |
512 | { | |
6432f46c MR |
513 | struct pxamci_platform_data* p_d = dev->platform_data; |
514 | ||
515 | if ((1 << vdd) & p_d->ocr_mask) { | |
516 | int vdd_uV = (2000 + (vdd - __ffs(MMC_VDD_20_21)) * 100) * 1000; | |
517 | ||
518 | regulator_set_voltage(em_x270_sdio_ldo, vdd_uV, vdd_uV); | |
519 | regulator_enable(em_x270_sdio_ldo); | |
520 | } else { | |
521 | regulator_disable(em_x270_sdio_ldo); | |
522 | } | |
3d50527b MR |
523 | } |
524 | ||
525 | static void em_x270_mci_exit(struct device *dev, void *data) | |
526 | { | |
6432f46c MR |
527 | free_irq(gpio_to_irq(GPIO13_MMC_CD), data); |
528 | } | |
529 | ||
530 | static int em_x270_mci_get_ro(struct device *dev) | |
531 | { | |
532 | return gpio_get_value(GPIO95_MMC_WP); | |
3d50527b MR |
533 | } |
534 | ||
535 | static struct pxamci_platform_data em_x270_mci_platform_data = { | |
6432f46c MR |
536 | .ocr_mask = MMC_VDD_20_21|MMC_VDD_21_22|MMC_VDD_22_23| |
537 | MMC_VDD_24_25|MMC_VDD_25_26|MMC_VDD_26_27| | |
538 | MMC_VDD_27_28|MMC_VDD_28_29|MMC_VDD_29_30| | |
539 | MMC_VDD_30_31|MMC_VDD_31_32, | |
3d50527b MR |
540 | .init = em_x270_mci_init, |
541 | .setpower = em_x270_mci_setpower, | |
6432f46c | 542 | .get_ro = em_x270_mci_get_ro, |
3d50527b MR |
543 | .exit = em_x270_mci_exit, |
544 | }; | |
545 | ||
3c85bce6 MR |
546 | static void __init em_x270_init_mmc(void) |
547 | { | |
6432f46c | 548 | em_x270_mci_platform_data.detect_delay = msecs_to_jiffies(250); |
3c85bce6 MR |
549 | pxa_set_mci_info(&em_x270_mci_platform_data); |
550 | } | |
551 | #else | |
552 | static inline void em_x270_init_mmc(void) {} | |
553 | #endif | |
554 | ||
28c88046 | 555 | /* LCD */ |
3c85bce6 | 556 | #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) |
28c88046 MR |
557 | static struct pxafb_mode_info em_x270_lcd_modes[] = { |
558 | [0] = { | |
559 | .pixclock = 38250, | |
560 | .bpp = 16, | |
561 | .xres = 480, | |
562 | .yres = 640, | |
563 | .hsync_len = 8, | |
564 | .vsync_len = 2, | |
565 | .left_margin = 8, | |
566 | .upper_margin = 2, | |
567 | .right_margin = 24, | |
568 | .lower_margin = 4, | |
569 | .sync = 0, | |
570 | }, | |
571 | [1] = { | |
572 | .pixclock = 153800, | |
573 | .bpp = 16, | |
574 | .xres = 240, | |
575 | .yres = 320, | |
576 | .hsync_len = 8, | |
577 | .vsync_len = 2, | |
578 | .left_margin = 8, | |
579 | .upper_margin = 2, | |
580 | .right_margin = 88, | |
581 | .lower_margin = 2, | |
582 | .sync = 0, | |
583 | }, | |
3d50527b MR |
584 | }; |
585 | ||
586 | static struct pxafb_mach_info em_x270_lcd = { | |
28c88046 MR |
587 | .modes = em_x270_lcd_modes, |
588 | .num_modes = 2, | |
3c85bce6 | 589 | .lcd_conn = LCD_COLOR_TFT_16BPP, |
3d50527b | 590 | }; |
28c88046 | 591 | |
3c85bce6 | 592 | static void __init em_x270_init_lcd(void) |
3d50527b | 593 | { |
3d50527b | 594 | set_pxa_fb_info(&em_x270_lcd); |
3c85bce6 MR |
595 | } |
596 | #else | |
597 | static inline void em_x270_init_lcd(void) {} | |
598 | #endif | |
3d50527b | 599 | |
28c88046 MR |
600 | #if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MODULE) |
601 | static struct pxa2xx_spi_master em_x270_spi_info = { | |
602 | .num_chipselect = 1, | |
603 | }; | |
604 | ||
605 | static struct pxa2xx_spi_chip em_x270_tdo24m_chip = { | |
606 | .rx_threshold = 1, | |
607 | .tx_threshold = 1, | |
608 | }; | |
609 | ||
610 | static struct tdo24m_platform_data em_x270_tdo24m_pdata = { | |
611 | .model = TDO35S, | |
612 | }; | |
613 | ||
614 | static struct spi_board_info em_x270_spi_devices[] __initdata = { | |
615 | { | |
616 | .modalias = "tdo24m", | |
617 | .max_speed_hz = 1000000, | |
618 | .bus_num = 1, | |
619 | .chip_select = 0, | |
620 | .controller_data = &em_x270_tdo24m_chip, | |
621 | .platform_data = &em_x270_tdo24m_pdata, | |
622 | }, | |
623 | }; | |
624 | ||
625 | static void __init em_x270_init_spi(void) | |
626 | { | |
627 | pxa2xx_set_spi_info(1, &em_x270_spi_info); | |
628 | spi_register_board_info(ARRAY_AND_SIZE(em_x270_spi_devices)); | |
629 | } | |
630 | #else | |
631 | static inline void em_x270_init_spi(void) {} | |
632 | #endif | |
633 | ||
3c85bce6 MR |
634 | #if defined(CONFIG_SND_PXA2XX_AC97) || defined(CONFIG_SND_PXA2XX_AC97_MODULE) |
635 | static void __init em_x270_init_ac97(void) | |
636 | { | |
9f19d638 | 637 | pxa_set_ac97_info(NULL); |
3c85bce6 MR |
638 | } |
639 | #else | |
640 | static inline void em_x270_init_ac97(void) {} | |
641 | #endif | |
642 | ||
643 | #if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE) | |
644 | static unsigned int em_x270_matrix_keys[] = { | |
645 | KEY(0, 0, KEY_A), KEY(1, 0, KEY_UP), KEY(2, 1, KEY_B), | |
646 | KEY(0, 2, KEY_LEFT), KEY(1, 1, KEY_ENTER), KEY(2, 0, KEY_RIGHT), | |
647 | KEY(0, 1, KEY_C), KEY(1, 2, KEY_DOWN), KEY(2, 2, KEY_D), | |
648 | }; | |
3d50527b | 649 | |
3c85bce6 MR |
650 | struct pxa27x_keypad_platform_data em_x270_keypad_info = { |
651 | /* code map for the matrix keys */ | |
652 | .matrix_key_rows = 3, | |
653 | .matrix_key_cols = 3, | |
654 | .matrix_key_map = em_x270_matrix_keys, | |
655 | .matrix_key_map_size = ARRAY_SIZE(em_x270_matrix_keys), | |
656 | }; | |
657 | ||
658 | static void __init em_x270_init_keypad(void) | |
659 | { | |
660 | pxa_set_keypad_info(&em_x270_keypad_info); | |
661 | } | |
662 | #else | |
663 | static inline void em_x270_init_keypad(void) {} | |
664 | #endif | |
3d50527b | 665 | |
3c85bce6 MR |
666 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) |
667 | static struct gpio_keys_button gpio_keys_button[] = { | |
668 | [0] = { | |
669 | .desc = "sleep/wakeup", | |
670 | .code = KEY_SUSPEND, | |
671 | .type = EV_PWR, | |
672 | .gpio = 1, | |
673 | .wakeup = 1, | |
674 | }, | |
675 | }; | |
3d50527b | 676 | |
3c85bce6 MR |
677 | static struct gpio_keys_platform_data em_x270_gpio_keys_data = { |
678 | .buttons = gpio_keys_button, | |
679 | .nbuttons = 1, | |
680 | }; | |
3d50527b | 681 | |
3c85bce6 MR |
682 | static struct platform_device em_x270_gpio_keys = { |
683 | .name = "gpio-keys", | |
684 | .id = -1, | |
685 | .dev = { | |
686 | .platform_data = &em_x270_gpio_keys_data, | |
687 | }, | |
688 | }; | |
689 | ||
690 | static void __init em_x270_init_gpio_keys(void) | |
691 | { | |
692 | platform_device_register(&em_x270_gpio_keys); | |
693 | } | |
694 | #else | |
695 | static inline void em_x270_init_gpio_keys(void) {} | |
696 | #endif | |
697 | ||
28c88046 MR |
698 | /* Quick Capture Interface and sensor setup */ |
699 | #if defined(CONFIG_VIDEO_PXA27x) || defined(CONFIG_VIDEO_PXA27x_MODULE) | |
700 | static struct regulator *em_x270_camera_ldo; | |
701 | ||
702 | static int em_x270_sensor_init(struct device *dev) | |
703 | { | |
704 | int ret; | |
705 | ||
706 | ret = gpio_request(GPIO93_CAM_RESET, "camera reset"); | |
707 | if (ret) | |
708 | return ret; | |
709 | ||
710 | gpio_direction_output(GPIO93_CAM_RESET, 0); | |
711 | ||
712 | em_x270_camera_ldo = regulator_get(NULL, "vcc cam"); | |
713 | if (em_x270_camera_ldo == NULL) { | |
714 | gpio_free(GPIO93_CAM_RESET); | |
715 | return -ENODEV; | |
716 | } | |
717 | ||
718 | ret = regulator_enable(em_x270_camera_ldo); | |
719 | if (ret) { | |
720 | regulator_put(em_x270_camera_ldo); | |
721 | gpio_free(GPIO93_CAM_RESET); | |
722 | return ret; | |
723 | } | |
724 | ||
725 | gpio_set_value(GPIO93_CAM_RESET, 1); | |
726 | ||
727 | return 0; | |
728 | } | |
729 | ||
730 | struct pxacamera_platform_data em_x270_camera_platform_data = { | |
731 | .init = em_x270_sensor_init, | |
732 | .flags = PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 | | |
733 | PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN, | |
734 | .mclk_10khz = 2600, | |
735 | }; | |
736 | ||
737 | static int em_x270_sensor_power(struct device *dev, int on) | |
738 | { | |
739 | int ret; | |
740 | int is_on = regulator_is_enabled(em_x270_camera_ldo); | |
741 | ||
742 | if (on == is_on) | |
743 | return 0; | |
744 | ||
745 | gpio_set_value(GPIO93_CAM_RESET, !on); | |
746 | ||
747 | if (on) | |
748 | ret = regulator_enable(em_x270_camera_ldo); | |
749 | else | |
750 | ret = regulator_disable(em_x270_camera_ldo); | |
751 | ||
752 | if (ret) | |
753 | return ret; | |
754 | ||
755 | gpio_set_value(GPIO93_CAM_RESET, on); | |
756 | ||
757 | return 0; | |
758 | } | |
759 | ||
760 | static struct soc_camera_link iclink = { | |
761 | .bus_id = 0, | |
762 | .power = em_x270_sensor_power, | |
763 | }; | |
764 | ||
765 | static struct i2c_board_info em_x270_i2c_cam_info[] = { | |
766 | { | |
767 | I2C_BOARD_INFO("mt9m111", 0x48), | |
768 | .platform_data = &iclink, | |
769 | }, | |
770 | }; | |
771 | ||
772 | static struct i2c_pxa_platform_data em_x270_i2c_info = { | |
773 | .fast_mode = 1, | |
774 | }; | |
775 | ||
776 | static void __init em_x270_init_camera(void) | |
777 | { | |
778 | pxa_set_i2c_info(&em_x270_i2c_info); | |
779 | i2c_register_board_info(0, ARRAY_AND_SIZE(em_x270_i2c_cam_info)); | |
780 | pxa_set_camera_info(&em_x270_camera_platform_data); | |
781 | } | |
782 | #else | |
783 | static inline void em_x270_init_camera(void) {} | |
784 | #endif | |
785 | ||
786 | /* DA9030 related initializations */ | |
787 | static struct regulator_consumer_supply ldo3_consumers[] = { | |
788 | { | |
789 | .dev = NULL, | |
790 | .supply = "vcc gps", | |
791 | }, | |
792 | }; | |
793 | ||
794 | static struct regulator_consumer_supply ldo5_consumers[] = { | |
795 | { | |
796 | .dev = NULL, | |
797 | .supply = "vcc cam", | |
798 | }, | |
799 | }; | |
800 | ||
6432f46c MR |
801 | static struct regulator_consumer_supply ldo10_consumers[] = { |
802 | { | |
803 | .dev = &pxa_device_mci.dev, | |
804 | .supply = "vcc sdio", | |
805 | }, | |
806 | }; | |
807 | ||
28c88046 MR |
808 | static struct regulator_consumer_supply ldo12_consumers[] = { |
809 | { | |
810 | .dev = NULL, | |
811 | .supply = "vcc usb", | |
812 | }, | |
813 | }; | |
814 | ||
815 | static struct regulator_consumer_supply ldo19_consumers[] = { | |
816 | { | |
817 | .dev = NULL, | |
818 | .supply = "vcc gprs", | |
819 | }, | |
820 | }; | |
821 | ||
822 | static struct regulator_init_data ldo3_data = { | |
823 | .constraints = { | |
824 | .min_uV = 3200000, | |
825 | .max_uV = 3200000, | |
826 | .state_mem = { | |
827 | .enabled = 0, | |
828 | }, | |
829 | }, | |
830 | .num_consumer_supplies = ARRAY_SIZE(ldo3_consumers), | |
831 | .consumer_supplies = ldo3_consumers, | |
832 | }; | |
833 | ||
834 | static struct regulator_init_data ldo5_data = { | |
835 | .constraints = { | |
836 | .min_uV = 3000000, | |
837 | .max_uV = 3000000, | |
838 | .state_mem = { | |
839 | .enabled = 0, | |
840 | }, | |
841 | }, | |
842 | .num_consumer_supplies = ARRAY_SIZE(ldo5_consumers), | |
843 | .consumer_supplies = ldo5_consumers, | |
844 | }; | |
845 | ||
6432f46c MR |
846 | static struct regulator_init_data ldo10_data = { |
847 | .constraints = { | |
848 | .min_uV = 2000000, | |
849 | .max_uV = 3200000, | |
850 | .state_mem = { | |
851 | .enabled = 0, | |
852 | }, | |
853 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS, | |
854 | }, | |
855 | .num_consumer_supplies = ARRAY_SIZE(ldo10_consumers), | |
856 | .consumer_supplies = ldo10_consumers, | |
857 | }; | |
858 | ||
28c88046 MR |
859 | static struct regulator_init_data ldo12_data = { |
860 | .constraints = { | |
861 | .min_uV = 3000000, | |
862 | .max_uV = 3000000, | |
863 | .state_mem = { | |
864 | .enabled = 0, | |
865 | }, | |
866 | }, | |
867 | .num_consumer_supplies = ARRAY_SIZE(ldo12_consumers), | |
868 | .consumer_supplies = ldo12_consumers, | |
869 | }; | |
870 | ||
871 | static struct regulator_init_data ldo19_data = { | |
872 | .constraints = { | |
873 | .min_uV = 3200000, | |
874 | .max_uV = 3200000, | |
875 | .state_mem = { | |
876 | .enabled = 0, | |
877 | }, | |
878 | }, | |
879 | .num_consumer_supplies = ARRAY_SIZE(ldo19_consumers), | |
880 | .consumer_supplies = ldo19_consumers, | |
881 | }; | |
882 | ||
883 | struct led_info em_x270_led_info = { | |
884 | .name = "em-x270:orange", | |
885 | .default_trigger = "battery-charging-or-full", | |
886 | }; | |
887 | ||
888 | struct da903x_subdev_info em_x270_da9030_subdevs[] = { | |
889 | { | |
890 | .name = "da903x-regulator", | |
891 | .id = DA9030_ID_LDO3, | |
892 | .platform_data = &ldo3_data, | |
893 | }, { | |
894 | .name = "da903x-regulator", | |
895 | .id = DA9030_ID_LDO5, | |
896 | .platform_data = &ldo5_data, | |
6432f46c MR |
897 | }, { |
898 | .name = "da903x-regulator", | |
899 | .id = DA9030_ID_LDO10, | |
900 | .platform_data = &ldo10_data, | |
28c88046 MR |
901 | }, { |
902 | .name = "da903x-regulator", | |
903 | .id = DA9030_ID_LDO12, | |
904 | .platform_data = &ldo12_data, | |
905 | }, { | |
906 | .name = "da903x-regulator", | |
907 | .id = DA9030_ID_LDO19, | |
908 | .platform_data = &ldo19_data, | |
909 | }, { | |
910 | .name = "da903x-led", | |
911 | .id = DA9030_ID_LED_PC, | |
912 | .platform_data = &em_x270_led_info, | |
913 | }, { | |
914 | .name = "da903x-backlight", | |
915 | .id = DA9030_ID_WLED, | |
916 | } | |
917 | }; | |
918 | ||
919 | static struct da903x_platform_data em_x270_da9030_info = { | |
920 | .num_subdevs = ARRAY_SIZE(em_x270_da9030_subdevs), | |
921 | .subdevs = em_x270_da9030_subdevs, | |
922 | }; | |
923 | ||
924 | static struct i2c_board_info em_x270_i2c_pmic_info = { | |
925 | I2C_BOARD_INFO("da9030", 0x49), | |
926 | .irq = IRQ_GPIO(0), | |
927 | .platform_data = &em_x270_da9030_info, | |
928 | }; | |
929 | ||
930 | static struct i2c_pxa_platform_data em_x270_pwr_i2c_info = { | |
931 | .use_pio = 1, | |
932 | }; | |
933 | ||
934 | static void __init em_x270_init_da9030(void) | |
935 | { | |
936 | pxa27x_set_i2c_power_info(&em_x270_pwr_i2c_info); | |
937 | i2c_register_board_info(1, &em_x270_i2c_pmic_info, 1); | |
938 | } | |
939 | ||
3c85bce6 MR |
940 | static void __init em_x270_init(void) |
941 | { | |
942 | pxa2xx_mfp_config(ARRAY_AND_SIZE(em_x270_pin_config)); | |
943 | ||
28c88046 | 944 | em_x270_init_da9030(); |
3c85bce6 MR |
945 | em_x270_init_dm9000(); |
946 | em_x270_init_rtc(); | |
947 | em_x270_init_nand(); | |
28c88046 | 948 | em_x270_init_nor(); |
3c85bce6 MR |
949 | em_x270_init_lcd(); |
950 | em_x270_init_mmc(); | |
951 | em_x270_init_ohci(); | |
952 | em_x270_init_keypad(); | |
953 | em_x270_init_gpio_keys(); | |
954 | em_x270_init_ac97(); | |
28c88046 MR |
955 | em_x270_init_camera(); |
956 | em_x270_init_spi(); | |
3d50527b MR |
957 | } |
958 | ||
3c85bce6 | 959 | MACHINE_START(EM_X270, "Compulab EM-X270") |
3d50527b MR |
960 | .boot_params = 0xa0000100, |
961 | .phys_io = 0x40000000, | |
962 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | |
963 | .map_io = pxa_map_io, | |
964 | .init_irq = pxa27x_init_irq, | |
965 | .timer = &pxa_timer, | |
966 | .init_machine = em_x270_init, | |
967 | MACHINE_END |