[deliverable/linux.git] / arch / arm / mach-pxa / generic.c

/*
 *  linux/arch/arm/mach-pxa/generic.c
 *
 *  Author:	Nicolas Pitre
 *  Created:	Jun 15, 2001
 *  Copyright:	MontaVista Software Inc.
 *
 * Code common to all PXA machines.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * Since this file should be linked before any other machine specific file,
 * the __initcall() here will be executed first.  This serves as default
 * initialization stuff for PXA machines which can be overridden later if
 * need be.
 */
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>

#include <mach/hardware.h>
#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/mach/map.h>
#include <asm/mach-types.h>

#include <mach/reset.h>
#include <mach/gpio.h>
#include <mach/pxa2xx-gpio.h>

#include "generic.h"

void clear_reset_status(unsigned int mask)
{
	if (cpu_is_pxa2xx())
		pxa2xx_clear_reset_status(mask);

	if (cpu_is_pxa3xx())
		pxa3xx_clear_reset_status(mask);
}

unsigned long get_clock_tick_rate(void)
{
	unsigned long clock_tick_rate;

	if (cpu_is_pxa25x())
		clock_tick_rate = 3686400;
	else if (machine_is_mainstone())
		clock_tick_rate = 3249600;
	else
		clock_tick_rate = 3250000;

	return clock_tick_rate;
}
EXPORT_SYMBOL(get_clock_tick_rate);

/*
 * Get the clock frequency as reflected by CCCR and the turbo flag.
 * We assume these values have been applied via a fcs.
 * If info is not 0 we also display the current settings.
 */
unsigned int get_clk_frequency_khz(int info)
{
	if (cpu_is_pxa25x())
		return pxa25x_get_clk_frequency_khz(info);
	else if (cpu_is_pxa27x())
		return pxa27x_get_clk_frequency_khz(info);
	else
		return pxa3xx_get_clk_frequency_khz(info);
}
EXPORT_SYMBOL(get_clk_frequency_khz);

/*
 * Return the current memory clock frequency in units of 10kHz
 */
unsigned int get_memclk_frequency_10khz(void)
{
	if (cpu_is_pxa25x())
		return pxa25x_get_memclk_frequency_10khz();
	else if (cpu_is_pxa27x())
		return pxa27x_get_memclk_frequency_10khz();
	else
		return pxa3xx_get_memclk_frequency_10khz();
}
EXPORT_SYMBOL(get_memclk_frequency_10khz);

/*
 * Intel PXA2xx internal register mapping.
 *
 * Note 1: not all PXA2xx variants implement all those addresses.
 *
 * Note 2: virtual 0xfffe0000-0xffffffff is reserved for the vector table
 *         and cache flush area.
 */
static struct map_desc standard_io_desc[] __initdata = {
  	{	/* Devs */
		.virtual	=  0xf2000000,
		.pfn		= __phys_to_pfn(0x40000000),
		.length		= 0x02000000,
		.type		= MT_DEVICE
	}, {	/* Mem Ctl */
		.virtual	=  0xf6000000,
		.pfn		= __phys_to_pfn(0x48000000),
		.length		= 0x00200000,
		.type		= MT_DEVICE
	}, {	/* Camera */
		.virtual	=  0xfa000000,
		.pfn		= __phys_to_pfn(0x50000000),
		.length		= 0x00100000,
		.type		= MT_DEVICE
	}, {	/* IMem ctl */
		.virtual	=  0xfe000000,
		.pfn		= __phys_to_pfn(0x58000000),
		.length		= 0x00100000,
		.type		= MT_DEVICE
	}, {	/* UNCACHED_PHYS_0 */
		.virtual	= 0xff000000,
		.pfn		= __phys_to_pfn(0x00000000),
		.length		= 0x00100000,
		.type		= MT_DEVICE
	}
};

void __init pxa_map_io(void)
{
	iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
	get_clk_frequency_khz(1);
}

/*
 * Configure pins for GPIO or other functions
 */
int pxa_gpio_mode(int gpio_mode)
{
	unsigned long flags;
	int gpio = gpio_mode & GPIO_MD_MASK_NR;
	int fn = (gpio_mode & GPIO_MD_MASK_FN) >> 8;
	int gafr;

	if (gpio > pxa_last_gpio)
		return -EINVAL;

	local_irq_save(flags);
	if (gpio_mode & GPIO_DFLT_LOW)
		GPCR(gpio) = GPIO_bit(gpio);
	else if (gpio_mode & GPIO_DFLT_HIGH)
		GPSR(gpio) = GPIO_bit(gpio);
	if (gpio_mode & GPIO_MD_MASK_DIR)
		GPDR(gpio) |= GPIO_bit(gpio);
	else
		GPDR(gpio) &= ~GPIO_bit(gpio);
	gafr = GAFR(gpio) & ~(0x3 << (((gpio) & 0xf)*2));
	GAFR(gpio) = gafr |  (fn  << (((gpio) & 0xf)*2));
	local_irq_restore(flags);

	return 0;
}
EXPORT_SYMBOL(pxa_gpio_mode);
Commit	Line	Data
1da177e4 LT	1	/*
	2	* linux/arch/arm/mach-pxa/generic.c
	3	*
	4	* Author: Nicolas Pitre
	5	* Created: Jun 15, 2001
	6	* Copyright: MontaVista Software Inc.
	7	*
	8	* Code common to all PXA machines.
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License version 2 as
	12	* published by the Free Software Foundation.
	13	*
	14	* Since this file should be linked before any other machine specific file,
	15	* the __initcall() here will be executed first. This serves as default
	16	* initialization stuff for PXA machines which can be overridden later if
	17	* need be.
	18	*/
	19	#include <linux/module.h>
	20	#include <linux/kernel.h>
	21	#include <linux/init.h>
1da177e4	22
a09e64fb	23	#include <mach/hardware.h>
1da177e4 LT	24	#include <asm/system.h>
	25	#include <asm/pgtable.h>
	26	#include <asm/mach/map.h>
6769717d	27	#include <asm/mach-types.h>
1da177e4	28
afd2fc02	29	#include <mach/reset.h>
da065a0b	30	#include <mach/gpio.h>
0d9f768f	31	#include <mach/pxa2xx-gpio.h>
1da177e4 LT	32
	33	#include "generic.h"
	34
04fef228 EM	35	void clear_reset_status(unsigned int mask)
	36	{
	37	if (cpu_is_pxa2xx())
	38	pxa2xx_clear_reset_status(mask);
	39
	40	if (cpu_is_pxa3xx())
	41	pxa3xx_clear_reset_status(mask);
	42	}
	43
6769717d EM	44	unsigned long get_clock_tick_rate(void)
	45	{
	46	unsigned long clock_tick_rate;
	47
	48	if (cpu_is_pxa25x())
	49	clock_tick_rate = 3686400;
	50	else if (machine_is_mainstone())
	51	clock_tick_rate = 3249600;
	52	else
	53	clock_tick_rate = 3250000;
	54
	55	return clock_tick_rate;
	56	}
	57	EXPORT_SYMBOL(get_clock_tick_rate);
	58
15a40333 RK	59	/*
	60	* Get the clock frequency as reflected by CCCR and the turbo flag.
	61	* We assume these values have been applied via a fcs.
	62	* If info is not 0 we also display the current settings.
	63	*/
	64	unsigned int get_clk_frequency_khz(int info)
	65	{
0ffcbfd5	66	if (cpu_is_pxa25x())
15a40333	67	return pxa25x_get_clk_frequency_khz(info);
2c8086a5	68	else if (cpu_is_pxa27x())
15a40333	69	return pxa27x_get_clk_frequency_khz(info);
2c8086a5	70	else
2c8086a5	71	return pxa3xx_get_clk_frequency_khz(info);
15a40333 RK	72	}
	73	EXPORT_SYMBOL(get_clk_frequency_khz);
	74
	75	/*
	76	* Return the current memory clock frequency in units of 10kHz
	77	*/
	78	unsigned int get_memclk_frequency_10khz(void)
	79	{
0ffcbfd5	80	if (cpu_is_pxa25x())
15a40333	81	return pxa25x_get_memclk_frequency_10khz();
2c8086a5	82	else if (cpu_is_pxa27x())
15a40333	83	return pxa27x_get_memclk_frequency_10khz();
2c8086a5	84	else
2c8086a5	85	return pxa3xx_get_memclk_frequency_10khz();
15a40333 RK	86	}
	87	EXPORT_SYMBOL(get_memclk_frequency_10khz);
	88
1da177e4 LT	89	/*
	90	* Intel PXA2xx internal register mapping.
	91	*
	92	* Note 1: not all PXA2xx variants implement all those addresses.
	93	*
	94	* Note 2: virtual 0xfffe0000-0xffffffff is reserved for the vector table
	95	* and cache flush area.
	96	*/
	97	static struct map_desc standard_io_desc[] __initdata = {
6f9182eb DS	98	{ /* Devs */
	99	.virtual = 0xf2000000,
	100	.pfn = __phys_to_pfn(0x40000000),
	101	.length = 0x02000000,
	102	.type = MT_DEVICE
6f9182eb DS	103	}, { /* Mem Ctl */
	104	.virtual = 0xf6000000,
	105	.pfn = __phys_to_pfn(0x48000000),
7664c400	106	.length = 0x00200000,
6f9182eb	107	.type = MT_DEVICE
6f9182eb DS	108	}, { /* Camera */
	109	.virtual = 0xfa000000,
	110	.pfn = __phys_to_pfn(0x50000000),
	111	.length = 0x00100000,
	112	.type = MT_DEVICE
	113	}, { /* IMem ctl */
	114	.virtual = 0xfe000000,
	115	.pfn = __phys_to_pfn(0x58000000),
	116	.length = 0x00100000,
	117	.type = MT_DEVICE
	118	}, { /* UNCACHED_PHYS_0 */
	119	.virtual = 0xff000000,
	120	.pfn = __phys_to_pfn(0x00000000),
	121	.length = 0x00100000,
	122	.type = MT_DEVICE
	123	}
1da177e4 LT	124	};
	125
	126	void __init pxa_map_io(void)
	127	{
	128	iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
	129	get_clk_frequency_khz(1);
	130	}
0d9f768f EM	131
	132	/*
	133	* Configure pins for GPIO or other functions
	134	*/
	135	int pxa_gpio_mode(int gpio_mode)
	136	{
	137	unsigned long flags;
	138	int gpio = gpio_mode & GPIO_MD_MASK_NR;
	139	int fn = (gpio_mode & GPIO_MD_MASK_FN) >> 8;
	140	int gafr;
	141
	142	if (gpio > pxa_last_gpio)
	143	return -EINVAL;
	144
	145	local_irq_save(flags);
	146	if (gpio_mode & GPIO_DFLT_LOW)
	147	GPCR(gpio) = GPIO_bit(gpio);
	148	else if (gpio_mode & GPIO_DFLT_HIGH)
	149	GPSR(gpio) = GPIO_bit(gpio);
	150	if (gpio_mode & GPIO_MD_MASK_DIR)
	151	GPDR(gpio) \|= GPIO_bit(gpio);
	152	else
	153	GPDR(gpio) &= ~GPIO_bit(gpio);
	154	gafr = GAFR(gpio) & ~(0x3 << (((gpio) & 0xf)*2));
	155	GAFR(gpio) = gafr \| (fn << (((gpio) & 0xf)*2));
	156	local_irq_restore(flags);
	157
	158	return 0;
	159	}
	160	EXPORT_SYMBOL(pxa_gpio_mode);