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1da177e4 LT |
1 | /* |
2 | * linux/arch/arm/mach-pxa/generic.c | |
3 | * | |
4 | * Author: Nicolas Pitre | |
5 | * Created: Jun 15, 2001 | |
6 | * Copyright: MontaVista Software Inc. | |
7 | * | |
8 | * Code common to all PXA machines. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | * | |
14 | * Since this file should be linked before any other machine specific file, | |
15 | * the __initcall() here will be executed first. This serves as default | |
16 | * initialization stuff for PXA machines which can be overridden later if | |
17 | * need be. | |
18 | */ | |
2f8163ba | 19 | #include <linux/gpio.h> |
1da177e4 LT |
20 | #include <linux/module.h> |
21 | #include <linux/kernel.h> | |
22 | #include <linux/init.h> | |
1da177e4 | 23 | |
a09e64fb | 24 | #include <mach/hardware.h> |
1da177e4 | 25 | #include <asm/mach/map.h> |
6769717d | 26 | #include <asm/mach-types.h> |
1da177e4 | 27 | |
afd2fc02 | 28 | #include <mach/reset.h> |
ad68bb9f | 29 | #include <mach/smemc.h> |
a4553358 | 30 | #include <mach/pxa3xx-regs.h> |
1da177e4 LT |
31 | |
32 | #include "generic.h" | |
33 | ||
04fef228 EM |
34 | void clear_reset_status(unsigned int mask) |
35 | { | |
36 | if (cpu_is_pxa2xx()) | |
37 | pxa2xx_clear_reset_status(mask); | |
a4553358 HZ |
38 | else { |
39 | /* RESET_STATUS_* has a 1:1 mapping with ARSR */ | |
40 | ARSR = mask; | |
41 | } | |
04fef228 EM |
42 | } |
43 | ||
6769717d EM |
44 | unsigned long get_clock_tick_rate(void) |
45 | { | |
46 | unsigned long clock_tick_rate; | |
47 | ||
48 | if (cpu_is_pxa25x()) | |
49 | clock_tick_rate = 3686400; | |
50 | else if (machine_is_mainstone()) | |
51 | clock_tick_rate = 3249600; | |
52 | else | |
53 | clock_tick_rate = 3250000; | |
54 | ||
55 | return clock_tick_rate; | |
56 | } | |
57 | EXPORT_SYMBOL(get_clock_tick_rate); | |
58 | ||
15a40333 RK |
59 | /* |
60 | * Get the clock frequency as reflected by CCCR and the turbo flag. | |
61 | * We assume these values have been applied via a fcs. | |
62 | * If info is not 0 we also display the current settings. | |
63 | */ | |
64 | unsigned int get_clk_frequency_khz(int info) | |
65 | { | |
0ffcbfd5 | 66 | if (cpu_is_pxa25x()) |
15a40333 | 67 | return pxa25x_get_clk_frequency_khz(info); |
2c8086a5 | 68 | else if (cpu_is_pxa27x()) |
15a40333 | 69 | return pxa27x_get_clk_frequency_khz(info); |
ecf89b8a | 70 | return 0; |
15a40333 RK |
71 | } |
72 | EXPORT_SYMBOL(get_clk_frequency_khz); | |
73 | ||
1da177e4 LT |
74 | /* |
75 | * Intel PXA2xx internal register mapping. | |
76 | * | |
851982c1 MV |
77 | * Note: virtual 0xfffe0000-0xffffffff is reserved for the vector table |
78 | * and cache flush area. | |
1da177e4 | 79 | */ |
851982c1 | 80 | static struct map_desc common_io_desc[] __initdata = { |
6f9182eb DS |
81 | { /* Devs */ |
82 | .virtual = 0xf2000000, | |
83 | .pfn = __phys_to_pfn(0x40000000), | |
84 | .length = 0x02000000, | |
85 | .type = MT_DEVICE | |
6f9182eb DS |
86 | }, { /* UNCACHED_PHYS_0 */ |
87 | .virtual = 0xff000000, | |
88 | .pfn = __phys_to_pfn(0x00000000), | |
89 | .length = 0x00100000, | |
90 | .type = MT_DEVICE | |
91 | } | |
1da177e4 LT |
92 | }; |
93 | ||
94 | void __init pxa_map_io(void) | |
95 | { | |
851982c1 | 96 | iotable_init(ARRAY_AND_SIZE(common_io_desc)); |
1da177e4 | 97 | } |