ARM: pxa168/teton bga: add board support for i2c and rtc-ds1337
[deliverable/linux.git] / arch / arm / mach-pxa / generic.c
CommitLineData
1da177e4
LT
1/*
2 * linux/arch/arm/mach-pxa/generic.c
3 *
4 * Author: Nicolas Pitre
5 * Created: Jun 15, 2001
6 * Copyright: MontaVista Software Inc.
7 *
8 * Code common to all PXA machines.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * Since this file should be linked before any other machine specific file,
15 * the __initcall() here will be executed first. This serves as default
16 * initialization stuff for PXA machines which can be overridden later if
17 * need be.
18 */
19#include <linux/module.h>
20#include <linux/kernel.h>
21#include <linux/init.h>
1da177e4 22
a09e64fb 23#include <mach/hardware.h>
1da177e4
LT
24#include <asm/system.h>
25#include <asm/pgtable.h>
26#include <asm/mach/map.h>
6769717d 27#include <asm/mach-types.h>
1da177e4 28
afd2fc02 29#include <mach/reset.h>
da065a0b 30#include <mach/gpio.h>
1da177e4
LT
31
32#include "generic.h"
33
04fef228
EM
34void clear_reset_status(unsigned int mask)
35{
36 if (cpu_is_pxa2xx())
37 pxa2xx_clear_reset_status(mask);
38
39 if (cpu_is_pxa3xx())
40 pxa3xx_clear_reset_status(mask);
41}
42
6769717d
EM
43unsigned long get_clock_tick_rate(void)
44{
45 unsigned long clock_tick_rate;
46
47 if (cpu_is_pxa25x())
48 clock_tick_rate = 3686400;
49 else if (machine_is_mainstone())
50 clock_tick_rate = 3249600;
51 else
52 clock_tick_rate = 3250000;
53
54 return clock_tick_rate;
55}
56EXPORT_SYMBOL(get_clock_tick_rate);
57
15a40333
RK
58/*
59 * Get the clock frequency as reflected by CCCR and the turbo flag.
60 * We assume these values have been applied via a fcs.
61 * If info is not 0 we also display the current settings.
62 */
63unsigned int get_clk_frequency_khz(int info)
64{
0ffcbfd5 65 if (cpu_is_pxa25x())
15a40333 66 return pxa25x_get_clk_frequency_khz(info);
2c8086a5 67 else if (cpu_is_pxa27x())
15a40333 68 return pxa27x_get_clk_frequency_khz(info);
2c8086a5 69 else
70 return pxa3xx_get_clk_frequency_khz(info);
15a40333
RK
71}
72EXPORT_SYMBOL(get_clk_frequency_khz);
73
74/*
75 * Return the current memory clock frequency in units of 10kHz
76 */
77unsigned int get_memclk_frequency_10khz(void)
78{
0ffcbfd5 79 if (cpu_is_pxa25x())
15a40333 80 return pxa25x_get_memclk_frequency_10khz();
2c8086a5 81 else if (cpu_is_pxa27x())
15a40333 82 return pxa27x_get_memclk_frequency_10khz();
2c8086a5 83 else
84 return pxa3xx_get_memclk_frequency_10khz();
15a40333
RK
85}
86EXPORT_SYMBOL(get_memclk_frequency_10khz);
87
1da177e4
LT
88/*
89 * Intel PXA2xx internal register mapping.
90 *
91 * Note 1: not all PXA2xx variants implement all those addresses.
92 *
93 * Note 2: virtual 0xfffe0000-0xffffffff is reserved for the vector table
94 * and cache flush area.
95 */
96static struct map_desc standard_io_desc[] __initdata = {
6f9182eb
DS
97 { /* Devs */
98 .virtual = 0xf2000000,
99 .pfn = __phys_to_pfn(0x40000000),
100 .length = 0x02000000,
101 .type = MT_DEVICE
6f9182eb
DS
102 }, { /* Mem Ctl */
103 .virtual = 0xf6000000,
104 .pfn = __phys_to_pfn(0x48000000),
7664c400 105 .length = 0x00200000,
6f9182eb 106 .type = MT_DEVICE
6f9182eb
DS
107 }, { /* Camera */
108 .virtual = 0xfa000000,
109 .pfn = __phys_to_pfn(0x50000000),
110 .length = 0x00100000,
111 .type = MT_DEVICE
112 }, { /* IMem ctl */
113 .virtual = 0xfe000000,
114 .pfn = __phys_to_pfn(0x58000000),
115 .length = 0x00100000,
116 .type = MT_DEVICE
117 }, { /* UNCACHED_PHYS_0 */
118 .virtual = 0xff000000,
119 .pfn = __phys_to_pfn(0x00000000),
120 .length = 0x00100000,
121 .type = MT_DEVICE
122 }
1da177e4
LT
123};
124
125void __init pxa_map_io(void)
126{
127 iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
128 get_clk_frequency_khz(1);
129}
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