ARM: pxa: Transition pxa25x, pxa27x, pxa3xx to clk framework
[deliverable/linux.git] / arch / arm / mach-pxa / generic.c
CommitLineData
1da177e4
LT
1/*
2 * linux/arch/arm/mach-pxa/generic.c
3 *
4 * Author: Nicolas Pitre
5 * Created: Jun 15, 2001
6 * Copyright: MontaVista Software Inc.
7 *
8 * Code common to all PXA machines.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * Since this file should be linked before any other machine specific file,
15 * the __initcall() here will be executed first. This serves as default
16 * initialization stuff for PXA machines which can be overridden later if
17 * need be.
18 */
2f8163ba 19#include <linux/gpio.h>
1da177e4
LT
20#include <linux/module.h>
21#include <linux/kernel.h>
22#include <linux/init.h>
1da177e4 23
a09e64fb 24#include <mach/hardware.h>
1da177e4 25#include <asm/mach/map.h>
6769717d 26#include <asm/mach-types.h>
1da177e4 27
a38b1f60 28#include <mach/irqs.h>
afd2fc02 29#include <mach/reset.h>
ad68bb9f 30#include <mach/smemc.h>
a4553358 31#include <mach/pxa3xx-regs.h>
1da177e4
LT
32
33#include "generic.h"
a38b1f60 34#include <clocksource/pxa.h>
1da177e4 35
04fef228
EM
36void clear_reset_status(unsigned int mask)
37{
38 if (cpu_is_pxa2xx())
39 pxa2xx_clear_reset_status(mask);
a4553358
HZ
40 else {
41 /* RESET_STATUS_* has a 1:1 mapping with ARSR */
42 ARSR = mask;
43 }
04fef228
EM
44}
45
6769717d
EM
46unsigned long get_clock_tick_rate(void)
47{
48 unsigned long clock_tick_rate;
49
50 if (cpu_is_pxa25x())
51 clock_tick_rate = 3686400;
52 else if (machine_is_mainstone())
53 clock_tick_rate = 3249600;
54 else
55 clock_tick_rate = 3250000;
56
57 return clock_tick_rate;
58}
59EXPORT_SYMBOL(get_clock_tick_rate);
60
a38b1f60
RJ
61/*
62 * For non device-tree builds, keep legacy timer init
63 */
3d3c6a5f 64void __init pxa_timer_init(void)
a38b1f60 65{
5e1d0128
RJ
66 if (cpu_is_pxa25x())
67 pxa25x_clocks_init();
68 if (cpu_is_pxa27x())
69 pxa27x_clocks_init();
a1c0a6ad
RJ
70 if (cpu_is_pxa3xx())
71 pxa3xx_clocks_init();
a38b1f60
RJ
72 pxa_timer_nodt_init(IRQ_OST0, io_p2v(0x40a00000),
73 get_clock_tick_rate());
74}
75
15a40333
RK
76/*
77 * Get the clock frequency as reflected by CCCR and the turbo flag.
78 * We assume these values have been applied via a fcs.
79 * If info is not 0 we also display the current settings.
80 */
81unsigned int get_clk_frequency_khz(int info)
82{
0ffcbfd5 83 if (cpu_is_pxa25x())
15a40333 84 return pxa25x_get_clk_frequency_khz(info);
2c8086a5 85 else if (cpu_is_pxa27x())
15a40333 86 return pxa27x_get_clk_frequency_khz(info);
ecf89b8a 87 return 0;
15a40333
RK
88}
89EXPORT_SYMBOL(get_clk_frequency_khz);
90
1da177e4
LT
91/*
92 * Intel PXA2xx internal register mapping.
93 *
851982c1
MV
94 * Note: virtual 0xfffe0000-0xffffffff is reserved for the vector table
95 * and cache flush area.
1da177e4 96 */
851982c1 97static struct map_desc common_io_desc[] __initdata = {
6f9182eb 98 { /* Devs */
0e32986c
LP
99 .virtual = (unsigned long)PERIPH_VIRT,
100 .pfn = __phys_to_pfn(PERIPH_PHYS),
101 .length = PERIPH_SIZE,
6f9182eb
DS
102 .type = MT_DEVICE
103 }
1da177e4
LT
104};
105
106void __init pxa_map_io(void)
107{
2111667b 108 debug_ll_io_init();
851982c1 109 iotable_init(ARRAY_AND_SIZE(common_io_desc));
1da177e4 110}
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