projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 1da177e4 LT |
1 | /* |
| 2 | * linux/arch/arm/mach-pxa/generic.c | |
| 3 | * | |
| 4 | * Author: Nicolas Pitre | |
| 5 | * Created: Jun 15, 2001 | |
| 6 | * Copyright: MontaVista Software Inc. | |
| 7 | * | |
| 8 | * Code common to all PXA machines. | |
| 9 | * | |
| 10 | * This program is free software; you can redistribute it and/or modify | |
| 11 | * it under the terms of the GNU General Public License version 2 as | |
| 12 | * published by the Free Software Foundation. | |
| 13 | * | |
| 14 | * Since this file should be linked before any other machine specific file, | |
| 15 | * the __initcall() here will be executed first. This serves as default | |
| 16 | * initialization stuff for PXA machines which can be overridden later if | |
| 17 | * need be. | |
| 18 | */ | |
| 2f8163ba | 19 | #include <linux/gpio.h> |
| 1da177e4 LT |
20 | #include <linux/module.h> |
| 21 | #include <linux/kernel.h> | |
| 22 | #include <linux/init.h> | |
| 1da177e4 | 23 | |
| a09e64fb | 24 | #include <mach/hardware.h> |
| 1da177e4 | 25 | #include <asm/mach/map.h> |
| 6769717d | 26 | #include <asm/mach-types.h> |
| 1da177e4 | 27 | |
| a38b1f60 | 28 | #include <mach/irqs.h> |
| afd2fc02 | 29 | #include <mach/reset.h> |
| ad68bb9f | 30 | #include <mach/smemc.h> |
| a4553358 | 31 | #include <mach/pxa3xx-regs.h> |
| 1da177e4 LT |
32 | |
| 33 | #include "generic.h" | |
| a38b1f60 | 34 | #include <clocksource/pxa.h> |
| 1da177e4 | 35 | |
| 04fef228 EM |
36 | void clear_reset_status(unsigned int mask) |
| 37 | { | |
| 38 | if (cpu_is_pxa2xx()) | |
| 39 | pxa2xx_clear_reset_status(mask); | |
| a4553358 HZ |
40 | else { |
| 41 | /* RESET_STATUS_* has a 1:1 mapping with ARSR */ | |
| 42 | ARSR = mask; | |
| 43 | } | |
| 04fef228 EM |
44 | } |
| 45 | ||
| 6769717d EM |
46 | unsigned long get_clock_tick_rate(void) |
| 47 | { | |
| 48 | unsigned long clock_tick_rate; | |
| 49 | ||
| 50 | if (cpu_is_pxa25x()) | |
| 51 | clock_tick_rate = 3686400; | |
| 52 | else if (machine_is_mainstone()) | |
| 53 | clock_tick_rate = 3249600; | |
| 54 | else | |
| 55 | clock_tick_rate = 3250000; | |
| 56 | ||
| 57 | return clock_tick_rate; | |
| 58 | } | |
| 59 | EXPORT_SYMBOL(get_clock_tick_rate); | |
| 60 | ||
| a38b1f60 RJ |
61 | /* |
| 62 | * For non device-tree builds, keep legacy timer init | |
| 63 | */ | |
| 3d3c6a5f | 64 | void __init pxa_timer_init(void) |
| a38b1f60 RJ |
65 | { |
| 66 | pxa_timer_nodt_init(IRQ_OST0, io_p2v(0x40a00000), | |
| 67 | get_clock_tick_rate()); | |
| 68 | } | |
| 69 | ||
| 15a40333 RK |
70 | /* |
| 71 | * Get the clock frequency as reflected by CCCR and the turbo flag. | |
| 72 | * We assume these values have been applied via a fcs. | |
| 73 | * If info is not 0 we also display the current settings. | |
| 74 | */ | |
| 75 | unsigned int get_clk_frequency_khz(int info) | |
| 76 | { | |
| 0ffcbfd5 | 77 | if (cpu_is_pxa25x()) |
| 15a40333 | 78 | return pxa25x_get_clk_frequency_khz(info); |
| 2c8086a5 | 79 | else if (cpu_is_pxa27x()) |
| 15a40333 | 80 | return pxa27x_get_clk_frequency_khz(info); |
| ecf89b8a | 81 | return 0; |
| 15a40333 RK |
82 | } |
| 83 | EXPORT_SYMBOL(get_clk_frequency_khz); | |
| 84 | ||
| 1da177e4 LT |
85 | /* |
| 86 | * Intel PXA2xx internal register mapping. | |
| 87 | * | |
| 851982c1 MV |
88 | * Note: virtual 0xfffe0000-0xffffffff is reserved for the vector table |
| 89 | * and cache flush area. | |
| 1da177e4 | 90 | */ |
| 851982c1 | 91 | static struct map_desc common_io_desc[] __initdata = { |
| 6f9182eb | 92 | { /* Devs */ |
| 0e32986c LP |
93 | .virtual = (unsigned long)PERIPH_VIRT, |
| 94 | .pfn = __phys_to_pfn(PERIPH_PHYS), | |
| 95 | .length = PERIPH_SIZE, | |
| 6f9182eb DS |
96 | .type = MT_DEVICE |
| 97 | } | |
| 1da177e4 LT |
98 | }; |
| 99 | ||
| 100 | void __init pxa_map_io(void) | |
| 101 | { | |
| 2111667b | 102 | debug_ll_io_init(); |
| 851982c1 | 103 | iotable_init(ARRAY_AND_SIZE(common_io_desc)); |
| 1da177e4 | 104 | } |