Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * linux/arch/arm/mach-pxa/irq.c | |
3 | * | |
e3630db1 | 4 | * Generic PXA IRQ handling |
1da177e4 LT |
5 | * |
6 | * Author: Nicolas Pitre | |
7 | * Created: Jun 15, 2001 | |
8 | * Copyright: MontaVista Software Inc. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | */ | |
14 | ||
15 | #include <linux/init.h> | |
16 | #include <linux/module.h> | |
17 | #include <linux/interrupt.h> | |
c0165504 | 18 | #include <linux/sysdev.h> |
1da177e4 | 19 | |
a09e64fb | 20 | #include <mach/hardware.h> |
1da177e4 LT |
21 | #include <asm/irq.h> |
22 | #include <asm/mach/irq.h> | |
a09e64fb | 23 | #include <mach/pxa-regs.h> |
1da177e4 LT |
24 | |
25 | #include "generic.h" | |
26 | ||
f6fb7af4 | 27 | #define IRQ_BIT(n) (((n) - PXA_IRQ(0)) & 0x1f) |
28 | #define _ICMR(n) (*((((n) - PXA_IRQ(0)) & ~0x1f) ? &ICMR2 : &ICMR)) | |
29 | #define _ICLR(n) (*((((n) - PXA_IRQ(0)) & ~0x1f) ? &ICLR2 : &ICLR)) | |
1da177e4 LT |
30 | |
31 | /* | |
32 | * This is for peripheral IRQs internal to the PXA chip. | |
33 | */ | |
34 | ||
f6fb7af4 | 35 | static int pxa_internal_irq_nr; |
36 | ||
37 | static void pxa_mask_irq(unsigned int irq) | |
1da177e4 | 38 | { |
f6fb7af4 | 39 | _ICMR(irq) &= ~(1 << IRQ_BIT(irq)); |
1da177e4 LT |
40 | } |
41 | ||
f6fb7af4 | 42 | static void pxa_unmask_irq(unsigned int irq) |
1da177e4 | 43 | { |
f6fb7af4 | 44 | _ICMR(irq) |= 1 << IRQ_BIT(irq); |
1da177e4 LT |
45 | } |
46 | ||
f6fb7af4 | 47 | static struct irq_chip pxa_internal_irq_chip = { |
38c677cb | 48 | .name = "SC", |
f6fb7af4 | 49 | .ack = pxa_mask_irq, |
50 | .mask = pxa_mask_irq, | |
51 | .unmask = pxa_unmask_irq, | |
1da177e4 LT |
52 | }; |
53 | ||
b9e25ace | 54 | void __init pxa_init_irq(int irq_nr, set_wake_t fn) |
53665a50 EM |
55 | { |
56 | int irq; | |
57 | ||
f6fb7af4 | 58 | pxa_internal_irq_nr = irq_nr; |
53665a50 | 59 | |
f6fb7af4 | 60 | for (irq = 0; irq < irq_nr; irq += 32) { |
61 | _ICMR(irq) = 0; /* disable all IRQs */ | |
62 | _ICLR(irq) = 0; /* all IRQs are IRQ, not FIQ */ | |
63 | } | |
53665a50 EM |
64 | |
65 | /* only unmasked interrupts kick us out of idle */ | |
66 | ICCR = 1; | |
67 | ||
f6fb7af4 | 68 | for (irq = PXA_IRQ(0); irq < PXA_IRQ(irq_nr); irq++) { |
69 | set_irq_chip(irq, &pxa_internal_irq_chip); | |
c08b7b3e EM |
70 | set_irq_handler(irq, handle_level_irq); |
71 | set_irq_flags(irq, IRQF_VALID); | |
72 | } | |
1da177e4 | 73 | |
b9e25ace | 74 | pxa_internal_irq_chip.set_wake = fn; |
c95530c7 | 75 | } |
c0165504 | 76 | |
77 | #ifdef CONFIG_PM | |
78 | static unsigned long saved_icmr[2]; | |
79 | ||
80 | static int pxa_irq_suspend(struct sys_device *dev, pm_message_t state) | |
81 | { | |
f6fb7af4 | 82 | int i, irq = PXA_IRQ(0); |
83 | ||
84 | for (i = 0; irq < PXA_IRQ(pxa_internal_irq_nr); i++, irq += 32) { | |
85 | saved_icmr[i] = _ICMR(irq); | |
86 | _ICMR(irq) = 0; | |
c0165504 | 87 | } |
88 | ||
89 | return 0; | |
90 | } | |
91 | ||
92 | static int pxa_irq_resume(struct sys_device *dev) | |
93 | { | |
f6fb7af4 | 94 | int i, irq = PXA_IRQ(0); |
95 | ||
96 | for (i = 0; irq < PXA_IRQ(pxa_internal_irq_nr); i++, irq += 32) { | |
97 | _ICMR(irq) = saved_icmr[i]; | |
98 | _ICLR(irq) = 0; | |
c0165504 | 99 | } |
100 | ||
f6fb7af4 | 101 | ICCR = 1; |
c0165504 | 102 | return 0; |
103 | } | |
104 | #else | |
105 | #define pxa_irq_suspend NULL | |
106 | #define pxa_irq_resume NULL | |
107 | #endif | |
108 | ||
109 | struct sysdev_class pxa_irq_sysclass = { | |
110 | .name = "irq", | |
111 | .suspend = pxa_irq_suspend, | |
112 | .resume = pxa_irq_resume, | |
113 | }; | |
114 | ||
115 | static int __init pxa_irq_init(void) | |
116 | { | |
117 | return sysdev_class_register(&pxa_irq_sysclass); | |
118 | } | |
119 | ||
120 | core_initcall(pxa_irq_init); |