[deliverable/linux.git] / arch / arm / mach-pxa / mainstone.c

/*
 *  linux/arch/arm/mach-pxa/mainstone.c
 *
 *  Support for the Intel HCDDBBVA0 Development Platform.
 *  (go figure how they came up with such name...)
 *
 *  Author:	Nicolas Pitre
 *  Created:	Nov 05, 2002
 *  Copyright:	MontaVista Software Inc.
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License version 2 as
 *  published by the Free Software Foundation.
 */

#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/syscore_ops.h>
#include <linux/interrupt.h>
#include <linux/sched.h>
#include <linux/bitops.h>
#include <linux/fb.h>
#include <linux/ioport.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/input.h>
#include <linux/gpio_keys.h>
#include <linux/pwm_backlight.h>
#include <linux/smc91x.h>
#include <linux/i2c/pxa-i2c.h>

#include <asm/types.h>
#include <asm/setup.h>
#include <asm/memory.h>
#include <asm/mach-types.h>
#include <mach/hardware.h>
#include <asm/irq.h>
#include <asm/sizes.h>

#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <asm/mach/flash.h>

#include <mach/pxa27x.h>
#include <mach/gpio.h>
#include <mach/mainstone.h>
#include <mach/audio.h>
#include <mach/pxafb.h>
#include <mach/mmc.h>
#include <mach/irda.h>
#include <mach/ohci.h>
#include <plat/pxa27x_keypad.h>
#include <mach/smemc.h>

#include "generic.h"
#include "devices.h"

static unsigned long mainstone_pin_config[] = {
	/* Chip Select */
	GPIO15_nCS_1,

	/* LCD - 16bpp Active TFT */
	GPIOxx_LCD_TFT_16BPP,
	GPIO16_PWM0_OUT,	/* Backlight */

	/* MMC */
	GPIO32_MMC_CLK,
	GPIO112_MMC_CMD,
	GPIO92_MMC_DAT_0,
	GPIO109_MMC_DAT_1,
	GPIO110_MMC_DAT_2,
	GPIO111_MMC_DAT_3,

	/* USB Host Port 1 */
	GPIO88_USBH1_PWR,
	GPIO89_USBH1_PEN,

	/* PC Card */
	GPIO48_nPOE,
	GPIO49_nPWE,
	GPIO50_nPIOR,
	GPIO51_nPIOW,
	GPIO85_nPCE_1,
	GPIO54_nPCE_2,
	GPIO79_PSKTSEL,
	GPIO55_nPREG,
	GPIO56_nPWAIT,
	GPIO57_nIOIS16,

	/* AC97 */
	GPIO28_AC97_BITCLK,
	GPIO29_AC97_SDATA_IN_0,
	GPIO30_AC97_SDATA_OUT,
	GPIO31_AC97_SYNC,
	GPIO45_AC97_SYSCLK,

	/* Keypad */
	GPIO93_KP_DKIN_0,
	GPIO94_KP_DKIN_1,
	GPIO95_KP_DKIN_2,
	GPIO100_KP_MKIN_0	| WAKEUP_ON_LEVEL_HIGH,
	GPIO101_KP_MKIN_1	| WAKEUP_ON_LEVEL_HIGH,
	GPIO102_KP_MKIN_2	| WAKEUP_ON_LEVEL_HIGH,
	GPIO97_KP_MKIN_3	| WAKEUP_ON_LEVEL_HIGH,
	GPIO98_KP_MKIN_4	| WAKEUP_ON_LEVEL_HIGH,
	GPIO99_KP_MKIN_5	| WAKEUP_ON_LEVEL_HIGH,
	GPIO103_KP_MKOUT_0,
	GPIO104_KP_MKOUT_1,
	GPIO105_KP_MKOUT_2,
	GPIO106_KP_MKOUT_3,
	GPIO107_KP_MKOUT_4,
	GPIO108_KP_MKOUT_5,
	GPIO96_KP_MKOUT_6,

	/* I2C */
	GPIO117_I2C_SCL,
	GPIO118_I2C_SDA,

	/* GPIO */
	GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
};

static unsigned long mainstone_irq_enabled;

static void mainstone_mask_irq(struct irq_data *d)
{
	int mainstone_irq = (d->irq - MAINSTONE_IRQ(0));
	MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq));
}

static void mainstone_unmask_irq(struct irq_data *d)
{
	int mainstone_irq = (d->irq - MAINSTONE_IRQ(0));
	/* the irq can be acknowledged only if deasserted, so it's done here */
	MST_INTSETCLR &= ~(1 << mainstone_irq);
	MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq));
}

static struct irq_chip mainstone_irq_chip = {
	.name		= "FPGA",
	.irq_ack	= mainstone_mask_irq,
	.irq_mask	= mainstone_mask_irq,
	.irq_unmask	= mainstone_unmask_irq,
};

static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc)
{
	unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled;
	do {
		/* clear useless edge notification */
		desc->irq_data.chip->irq_ack(&desc->irq_data);
		if (likely(pending)) {
			irq = MAINSTONE_IRQ(0) + __ffs(pending);
			generic_handle_irq(irq);
		}
		pending = MST_INTSETCLR & mainstone_irq_enabled;
	} while (pending);
}

static void __init mainstone_init_irq(void)
{
	int irq;

	pxa27x_init_irq();

	/* setup extra Mainstone irqs */
	for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) {
		irq_set_chip_and_handler(irq, &mainstone_irq_chip,
					 handle_level_irq);
		if (irq == MAINSTONE_IRQ(10) || irq == MAINSTONE_IRQ(14))
			set_irq_flags(irq, IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN);
		else
			set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
	}
	set_irq_flags(MAINSTONE_IRQ(8), 0);
	set_irq_flags(MAINSTONE_IRQ(12), 0);

	MST_INTMSKENA = 0;
	MST_INTSETCLR = 0;

	irq_set_chained_handler(IRQ_GPIO(0), mainstone_irq_handler);
	irq_set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
}

#ifdef CONFIG_PM

static void mainstone_irq_resume(void)
{
	MST_INTMSKENA = mainstone_irq_enabled;
}

static struct syscore_ops mainstone_irq_syscore_ops = {
	.resume = mainstone_irq_resume,
};

static int __init mainstone_irq_device_init(void)
{
	if (machine_is_mainstone())
		register_syscore_ops(&mainstone_irq_syscore_ops);

	return 0;
}

device_initcall(mainstone_irq_device_init);

#endif


static struct resource smc91x_resources[] = {
	[0] = {
		.start	= (MST_ETH_PHYS + 0x300),
		.end	= (MST_ETH_PHYS + 0xfffff),
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= MAINSTONE_IRQ(3),
		.end	= MAINSTONE_IRQ(3),
		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
	}
};

static struct smc91x_platdata mainstone_smc91x_info = {
	.flags	= SMC91X_USE_8BIT | SMC91X_USE_16BIT | SMC91X_USE_32BIT |
		  SMC91X_NOWAIT | SMC91X_USE_DMA,
};

static struct platform_device smc91x_device = {
	.name		= "smc91x",
	.id		= 0,
	.num_resources	= ARRAY_SIZE(smc91x_resources),
	.resource	= smc91x_resources,
	.dev		= {
		.platform_data = &mainstone_smc91x_info,
	},
};

static int mst_audio_startup(struct snd_pcm_substream *substream, void *priv)
{
	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
		MST_MSCWR2 &= ~MST_MSCWR2_AC97_SPKROFF;
	return 0;
}

static void mst_audio_shutdown(struct snd_pcm_substream *substream, void *priv)
{
	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
		MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
}

static long mst_audio_suspend_mask;

static void mst_audio_suspend(void *priv)
{
	mst_audio_suspend_mask = MST_MSCWR2;
	MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
}

static void mst_audio_resume(void *priv)
{
	MST_MSCWR2 &= mst_audio_suspend_mask | ~MST_MSCWR2_AC97_SPKROFF;
}

static pxa2xx_audio_ops_t mst_audio_ops = {
	.startup	= mst_audio_startup,
	.shutdown	= mst_audio_shutdown,
	.suspend	= mst_audio_suspend,
	.resume		= mst_audio_resume,
};

static struct resource flash_resources[] = {
	[0] = {
		.start	= PXA_CS0_PHYS,
		.end	= PXA_CS0_PHYS + SZ_64M - 1,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= PXA_CS1_PHYS,
		.end	= PXA_CS1_PHYS + SZ_64M - 1,
		.flags	= IORESOURCE_MEM,
	},
};

static struct mtd_partition mainstoneflash0_partitions[] = {
	{
		.name =		"Bootloader",
		.size =		0x00040000,
		.offset =	0,
		.mask_flags =	MTD_WRITEABLE  /* force read-only */
	},{
		.name =		"Kernel",
		.size =		0x00400000,
		.offset =	0x00040000,
	},{
		.name =		"Filesystem",
		.size =		MTDPART_SIZ_FULL,
		.offset =	0x00440000
	}
};

static struct flash_platform_data mst_flash_data[2] = {
	{
		.map_name	= "cfi_probe",
		.parts		= mainstoneflash0_partitions,
		.nr_parts	= ARRAY_SIZE(mainstoneflash0_partitions),
	}, {
		.map_name	= "cfi_probe",
		.parts		= NULL,
		.nr_parts	= 0,
	}
};

static struct platform_device mst_flash_device[2] = {
	{
		.name		= "pxa2xx-flash",
		.id		= 0,
		.dev = {
			.platform_data = &mst_flash_data[0],
		},
		.resource = &flash_resources[0],
		.num_resources = 1,
	},
	{
		.name		= "pxa2xx-flash",
		.id		= 1,
		.dev = {
			.platform_data = &mst_flash_data[1],
		},
		.resource = &flash_resources[1],
		.num_resources = 1,
	},
};

#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
static struct platform_pwm_backlight_data mainstone_backlight_data = {
	.pwm_id		= 0,
	.max_brightness	= 1023,
	.dft_brightness	= 1023,
	.pwm_period_ns	= 78770,
};

static struct platform_device mainstone_backlight_device = {
	.name		= "pwm-backlight",
	.dev		= {
		.parent = &pxa27x_device_pwm0.dev,
		.platform_data = &mainstone_backlight_data,
	},
};

static void __init mainstone_backlight_register(void)
{
	int ret = platform_device_register(&mainstone_backlight_device);
	if (ret)
		printk(KERN_ERR "mainstone: failed to register backlight device: %d\n", ret);
}
#else
#define mainstone_backlight_register()	do { } while (0)
#endif

static struct pxafb_mode_info toshiba_ltm04c380k_mode = {
	.pixclock		= 50000,
	.xres			= 640,
	.yres			= 480,
	.bpp			= 16,
	.hsync_len		= 1,
	.left_margin		= 0x9f,
	.right_margin		= 1,
	.vsync_len		= 44,
	.upper_margin		= 0,
	.lower_margin		= 0,
	.sync			= FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
};

static struct pxafb_mode_info toshiba_ltm035a776c_mode = {
	.pixclock		= 110000,
	.xres			= 240,
	.yres			= 320,
	.bpp			= 16,
	.hsync_len		= 4,
	.left_margin		= 8,
	.right_margin		= 20,
	.vsync_len		= 3,
	.upper_margin		= 1,
	.lower_margin		= 10,
	.sync			= FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
};

static struct pxafb_mach_info mainstone_pxafb_info = {
	.num_modes      	= 1,
	.lcd_conn		= LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
};

static int mainstone_mci_init(struct device *dev, irq_handler_t mstone_detect_int, void *data)
{
	int err;

	/* make sure SD/Memory Stick multiplexer's signals
	 * are routed to MMC controller
	 */
	MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;

	err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, IRQF_DISABLED,
			     "MMC card detect", data);
	if (err)
		printk(KERN_ERR "mainstone_mci_init: MMC/SD: can't request MMC card detect IRQ\n");

	return err;
}

static void mainstone_mci_setpower(struct device *dev, unsigned int vdd)
{
	struct pxamci_platform_data* p_d = dev->platform_data;

	if (( 1 << vdd) & p_d->ocr_mask) {
		printk(KERN_DEBUG "%s: on\n", __func__);
		MST_MSCWR1 |= MST_MSCWR1_MMC_ON;
		MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
	} else {
		printk(KERN_DEBUG "%s: off\n", __func__);
		MST_MSCWR1 &= ~MST_MSCWR1_MMC_ON;
	}
}

static void mainstone_mci_exit(struct device *dev, void *data)
{
	free_irq(MAINSTONE_MMC_IRQ, data);
}

static struct pxamci_platform_data mainstone_mci_platform_data = {
	.ocr_mask		= MMC_VDD_32_33|MMC_VDD_33_34,
	.init 			= mainstone_mci_init,
	.setpower 		= mainstone_mci_setpower,
	.exit			= mainstone_mci_exit,
	.gpio_card_detect	= -1,
	.gpio_card_ro		= -1,
	.gpio_power		= -1,
};

static void mainstone_irda_transceiver_mode(struct device *dev, int mode)
{
	unsigned long flags;

	local_irq_save(flags);
	if (mode & IR_SIRMODE) {
		MST_MSCWR1 &= ~MST_MSCWR1_IRDA_FIR;
	} else if (mode & IR_FIRMODE) {
		MST_MSCWR1 |= MST_MSCWR1_IRDA_FIR;
	}
	pxa2xx_transceiver_mode(dev, mode);
	if (mode & IR_OFF) {
		MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_OFF;
	} else {
		MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_FULL;
	}
	local_irq_restore(flags);
}

static struct pxaficp_platform_data mainstone_ficp_platform_data = {
	.gpio_pwdown		= -1,
	.transceiver_cap	= IR_SIRMODE | IR_FIRMODE | IR_OFF,
	.transceiver_mode	= mainstone_irda_transceiver_mode,
};

static struct gpio_keys_button gpio_keys_button[] = {
	[0] = {
		.desc	= "wakeup",
		.code	= KEY_SUSPEND,
		.type	= EV_KEY,
		.gpio	= 1,
		.wakeup	= 1,
	},
};

static struct gpio_keys_platform_data mainstone_gpio_keys = {
	.buttons	= gpio_keys_button,
	.nbuttons	= 1,
};

static struct platform_device mst_gpio_keys_device = {
	.name		= "gpio-keys",
	.id		= -1,
	.dev		= {
		.platform_data	= &mainstone_gpio_keys,
	},
};

static struct platform_device *platform_devices[] __initdata = {
	&smc91x_device,
	&mst_flash_device[0],
	&mst_flash_device[1],
	&mst_gpio_keys_device,
};

static struct pxaohci_platform_data mainstone_ohci_platform_data = {
	.port_mode	= PMM_PERPORT_MODE,
	.flags		= ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
};

#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
static unsigned int mainstone_matrix_keys[] = {
	KEY(0, 0, KEY_A), KEY(1, 0, KEY_B), KEY(2, 0, KEY_C),
	KEY(3, 0, KEY_D), KEY(4, 0, KEY_E), KEY(5, 0, KEY_F),
	KEY(0, 1, KEY_G), KEY(1, 1, KEY_H), KEY(2, 1, KEY_I),
	KEY(3, 1, KEY_J), KEY(4, 1, KEY_K), KEY(5, 1, KEY_L),
	KEY(0, 2, KEY_M), KEY(1, 2, KEY_N), KEY(2, 2, KEY_O),
	KEY(3, 2, KEY_P), KEY(4, 2, KEY_Q), KEY(5, 2, KEY_R),
	KEY(0, 3, KEY_S), KEY(1, 3, KEY_T), KEY(2, 3, KEY_U),
	KEY(3, 3, KEY_V), KEY(4, 3, KEY_W), KEY(5, 3, KEY_X),
	KEY(2, 4, KEY_Y), KEY(3, 4, KEY_Z),

	KEY(0, 4, KEY_DOT),	/* . */
	KEY(1, 4, KEY_CLOSE),	/* @ */
	KEY(4, 4, KEY_SLASH),
	KEY(5, 4, KEY_BACKSLASH),
	KEY(0, 5, KEY_HOME),
	KEY(1, 5, KEY_LEFTSHIFT),
	KEY(2, 5, KEY_SPACE),
	KEY(3, 5, KEY_SPACE),
	KEY(4, 5, KEY_ENTER),
	KEY(5, 5, KEY_BACKSPACE),

	KEY(0, 6, KEY_UP),
	KEY(1, 6, KEY_DOWN),
	KEY(2, 6, KEY_LEFT),
	KEY(3, 6, KEY_RIGHT),
	KEY(4, 6, KEY_SELECT),
};

struct pxa27x_keypad_platform_data mainstone_keypad_info = {
	.matrix_key_rows	= 6,
	.matrix_key_cols	= 7,
	.matrix_key_map		= mainstone_matrix_keys,
	.matrix_key_map_size	= ARRAY_SIZE(mainstone_matrix_keys),

	.enable_rotary0		= 1,
	.rotary0_up_key		= KEY_UP,
	.rotary0_down_key	= KEY_DOWN,

	.debounce_interval	= 30,
};

static void __init mainstone_init_keypad(void)
{
	pxa_set_keypad_info(&mainstone_keypad_info);
}
#else
static inline void mainstone_init_keypad(void) {}
#endif

static void __init mainstone_init(void)
{
	int SW7 = 0;  /* FIXME: get from SCR (Mst doc section 3.2.1.1) */

	pxa2xx_mfp_config(ARRAY_AND_SIZE(mainstone_pin_config));

	pxa_set_ffuart_info(NULL);
	pxa_set_btuart_info(NULL);
	pxa_set_stuart_info(NULL);

	mst_flash_data[0].width = (__raw_readl(BOOT_DEF) & 1) ? 2 : 4;
	mst_flash_data[1].width = 4;

	/* Compensate for SW7 which swaps the flash banks */
	mst_flash_data[SW7].name = "processor-flash";
	mst_flash_data[SW7 ^ 1].name = "mainboard-flash";

	printk(KERN_NOTICE "Mainstone configured to boot from %s\n",
	       mst_flash_data[0].name);

	/* system bus arbiter setting
	 * - Core_Park
	 * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
	 */
	ARB_CNTRL = ARB_CORE_PARK | 0x234;

	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));

	/* reading Mainstone's "Virtual Configuration Register"
	   might be handy to select LCD type here */
	if (0)
		mainstone_pxafb_info.modes = &toshiba_ltm04c380k_mode;
	else
		mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode;

	pxa_set_fb_info(NULL, &mainstone_pxafb_info);
	mainstone_backlight_register();

	pxa_set_mci_info(&mainstone_mci_platform_data);
	pxa_set_ficp_info(&mainstone_ficp_platform_data);
	pxa_set_ohci_info(&mainstone_ohci_platform_data);
	pxa_set_i2c_info(NULL);
	pxa_set_ac97_info(&mst_audio_ops);

	mainstone_init_keypad();
}


static struct map_desc mainstone_io_desc[] __initdata = {
  	{	/* CPLD */
		.virtual	=  MST_FPGA_VIRT,
		.pfn		= __phys_to_pfn(MST_FPGA_PHYS),
		.length		= 0x00100000,
		.type		= MT_DEVICE
	}
};

static void __init mainstone_map_io(void)
{
	pxa27x_map_io();
	iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc));

 	/*	for use I SRAM as framebuffer.	*/
 	PSLR |= 0xF04;
 	PCFR = 0x66;
}

MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
	/* Maintainer: MontaVista Software Inc. */
	.boot_params	= 0xa0000100,	/* BLOB boot parameter setting */
	.map_io		= mainstone_map_io,
	.nr_irqs	= MAINSTONE_NR_IRQS,
	.init_irq	= mainstone_init_irq,
	.handle_irq	= pxa27x_handle_irq,
	.timer		= &pxa_timer,
	.init_machine	= mainstone_init,
MACHINE_END
Commit	Line	Data
1da177e4 LT	1	/*
	2	* linux/arch/arm/mach-pxa/mainstone.c
	3	*
	4	* Support for the Intel HCDDBBVA0 Development Platform.
	5	* (go figure how they came up with such name...)
	6	*
	7	* Author: Nicolas Pitre
	8	* Created: Nov 05, 2002
	9	* Copyright: MontaVista Software Inc.
	10	*
	11	* This program is free software; you can redistribute it and/or modify
	12	* it under the terms of the GNU General Public License version 2 as
	13	* published by the Free Software Foundation.
	14	*/
	15
	16	#include <linux/init.h>
d052d1be	17	#include <linux/platform_device.h>
2eaa03b5	18	#include <linux/syscore_ops.h>
1da177e4 LT	19	#include <linux/interrupt.h>
	20	#include <linux/sched.h>
	21	#include <linux/bitops.h>
	22	#include <linux/fb.h>
74ec71e1 TP	23	#include <linux/ioport.h>
	24	#include <linux/mtd/mtd.h>
	25	#include <linux/mtd/partitions.h>
450d2874	26	#include <linux/input.h>
450d2874	27	#include <linux/gpio_keys.h>
402e4909	28	#include <linux/pwm_backlight.h>
38fd6c38	29	#include <linux/smc91x.h>
b459396e	30	#include <linux/i2c/pxa-i2c.h>
1da177e4 LT	31
	32	#include <asm/types.h>
	33	#include <asm/setup.h>
	34	#include <asm/memory.h>
	35	#include <asm/mach-types.h>
a09e64fb	36	#include <mach/hardware.h>
1da177e4	37	#include <asm/irq.h>
74ec71e1	38	#include <asm/sizes.h>
1da177e4 LT	39
	40	#include <asm/mach/arch.h>
	41	#include <asm/mach/map.h>
	42	#include <asm/mach/irq.h>
74ec71e1	43	#include <asm/mach/flash.h>
1da177e4	44
51c62982	45	#include <mach/pxa27x.h>
da065a0b	46	#include <mach/gpio.h>
a09e64fb RK	47	#include <mach/mainstone.h>
	48	#include <mach/audio.h>
	49	#include <mach/pxafb.h>
a09e64fb RK	50	#include <mach/mmc.h>
	51	#include <mach/irda.h>
	52	#include <mach/ohci.h>
4a2490ea	53	#include <plat/pxa27x_keypad.h>
ad68bb9f	54	#include <mach/smemc.h>
1da177e4 LT	55
1da177e4 LT	56	#include "generic.h"
46c41e62	57	#include "devices.h"
1da177e4	58
fef06d27	59	static unsigned long mainstone_pin_config[] = {
	60	/* Chip Select */
	61	GPIO15_nCS_1,
	62
	63	/* LCD - 16bpp Active TFT */
bedbda97	64	GPIOxx_LCD_TFT_16BPP,
fef06d27	65	GPIO16_PWM0_OUT, /* Backlight */
	66
	67	/* MMC */
	68	GPIO32_MMC_CLK,
	69	GPIO112_MMC_CMD,
	70	GPIO92_MMC_DAT_0,
	71	GPIO109_MMC_DAT_1,
	72	GPIO110_MMC_DAT_2,
	73	GPIO111_MMC_DAT_3,
	74
	75	/* USB Host Port 1 */
	76	GPIO88_USBH1_PWR,
	77	GPIO89_USBH1_PEN,
	78
	79	/* PC Card */
	80	GPIO48_nPOE,
	81	GPIO49_nPWE,
	82	GPIO50_nPIOR,
	83	GPIO51_nPIOW,
	84	GPIO85_nPCE_1,
	85	GPIO54_nPCE_2,
	86	GPIO79_PSKTSEL,
	87	GPIO55_nPREG,
	88	GPIO56_nPWAIT,
	89	GPIO57_nIOIS16,
	90
	91	/* AC97 */
c11b6a42 EM	92	GPIO28_AC97_BITCLK,
	93	GPIO29_AC97_SDATA_IN_0,
	94	GPIO30_AC97_SDATA_OUT,
	95	GPIO31_AC97_SYNC,
fef06d27	96	GPIO45_AC97_SYSCLK,
	97
	98	/* Keypad */
b18773d5 EM	99	GPIO93_KP_DKIN_0,
	100	GPIO94_KP_DKIN_1,
	101	GPIO95_KP_DKIN_2,
fef06d27	102	GPIO100_KP_MKIN_0 \| WAKEUP_ON_LEVEL_HIGH,
	103	GPIO101_KP_MKIN_1 \| WAKEUP_ON_LEVEL_HIGH,
	104	GPIO102_KP_MKIN_2 \| WAKEUP_ON_LEVEL_HIGH,
	105	GPIO97_KP_MKIN_3 \| WAKEUP_ON_LEVEL_HIGH,
	106	GPIO98_KP_MKIN_4 \| WAKEUP_ON_LEVEL_HIGH,
	107	GPIO99_KP_MKIN_5 \| WAKEUP_ON_LEVEL_HIGH,
	108	GPIO103_KP_MKOUT_0,
	109	GPIO104_KP_MKOUT_1,
	110	GPIO105_KP_MKOUT_2,
	111	GPIO106_KP_MKOUT_3,
	112	GPIO107_KP_MKOUT_4,
	113	GPIO108_KP_MKOUT_5,
	114	GPIO96_KP_MKOUT_6,
	115
6f584cfa EM	116	/* I2C */
	117	GPIO117_I2C_SCL,
	118	GPIO118_I2C_SDA,
	119
fef06d27	120	/* GPIO */
	121	GPIO1_GPIO \| WAKEUP_ON_EDGE_BOTH,
	122	};
1da177e4 LT	123
	124	static unsigned long mainstone_irq_enabled;
	125
a3f4c927	126	static void mainstone_mask_irq(struct irq_data *d)
1da177e4	127	{
a3f4c927	128	int mainstone_irq = (d->irq - MAINSTONE_IRQ(0));
1da177e4 LT	129	MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq));
	130	}
	131
a3f4c927	132	static void mainstone_unmask_irq(struct irq_data *d)
1da177e4	133	{
a3f4c927	134	int mainstone_irq = (d->irq - MAINSTONE_IRQ(0));
1da177e4 LT	135	/* the irq can be acknowledged only if deasserted, so it's done here */
	136	MST_INTSETCLR &= ~(1 << mainstone_irq);
	137	MST_INTMSKENA = (mainstone_irq_enabled \|= (1 << mainstone_irq));
	138	}
	139
38c677cb DB	140	static struct irq_chip mainstone_irq_chip = {
38c677cb DB	141	.name = "FPGA",
a3f4c927 LB	142	.irq_ack = mainstone_mask_irq,
	143	.irq_mask = mainstone_mask_irq,
	144	.irq_unmask = mainstone_unmask_irq,
1da177e4 LT	145	};
1da177e4 LT	146
10dd5ce2	147	static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc)
1da177e4 LT	148	{
	149	unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled;
	150	do {
a3f4c927 LB	151	/* clear useless edge notification */
a3f4c927 LB	152	desc->irq_data.chip->irq_ack(&desc->irq_data);
1da177e4 LT	153	if (likely(pending)) {
1da177e4 LT	154	irq = MAINSTONE_IRQ(0) + __ffs(pending);
d8aa0251	155	generic_handle_irq(irq);
1da177e4 LT	156	}
	157	pending = MST_INTSETCLR & mainstone_irq_enabled;
	158	} while (pending);
	159	}
	160
	161	static void __init mainstone_init_irq(void)
	162	{
	163	int irq;
	164
cd49104d	165	pxa27x_init_irq();
1da177e4 LT	166
	167	/* setup extra Mainstone irqs */
	168	for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) {
f38c02f3 TG	169	irq_set_chip_and_handler(irq, &mainstone_irq_chip,
f38c02f3 TG	170	handle_level_irq);
ec64152f TG	171	if (irq == MAINSTONE_IRQ(10) \|\| irq == MAINSTONE_IRQ(14))
	172	set_irq_flags(irq, IRQF_VALID \| IRQF_PROBE \| IRQF_NOAUTOEN);
	173	else
	174	set_irq_flags(irq, IRQF_VALID \| IRQF_PROBE);
1da177e4 LT	175	}
	176	set_irq_flags(MAINSTONE_IRQ(8), 0);
	177	set_irq_flags(MAINSTONE_IRQ(12), 0);
	178
	179	MST_INTMSKENA = 0;
	180	MST_INTSETCLR = 0;
	181
6845664a TG	182	irq_set_chained_handler(IRQ_GPIO(0), mainstone_irq_handler);
6845664a TG	183	irq_set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
1da177e4 LT	184	}
1da177e4 LT	185
22f11c4e NP	186	#ifdef CONFIG_PM
22f11c4e NP	187
2eaa03b5	188	static void mainstone_irq_resume(void)
22f11c4e NP	189	{
22f11c4e NP	190	MST_INTMSKENA = mainstone_irq_enabled;
22f11c4e NP	191	}
22f11c4e NP	192
2eaa03b5	193	static struct syscore_ops mainstone_irq_syscore_ops = {
22f11c4e NP	194	.resume = mainstone_irq_resume,
	195	};
	196
22f11c4e NP	197	static int __init mainstone_irq_device_init(void)
22f11c4e NP	198	{
2eaa03b5 RW	199	if (machine_is_mainstone())
2eaa03b5 RW	200	register_syscore_ops(&mainstone_irq_syscore_ops);
16f159b1	201
2eaa03b5	202	return 0;
22f11c4e NP	203	}
	204
	205	device_initcall(mainstone_irq_device_init);
	206
	207	#endif
	208
1da177e4 LT	209
	210	static struct resource smc91x_resources[] = {
	211	[0] = {
	212	.start = (MST_ETH_PHYS + 0x300),
	213	.end = (MST_ETH_PHYS + 0xfffff),
	214	.flags = IORESOURCE_MEM,
	215	},
	216	[1] = {
	217	.start = MAINSTONE_IRQ(3),
	218	.end = MAINSTONE_IRQ(3),
e7b3dc7e	219	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHEDGE,
1da177e4 LT	220	}
	221	};
	222
38fd6c38 EM	223	static struct smc91x_platdata mainstone_smc91x_info = {
	224	.flags = SMC91X_USE_8BIT \| SMC91X_USE_16BIT \| SMC91X_USE_32BIT \|
	225	SMC91X_NOWAIT \| SMC91X_USE_DMA,
	226	};
	227
1da177e4 LT	228	static struct platform_device smc91x_device = {
	229	.name = "smc91x",
	230	.id = 0,
	231	.num_resources = ARRAY_SIZE(smc91x_resources),
	232	.resource = smc91x_resources,
38fd6c38 EM	233	.dev = {
	234	.platform_data = &mainstone_smc91x_info,
	235	},
1da177e4 LT	236	};
1da177e4 LT	237
f7cbb7fc	238	static int mst_audio_startup(struct snd_pcm_substream substream, void priv)
1da177e4 LT	239	{
	240	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
	241	MST_MSCWR2 &= ~MST_MSCWR2_AC97_SPKROFF;
	242	return 0;
	243	}
	244
f7cbb7fc	245	static void mst_audio_shutdown(struct snd_pcm_substream substream, void priv)
1da177e4 LT	246	{
	247	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
	248	MST_MSCWR2 \|= MST_MSCWR2_AC97_SPKROFF;
	249	}
	250
	251	static long mst_audio_suspend_mask;
	252
	253	static void mst_audio_suspend(void *priv)
	254	{
	255	mst_audio_suspend_mask = MST_MSCWR2;
	256	MST_MSCWR2 \|= MST_MSCWR2_AC97_SPKROFF;
	257	}
	258
	259	static void mst_audio_resume(void *priv)
	260	{
	261	MST_MSCWR2 &= mst_audio_suspend_mask \| ~MST_MSCWR2_AC97_SPKROFF;
	262	}
	263
	264	static pxa2xx_audio_ops_t mst_audio_ops = {
	265	.startup = mst_audio_startup,
	266	.shutdown = mst_audio_shutdown,
	267	.suspend = mst_audio_suspend,
	268	.resume = mst_audio_resume,
	269	};
	270
74ec71e1 TP	271	static struct resource flash_resources[] = {
	272	[0] = {
	273	.start = PXA_CS0_PHYS,
	274	.end = PXA_CS0_PHYS + SZ_64M - 1,
	275	.flags = IORESOURCE_MEM,
	276	},
	277	[1] = {
	278	.start = PXA_CS1_PHYS,
	279	.end = PXA_CS1_PHYS + SZ_64M - 1,
	280	.flags = IORESOURCE_MEM,
	281	},
	282	};
	283
	284	static struct mtd_partition mainstoneflash0_partitions[] = {
	285	{
	286	.name = "Bootloader",
	287	.size = 0x00040000,
	288	.offset = 0,
	289	.mask_flags = MTD_WRITEABLE /* force read-only */
	290	},{
	291	.name = "Kernel",
	292	.size = 0x00400000,
	293	.offset = 0x00040000,
	294	},{
	295	.name = "Filesystem",
	296	.size = MTDPART_SIZ_FULL,
	297	.offset = 0x00440000
	298	}
	299	};
	300
	301	static struct flash_platform_data mst_flash_data[2] = {
	302	{
	303	.map_name = "cfi_probe",
	304	.parts = mainstoneflash0_partitions,
	305	.nr_parts = ARRAY_SIZE(mainstoneflash0_partitions),
	306	}, {
	307	.map_name = "cfi_probe",
	308	.parts = NULL,
	309	.nr_parts = 0,
	310	}
	311	};
	312
	313	static struct platform_device mst_flash_device[2] = {
	314	{
	315	.name = "pxa2xx-flash",
	316	.id = 0,
	317	.dev = {
	318	.platform_data = &mst_flash_data[0],
	319	},
	320	.resource = &flash_resources[0],
	321	.num_resources = 1,
	322	},
	323	{
	324	.name = "pxa2xx-flash",
	325	.id = 1,
	326	.dev = {
	327	.platform_data = &mst_flash_data[1],
	328	},
	329	.resource = &flash_resources[1],
	330	.num_resources = 1,
	331	},
	332	};
	333
402e4909 RK	334	#if defined(CONFIG_FB_PXA) \|\| defined(CONFIG_FB_PXA_MODULE)
	335	static struct platform_pwm_backlight_data mainstone_backlight_data = {
	336	.pwm_id = 0,
	337	.max_brightness = 1023,
	338	.dft_brightness = 1023,
	339	.pwm_period_ns = 78770,
	340	};
3777f774	341
402e4909 RK	342	static struct platform_device mainstone_backlight_device = {
	343	.name = "pwm-backlight",
	344	.dev = {
	345	.parent = &pxa27x_device_pwm0.dev,
	346	.platform_data = &mainstone_backlight_data,
	347	},
3777f774 RK	348	};
	349
	350	static void __init mainstone_backlight_register(void)
	351	{
402e4909 RK	352	int ret = platform_device_register(&mainstone_backlight_device);
	353	if (ret)
	354	printk(KERN_ERR "mainstone: failed to register backlight device: %d\n", ret);
1da177e4	355	}
3777f774 RK	356	#else
	357	#define mainstone_backlight_register() do { } while (0)
	358	#endif
1da177e4	359
d14b272b	360	static struct pxafb_mode_info toshiba_ltm04c380k_mode = {
1da177e4 LT	361	.pixclock = 50000,
	362	.xres = 640,
	363	.yres = 480,
	364	.bpp = 16,
	365	.hsync_len = 1,
	366	.left_margin = 0x9f,
	367	.right_margin = 1,
	368	.vsync_len = 44,
	369	.upper_margin = 0,
	370	.lower_margin = 0,
	371	.sync = FB_SYNC_HOR_HIGH_ACT\|FB_SYNC_VERT_HIGH_ACT,
1da177e4 LT	372	};
1da177e4 LT	373
d14b272b	374	static struct pxafb_mode_info toshiba_ltm035a776c_mode = {
1da177e4 LT	375	.pixclock = 110000,
	376	.xres = 240,
	377	.yres = 320,
	378	.bpp = 16,
	379	.hsync_len = 4,
	380	.left_margin = 8,
	381	.right_margin = 20,
	382	.vsync_len = 3,
	383	.upper_margin = 1,
	384	.lower_margin = 10,
	385	.sync = FB_SYNC_HOR_HIGH_ACT\|FB_SYNC_VERT_HIGH_ACT,
d14b272b RP	386	};
	387
	388	static struct pxafb_mach_info mainstone_pxafb_info = {
	389	.num_modes = 1,
0454bd09	390	.lcd_conn = LCD_COLOR_TFT_16BPP \| LCD_PCLK_EDGE_FALL,
1da177e4 LT	391	};
1da177e4 LT	392
40220c1a	393	static int mainstone_mci_init(struct device dev, irq_handler_t mstone_detect_int, void data)
1da177e4 LT	394	{
	395	int err;
	396
1da177e4 LT	397	/* make sure SD/Memory Stick multiplexer's signals
	398	* are routed to MMC controller
	399	*/
	400	MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
	401
52e405ea	402	err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, IRQF_DISABLED,
1da177e4	403	"MMC card detect", data);
2687bd38	404	if (err)
1da177e4	405	printk(KERN_ERR "mainstone_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
1da177e4	406
2687bd38	407	return err;
1da177e4 LT	408	}
	409
	410	static void mainstone_mci_setpower(struct device *dev, unsigned int vdd)
	411	{
	412	struct pxamci_platform_data* p_d = dev->platform_data;
	413
	414	if (( 1 << vdd) & p_d->ocr_mask) {
8e86f427	415	printk(KERN_DEBUG "%s: on\n", __func__);
1da177e4 LT	416	MST_MSCWR1 \|= MST_MSCWR1_MMC_ON;
	417	MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
	418	} else {
8e86f427	419	printk(KERN_DEBUG "%s: off\n", __func__);
1da177e4 LT	420	MST_MSCWR1 &= ~MST_MSCWR1_MMC_ON;
	421	}
	422	}
	423
	424	static void mainstone_mci_exit(struct device dev, void data)
	425	{
	426	free_irq(MAINSTONE_MMC_IRQ, data);
	427	}
	428
	429	static struct pxamci_platform_data mainstone_mci_platform_data = {
7a648256 RJ	430	.ocr_mask = MMC_VDD_32_33\|MMC_VDD_33_34,
	431	.init = mainstone_mci_init,
	432	.setpower = mainstone_mci_setpower,
	433	.exit = mainstone_mci_exit,
	434	.gpio_card_detect = -1,
	435	.gpio_card_ro = -1,
	436	.gpio_power = -1,
1da177e4 LT	437	};
1da177e4 LT	438
6f475c01 NP	439	static void mainstone_irda_transceiver_mode(struct device *dev, int mode)
	440	{
	441	unsigned long flags;
	442
	443	local_irq_save(flags);
	444	if (mode & IR_SIRMODE) {
	445	MST_MSCWR1 &= ~MST_MSCWR1_IRDA_FIR;
	446	} else if (mode & IR_FIRMODE) {
	447	MST_MSCWR1 \|= MST_MSCWR1_IRDA_FIR;
	448	}
0fc3ff31	449	pxa2xx_transceiver_mode(dev, mode);
6f475c01 NP	450	if (mode & IR_OFF) {
	451	MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) \| MST_MSCWR1_IRDA_OFF;
	452	} else {
	453	MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) \| MST_MSCWR1_IRDA_FULL;
	454	}
	455	local_irq_restore(flags);
	456	}
	457
	458	static struct pxaficp_platform_data mainstone_ficp_platform_data = {
c4bd0172 MV	459	.gpio_pwdown = -1,
	460	.transceiver_cap = IR_SIRMODE \| IR_FIRMODE \| IR_OFF,
	461	.transceiver_mode = mainstone_irda_transceiver_mode,
6f475c01 NP	462	};
6f475c01 NP	463
450d2874	464	static struct gpio_keys_button gpio_keys_button[] = {
	465	[0] = {
	466	.desc = "wakeup",
	467	.code = KEY_SUSPEND,
	468	.type = EV_KEY,
	469	.gpio = 1,
	470	.wakeup = 1,
	471	},
	472	};
	473
	474	static struct gpio_keys_platform_data mainstone_gpio_keys = {
	475	.buttons = gpio_keys_button,
	476	.nbuttons = 1,
	477	};
	478
	479	static struct platform_device mst_gpio_keys_device = {
	480	.name = "gpio-keys",
	481	.id = -1,
	482	.dev = {
	483	.platform_data = &mainstone_gpio_keys,
	484	},
	485	};
	486
74ec71e1 TP	487	static struct platform_device *platform_devices[] __initdata = {
74ec71e1 TP	488	&smc91x_device,
74ec71e1 TP	489	&mst_flash_device[0],
74ec71e1 TP	490	&mst_flash_device[1],
450d2874	491	&mst_gpio_keys_device,
74ec71e1 TP	492	};
74ec71e1 TP	493
81f280e2 RP	494	static struct pxaohci_platform_data mainstone_ohci_platform_data = {
81f280e2 RP	495	.port_mode = PMM_PERPORT_MODE,
097b5334	496	.flags = ENABLE_PORT_ALL \| POWER_CONTROL_LOW \| POWER_SENSE_LOW,
81f280e2 RP	497	};
81f280e2 RP	498
36caeb4e	499	#if defined(CONFIG_KEYBOARD_PXA27x) \|\| defined(CONFIG_KEYBOARD_PXA27x_MODULE)
55c26e40	500	static unsigned int mainstone_matrix_keys[] = {
	501	KEY(0, 0, KEY_A), KEY(1, 0, KEY_B), KEY(2, 0, KEY_C),
	502	KEY(3, 0, KEY_D), KEY(4, 0, KEY_E), KEY(5, 0, KEY_F),
	503	KEY(0, 1, KEY_G), KEY(1, 1, KEY_H), KEY(2, 1, KEY_I),
	504	KEY(3, 1, KEY_J), KEY(4, 1, KEY_K), KEY(5, 1, KEY_L),
	505	KEY(0, 2, KEY_M), KEY(1, 2, KEY_N), KEY(2, 2, KEY_O),
	506	KEY(3, 2, KEY_P), KEY(4, 2, KEY_Q), KEY(5, 2, KEY_R),
	507	KEY(0, 3, KEY_S), KEY(1, 3, KEY_T), KEY(2, 3, KEY_U),
	508	KEY(3, 3, KEY_V), KEY(4, 3, KEY_W), KEY(5, 3, KEY_X),
	509	KEY(2, 4, KEY_Y), KEY(3, 4, KEY_Z),
	510
	511	KEY(0, 4, KEY_DOT), /* . */
	512	KEY(1, 4, KEY_CLOSE), /* @ */
	513	KEY(4, 4, KEY_SLASH),
	514	KEY(5, 4, KEY_BACKSLASH),
	515	KEY(0, 5, KEY_HOME),
	516	KEY(1, 5, KEY_LEFTSHIFT),
	517	KEY(2, 5, KEY_SPACE),
	518	KEY(3, 5, KEY_SPACE),
	519	KEY(4, 5, KEY_ENTER),
	520	KEY(5, 5, KEY_BACKSPACE),
	521
	522	KEY(0, 6, KEY_UP),
	523	KEY(1, 6, KEY_DOWN),
	524	KEY(2, 6, KEY_LEFT),
	525	KEY(3, 6, KEY_RIGHT),
	526	KEY(4, 6, KEY_SELECT),
	527	};
	528
	529	struct pxa27x_keypad_platform_data mainstone_keypad_info = {
	530	.matrix_key_rows = 6,
	531	.matrix_key_cols = 7,
	532	.matrix_key_map = mainstone_matrix_keys,
	533	.matrix_key_map_size = ARRAY_SIZE(mainstone_matrix_keys),
	534
	535	.enable_rotary0 = 1,
	536	.rotary0_up_key = KEY_UP,
	537	.rotary0_down_key = KEY_DOWN,
	538
	539	.debounce_interval = 30,
	540	};
	541
	542	static void __init mainstone_init_keypad(void)
	543	{
	544	pxa_set_keypad_info(&mainstone_keypad_info);
	545	}
	546	#else
	547	static inline void mainstone_init_keypad(void) {}
	548	#endif
	549
1da177e4 LT	550	static void __init mainstone_init(void)
1da177e4 LT	551	{
74ec71e1 TP	552	int SW7 = 0; /* FIXME: get from SCR (Mst doc section 3.2.1.1) */
74ec71e1 TP	553
fef06d27	554	pxa2xx_mfp_config(ARRAY_AND_SIZE(mainstone_pin_config));
fef06d27	555
cc155c6f RK	556	pxa_set_ffuart_info(NULL);
	557	pxa_set_btuart_info(NULL);
	558	pxa_set_stuart_info(NULL);
	559
ad68bb9f	560	mst_flash_data[0].width = (__raw_readl(BOOT_DEF) & 1) ? 2 : 4;
74ec71e1 TP	561	mst_flash_data[1].width = 4;
	562
	563	/* Compensate for SW7 which swaps the flash banks */
	564	mst_flash_data[SW7].name = "processor-flash";
	565	mst_flash_data[SW7 ^ 1].name = "mainboard-flash";
	566
	567	printk(KERN_NOTICE "Mainstone configured to boot from %s\n",
	568	mst_flash_data[0].name);
	569
5b2e98cd JH	570	/* system bus arbiter setting
	571	* - Core_Park
	572	* - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
	573	*/
	574	ARB_CNTRL = ARB_CORE_PARK \| 0x234;
	575
74ec71e1	576	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
1da177e4 LT	577
	578	/* reading Mainstone's "Virtual Configuration Register"
	579	might be handy to select LCD type here */
	580	if (0)
d14b272b	581	mainstone_pxafb_info.modes = &toshiba_ltm04c380k_mode;
1da177e4	582	else
d14b272b RP	583	mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode;
d14b272b RP	584
4321e1a1	585	pxa_set_fb_info(NULL, &mainstone_pxafb_info);
3777f774	586	mainstone_backlight_register();
1da177e4 LT	587
1da177e4 LT	588	pxa_set_mci_info(&mainstone_mci_platform_data);
6f475c01	589	pxa_set_ficp_info(&mainstone_ficp_platform_data);
81f280e2	590	pxa_set_ohci_info(&mainstone_ohci_platform_data);
835e7f1c	591	pxa_set_i2c_info(NULL);
9f19d638	592	pxa_set_ac97_info(&mst_audio_ops);
55c26e40	593
55c26e40	594	mainstone_init_keypad();
1da177e4 LT	595	}
	596
	597
	598	static struct map_desc mainstone_io_desc[] __initdata = {
6f9182eb DS	599	{ /* CPLD */
	600	.virtual = MST_FPGA_VIRT,
	601	.pfn = __phys_to_pfn(MST_FPGA_PHYS),
	602	.length = 0x00100000,
	603	.type = MT_DEVICE
	604	}
1da177e4 LT	605	};
	606
	607	static void __init mainstone_map_io(void)
	608	{
851982c1	609	pxa27x_map_io();
1da177e4 LT	610	iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc));
1da177e4 LT	611
8775420d TP	612	/* for use I SRAM as framebuffer. */
	613	PSLR \|= 0xF04;
	614	PCFR = 0x66;
1da177e4 LT	615	}
	616
	617	MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
e9dea0c6	618	/* Maintainer: MontaVista Software Inc. */
a7d14f87	619	.boot_params = 0xa0000100, /* BLOB boot parameter setting */
e9dea0c6	620	.map_io = mainstone_map_io,
6ac6b817	621	.nr_irqs = MAINSTONE_NR_IRQS,
e9dea0c6	622	.init_irq = mainstone_init_irq,
8a97ae2f	623	.handle_irq = pxa27x_handle_irq,
1da177e4	624	.timer = &pxa_timer,
e9dea0c6	625	.init_machine = mainstone_init,
1da177e4	626	MACHINE_END