Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * linux/arch/arm/mach-pxa/mainstone.c | |
3 | * | |
4 | * Support for the Intel HCDDBBVA0 Development Platform. | |
5 | * (go figure how they came up with such name...) | |
6 | * | |
7 | * Author: Nicolas Pitre | |
8 | * Created: Nov 05, 2002 | |
9 | * Copyright: MontaVista Software Inc. | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License version 2 as | |
13 | * published by the Free Software Foundation. | |
14 | */ | |
2f8163ba | 15 | #include <linux/gpio.h> |
1da177e4 | 16 | #include <linux/init.h> |
d052d1be | 17 | #include <linux/platform_device.h> |
2eaa03b5 | 18 | #include <linux/syscore_ops.h> |
1da177e4 LT |
19 | #include <linux/interrupt.h> |
20 | #include <linux/sched.h> | |
21 | #include <linux/bitops.h> | |
22 | #include <linux/fb.h> | |
74ec71e1 TP |
23 | #include <linux/ioport.h> |
24 | #include <linux/mtd/mtd.h> | |
25 | #include <linux/mtd/partitions.h> | |
450d2874 | 26 | #include <linux/input.h> |
27 | #include <linux/gpio_keys.h> | |
402e4909 | 28 | #include <linux/pwm_backlight.h> |
38fd6c38 | 29 | #include <linux/smc91x.h> |
b459396e | 30 | #include <linux/i2c/pxa-i2c.h> |
55f5d8ec BW |
31 | #include <linux/slab.h> |
32 | #include <linux/leds.h> | |
1da177e4 LT |
33 | |
34 | #include <asm/types.h> | |
35 | #include <asm/setup.h> | |
36 | #include <asm/memory.h> | |
37 | #include <asm/mach-types.h> | |
a09e64fb | 38 | #include <mach/hardware.h> |
1da177e4 | 39 | #include <asm/irq.h> |
74ec71e1 | 40 | #include <asm/sizes.h> |
1da177e4 LT |
41 | |
42 | #include <asm/mach/arch.h> | |
43 | #include <asm/mach/map.h> | |
44 | #include <asm/mach/irq.h> | |
74ec71e1 | 45 | #include <asm/mach/flash.h> |
1da177e4 | 46 | |
51c62982 | 47 | #include <mach/pxa27x.h> |
a09e64fb RK |
48 | #include <mach/mainstone.h> |
49 | #include <mach/audio.h> | |
293b2da1 AB |
50 | #include <linux/platform_data/video-pxafb.h> |
51 | #include <linux/platform_data/mmc-pxamci.h> | |
52 | #include <linux/platform_data/irda-pxaficp.h> | |
53 | #include <linux/platform_data/usb-ohci-pxa27x.h> | |
54 | #include <linux/platform_data/keypad-pxa27x.h> | |
ad68bb9f | 55 | #include <mach/smemc.h> |
1da177e4 LT |
56 | |
57 | #include "generic.h" | |
46c41e62 | 58 | #include "devices.h" |
1da177e4 | 59 | |
fef06d27 | 60 | static unsigned long mainstone_pin_config[] = { |
61 | /* Chip Select */ | |
62 | GPIO15_nCS_1, | |
63 | ||
64 | /* LCD - 16bpp Active TFT */ | |
bedbda97 | 65 | GPIOxx_LCD_TFT_16BPP, |
fef06d27 | 66 | GPIO16_PWM0_OUT, /* Backlight */ |
67 | ||
68 | /* MMC */ | |
69 | GPIO32_MMC_CLK, | |
70 | GPIO112_MMC_CMD, | |
71 | GPIO92_MMC_DAT_0, | |
72 | GPIO109_MMC_DAT_1, | |
73 | GPIO110_MMC_DAT_2, | |
74 | GPIO111_MMC_DAT_3, | |
75 | ||
76 | /* USB Host Port 1 */ | |
77 | GPIO88_USBH1_PWR, | |
78 | GPIO89_USBH1_PEN, | |
79 | ||
80 | /* PC Card */ | |
81 | GPIO48_nPOE, | |
82 | GPIO49_nPWE, | |
83 | GPIO50_nPIOR, | |
84 | GPIO51_nPIOW, | |
85 | GPIO85_nPCE_1, | |
86 | GPIO54_nPCE_2, | |
87 | GPIO79_PSKTSEL, | |
88 | GPIO55_nPREG, | |
89 | GPIO56_nPWAIT, | |
90 | GPIO57_nIOIS16, | |
91 | ||
92 | /* AC97 */ | |
c11b6a42 EM |
93 | GPIO28_AC97_BITCLK, |
94 | GPIO29_AC97_SDATA_IN_0, | |
95 | GPIO30_AC97_SDATA_OUT, | |
96 | GPIO31_AC97_SYNC, | |
fef06d27 | 97 | GPIO45_AC97_SYSCLK, |
98 | ||
99 | /* Keypad */ | |
b18773d5 EM |
100 | GPIO93_KP_DKIN_0, |
101 | GPIO94_KP_DKIN_1, | |
102 | GPIO95_KP_DKIN_2, | |
fef06d27 | 103 | GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH, |
104 | GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH, | |
105 | GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH, | |
106 | GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH, | |
107 | GPIO98_KP_MKIN_4 | WAKEUP_ON_LEVEL_HIGH, | |
108 | GPIO99_KP_MKIN_5 | WAKEUP_ON_LEVEL_HIGH, | |
109 | GPIO103_KP_MKOUT_0, | |
110 | GPIO104_KP_MKOUT_1, | |
111 | GPIO105_KP_MKOUT_2, | |
112 | GPIO106_KP_MKOUT_3, | |
113 | GPIO107_KP_MKOUT_4, | |
114 | GPIO108_KP_MKOUT_5, | |
115 | GPIO96_KP_MKOUT_6, | |
116 | ||
6f584cfa EM |
117 | /* I2C */ |
118 | GPIO117_I2C_SCL, | |
119 | GPIO118_I2C_SDA, | |
120 | ||
fef06d27 | 121 | /* GPIO */ |
122 | GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH, | |
123 | }; | |
1da177e4 LT |
124 | |
125 | static unsigned long mainstone_irq_enabled; | |
126 | ||
a3f4c927 | 127 | static void mainstone_mask_irq(struct irq_data *d) |
1da177e4 | 128 | { |
a3f4c927 | 129 | int mainstone_irq = (d->irq - MAINSTONE_IRQ(0)); |
1da177e4 LT |
130 | MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq)); |
131 | } | |
132 | ||
a3f4c927 | 133 | static void mainstone_unmask_irq(struct irq_data *d) |
1da177e4 | 134 | { |
a3f4c927 | 135 | int mainstone_irq = (d->irq - MAINSTONE_IRQ(0)); |
1da177e4 LT |
136 | /* the irq can be acknowledged only if deasserted, so it's done here */ |
137 | MST_INTSETCLR &= ~(1 << mainstone_irq); | |
138 | MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq)); | |
139 | } | |
140 | ||
38c677cb DB |
141 | static struct irq_chip mainstone_irq_chip = { |
142 | .name = "FPGA", | |
a3f4c927 LB |
143 | .irq_ack = mainstone_mask_irq, |
144 | .irq_mask = mainstone_mask_irq, | |
145 | .irq_unmask = mainstone_unmask_irq, | |
1da177e4 LT |
146 | }; |
147 | ||
10dd5ce2 | 148 | static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc) |
1da177e4 LT |
149 | { |
150 | unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled; | |
151 | do { | |
a3f4c927 LB |
152 | /* clear useless edge notification */ |
153 | desc->irq_data.chip->irq_ack(&desc->irq_data); | |
1da177e4 LT |
154 | if (likely(pending)) { |
155 | irq = MAINSTONE_IRQ(0) + __ffs(pending); | |
d8aa0251 | 156 | generic_handle_irq(irq); |
1da177e4 LT |
157 | } |
158 | pending = MST_INTSETCLR & mainstone_irq_enabled; | |
159 | } while (pending); | |
160 | } | |
161 | ||
162 | static void __init mainstone_init_irq(void) | |
163 | { | |
164 | int irq; | |
165 | ||
cd49104d | 166 | pxa27x_init_irq(); |
1da177e4 LT |
167 | |
168 | /* setup extra Mainstone irqs */ | |
169 | for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) { | |
f38c02f3 TG |
170 | irq_set_chip_and_handler(irq, &mainstone_irq_chip, |
171 | handle_level_irq); | |
ec64152f TG |
172 | if (irq == MAINSTONE_IRQ(10) || irq == MAINSTONE_IRQ(14)) |
173 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN); | |
174 | else | |
175 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | |
1da177e4 LT |
176 | } |
177 | set_irq_flags(MAINSTONE_IRQ(8), 0); | |
178 | set_irq_flags(MAINSTONE_IRQ(12), 0); | |
179 | ||
180 | MST_INTMSKENA = 0; | |
181 | MST_INTSETCLR = 0; | |
182 | ||
6384fdad HZ |
183 | irq_set_chained_handler(PXA_GPIO_TO_IRQ(0), mainstone_irq_handler); |
184 | irq_set_irq_type(PXA_GPIO_TO_IRQ(0), IRQ_TYPE_EDGE_FALLING); | |
1da177e4 LT |
185 | } |
186 | ||
22f11c4e NP |
187 | #ifdef CONFIG_PM |
188 | ||
2eaa03b5 | 189 | static void mainstone_irq_resume(void) |
22f11c4e NP |
190 | { |
191 | MST_INTMSKENA = mainstone_irq_enabled; | |
22f11c4e NP |
192 | } |
193 | ||
2eaa03b5 | 194 | static struct syscore_ops mainstone_irq_syscore_ops = { |
22f11c4e NP |
195 | .resume = mainstone_irq_resume, |
196 | }; | |
197 | ||
22f11c4e NP |
198 | static int __init mainstone_irq_device_init(void) |
199 | { | |
2eaa03b5 RW |
200 | if (machine_is_mainstone()) |
201 | register_syscore_ops(&mainstone_irq_syscore_ops); | |
16f159b1 | 202 | |
2eaa03b5 | 203 | return 0; |
22f11c4e NP |
204 | } |
205 | ||
206 | device_initcall(mainstone_irq_device_init); | |
207 | ||
208 | #endif | |
209 | ||
1da177e4 LT |
210 | |
211 | static struct resource smc91x_resources[] = { | |
212 | [0] = { | |
213 | .start = (MST_ETH_PHYS + 0x300), | |
214 | .end = (MST_ETH_PHYS + 0xfffff), | |
215 | .flags = IORESOURCE_MEM, | |
216 | }, | |
217 | [1] = { | |
218 | .start = MAINSTONE_IRQ(3), | |
219 | .end = MAINSTONE_IRQ(3), | |
e7b3dc7e | 220 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
1da177e4 LT |
221 | } |
222 | }; | |
223 | ||
38fd6c38 EM |
224 | static struct smc91x_platdata mainstone_smc91x_info = { |
225 | .flags = SMC91X_USE_8BIT | SMC91X_USE_16BIT | SMC91X_USE_32BIT | | |
226 | SMC91X_NOWAIT | SMC91X_USE_DMA, | |
227 | }; | |
228 | ||
1da177e4 LT |
229 | static struct platform_device smc91x_device = { |
230 | .name = "smc91x", | |
231 | .id = 0, | |
232 | .num_resources = ARRAY_SIZE(smc91x_resources), | |
233 | .resource = smc91x_resources, | |
38fd6c38 EM |
234 | .dev = { |
235 | .platform_data = &mainstone_smc91x_info, | |
236 | }, | |
1da177e4 LT |
237 | }; |
238 | ||
f7cbb7fc | 239 | static int mst_audio_startup(struct snd_pcm_substream *substream, void *priv) |
1da177e4 LT |
240 | { |
241 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | |
242 | MST_MSCWR2 &= ~MST_MSCWR2_AC97_SPKROFF; | |
243 | return 0; | |
244 | } | |
245 | ||
f7cbb7fc | 246 | static void mst_audio_shutdown(struct snd_pcm_substream *substream, void *priv) |
1da177e4 LT |
247 | { |
248 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | |
249 | MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF; | |
250 | } | |
251 | ||
252 | static long mst_audio_suspend_mask; | |
253 | ||
254 | static void mst_audio_suspend(void *priv) | |
255 | { | |
256 | mst_audio_suspend_mask = MST_MSCWR2; | |
257 | MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF; | |
258 | } | |
259 | ||
260 | static void mst_audio_resume(void *priv) | |
261 | { | |
262 | MST_MSCWR2 &= mst_audio_suspend_mask | ~MST_MSCWR2_AC97_SPKROFF; | |
263 | } | |
264 | ||
265 | static pxa2xx_audio_ops_t mst_audio_ops = { | |
266 | .startup = mst_audio_startup, | |
267 | .shutdown = mst_audio_shutdown, | |
268 | .suspend = mst_audio_suspend, | |
269 | .resume = mst_audio_resume, | |
270 | }; | |
271 | ||
74ec71e1 TP |
272 | static struct resource flash_resources[] = { |
273 | [0] = { | |
274 | .start = PXA_CS0_PHYS, | |
275 | .end = PXA_CS0_PHYS + SZ_64M - 1, | |
276 | .flags = IORESOURCE_MEM, | |
277 | }, | |
278 | [1] = { | |
279 | .start = PXA_CS1_PHYS, | |
280 | .end = PXA_CS1_PHYS + SZ_64M - 1, | |
281 | .flags = IORESOURCE_MEM, | |
282 | }, | |
283 | }; | |
284 | ||
285 | static struct mtd_partition mainstoneflash0_partitions[] = { | |
286 | { | |
287 | .name = "Bootloader", | |
288 | .size = 0x00040000, | |
289 | .offset = 0, | |
290 | .mask_flags = MTD_WRITEABLE /* force read-only */ | |
291 | },{ | |
292 | .name = "Kernel", | |
293 | .size = 0x00400000, | |
294 | .offset = 0x00040000, | |
295 | },{ | |
296 | .name = "Filesystem", | |
297 | .size = MTDPART_SIZ_FULL, | |
298 | .offset = 0x00440000 | |
299 | } | |
300 | }; | |
301 | ||
302 | static struct flash_platform_data mst_flash_data[2] = { | |
303 | { | |
304 | .map_name = "cfi_probe", | |
305 | .parts = mainstoneflash0_partitions, | |
306 | .nr_parts = ARRAY_SIZE(mainstoneflash0_partitions), | |
307 | }, { | |
308 | .map_name = "cfi_probe", | |
309 | .parts = NULL, | |
310 | .nr_parts = 0, | |
311 | } | |
312 | }; | |
313 | ||
314 | static struct platform_device mst_flash_device[2] = { | |
315 | { | |
316 | .name = "pxa2xx-flash", | |
317 | .id = 0, | |
318 | .dev = { | |
319 | .platform_data = &mst_flash_data[0], | |
320 | }, | |
321 | .resource = &flash_resources[0], | |
322 | .num_resources = 1, | |
323 | }, | |
324 | { | |
325 | .name = "pxa2xx-flash", | |
326 | .id = 1, | |
327 | .dev = { | |
328 | .platform_data = &mst_flash_data[1], | |
329 | }, | |
330 | .resource = &flash_resources[1], | |
331 | .num_resources = 1, | |
332 | }, | |
333 | }; | |
334 | ||
402e4909 RK |
335 | #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) |
336 | static struct platform_pwm_backlight_data mainstone_backlight_data = { | |
337 | .pwm_id = 0, | |
338 | .max_brightness = 1023, | |
339 | .dft_brightness = 1023, | |
340 | .pwm_period_ns = 78770, | |
db01120c | 341 | .enable_gpio = -1, |
402e4909 | 342 | }; |
3777f774 | 343 | |
402e4909 RK |
344 | static struct platform_device mainstone_backlight_device = { |
345 | .name = "pwm-backlight", | |
346 | .dev = { | |
347 | .parent = &pxa27x_device_pwm0.dev, | |
348 | .platform_data = &mainstone_backlight_data, | |
349 | }, | |
3777f774 RK |
350 | }; |
351 | ||
352 | static void __init mainstone_backlight_register(void) | |
353 | { | |
402e4909 RK |
354 | int ret = platform_device_register(&mainstone_backlight_device); |
355 | if (ret) | |
356 | printk(KERN_ERR "mainstone: failed to register backlight device: %d\n", ret); | |
1da177e4 | 357 | } |
3777f774 RK |
358 | #else |
359 | #define mainstone_backlight_register() do { } while (0) | |
360 | #endif | |
1da177e4 | 361 | |
d14b272b | 362 | static struct pxafb_mode_info toshiba_ltm04c380k_mode = { |
1da177e4 LT |
363 | .pixclock = 50000, |
364 | .xres = 640, | |
365 | .yres = 480, | |
366 | .bpp = 16, | |
367 | .hsync_len = 1, | |
368 | .left_margin = 0x9f, | |
369 | .right_margin = 1, | |
370 | .vsync_len = 44, | |
371 | .upper_margin = 0, | |
372 | .lower_margin = 0, | |
373 | .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, | |
1da177e4 LT |
374 | }; |
375 | ||
d14b272b | 376 | static struct pxafb_mode_info toshiba_ltm035a776c_mode = { |
1da177e4 LT |
377 | .pixclock = 110000, |
378 | .xres = 240, | |
379 | .yres = 320, | |
380 | .bpp = 16, | |
381 | .hsync_len = 4, | |
382 | .left_margin = 8, | |
383 | .right_margin = 20, | |
384 | .vsync_len = 3, | |
385 | .upper_margin = 1, | |
386 | .lower_margin = 10, | |
387 | .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, | |
d14b272b RP |
388 | }; |
389 | ||
390 | static struct pxafb_mach_info mainstone_pxafb_info = { | |
391 | .num_modes = 1, | |
0454bd09 | 392 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, |
1da177e4 LT |
393 | }; |
394 | ||
40220c1a | 395 | static int mainstone_mci_init(struct device *dev, irq_handler_t mstone_detect_int, void *data) |
1da177e4 LT |
396 | { |
397 | int err; | |
398 | ||
1da177e4 LT |
399 | /* make sure SD/Memory Stick multiplexer's signals |
400 | * are routed to MMC controller | |
401 | */ | |
402 | MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL; | |
403 | ||
ed7936f9 | 404 | err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, 0, |
1da177e4 | 405 | "MMC card detect", data); |
2687bd38 | 406 | if (err) |
1da177e4 | 407 | printk(KERN_ERR "mainstone_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); |
1da177e4 | 408 | |
2687bd38 | 409 | return err; |
1da177e4 LT |
410 | } |
411 | ||
a829abf8 | 412 | static int mainstone_mci_setpower(struct device *dev, unsigned int vdd) |
1da177e4 LT |
413 | { |
414 | struct pxamci_platform_data* p_d = dev->platform_data; | |
415 | ||
416 | if (( 1 << vdd) & p_d->ocr_mask) { | |
8e86f427 | 417 | printk(KERN_DEBUG "%s: on\n", __func__); |
1da177e4 LT |
418 | MST_MSCWR1 |= MST_MSCWR1_MMC_ON; |
419 | MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL; | |
420 | } else { | |
8e86f427 | 421 | printk(KERN_DEBUG "%s: off\n", __func__); |
1da177e4 LT |
422 | MST_MSCWR1 &= ~MST_MSCWR1_MMC_ON; |
423 | } | |
a829abf8 | 424 | return 0; |
1da177e4 LT |
425 | } |
426 | ||
427 | static void mainstone_mci_exit(struct device *dev, void *data) | |
428 | { | |
429 | free_irq(MAINSTONE_MMC_IRQ, data); | |
430 | } | |
431 | ||
432 | static struct pxamci_platform_data mainstone_mci_platform_data = { | |
7a648256 RJ |
433 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, |
434 | .init = mainstone_mci_init, | |
435 | .setpower = mainstone_mci_setpower, | |
436 | .exit = mainstone_mci_exit, | |
437 | .gpio_card_detect = -1, | |
438 | .gpio_card_ro = -1, | |
439 | .gpio_power = -1, | |
1da177e4 LT |
440 | }; |
441 | ||
6f475c01 NP |
442 | static void mainstone_irda_transceiver_mode(struct device *dev, int mode) |
443 | { | |
444 | unsigned long flags; | |
445 | ||
446 | local_irq_save(flags); | |
447 | if (mode & IR_SIRMODE) { | |
448 | MST_MSCWR1 &= ~MST_MSCWR1_IRDA_FIR; | |
449 | } else if (mode & IR_FIRMODE) { | |
450 | MST_MSCWR1 |= MST_MSCWR1_IRDA_FIR; | |
451 | } | |
0fc3ff31 | 452 | pxa2xx_transceiver_mode(dev, mode); |
6f475c01 NP |
453 | if (mode & IR_OFF) { |
454 | MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_OFF; | |
455 | } else { | |
456 | MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_FULL; | |
457 | } | |
458 | local_irq_restore(flags); | |
459 | } | |
460 | ||
461 | static struct pxaficp_platform_data mainstone_ficp_platform_data = { | |
c4bd0172 MV |
462 | .gpio_pwdown = -1, |
463 | .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF, | |
464 | .transceiver_mode = mainstone_irda_transceiver_mode, | |
6f475c01 NP |
465 | }; |
466 | ||
450d2874 | 467 | static struct gpio_keys_button gpio_keys_button[] = { |
468 | [0] = { | |
469 | .desc = "wakeup", | |
470 | .code = KEY_SUSPEND, | |
471 | .type = EV_KEY, | |
472 | .gpio = 1, | |
473 | .wakeup = 1, | |
474 | }, | |
475 | }; | |
476 | ||
477 | static struct gpio_keys_platform_data mainstone_gpio_keys = { | |
478 | .buttons = gpio_keys_button, | |
479 | .nbuttons = 1, | |
480 | }; | |
481 | ||
482 | static struct platform_device mst_gpio_keys_device = { | |
483 | .name = "gpio-keys", | |
484 | .id = -1, | |
485 | .dev = { | |
486 | .platform_data = &mainstone_gpio_keys, | |
487 | }, | |
488 | }; | |
489 | ||
74ec71e1 TP |
490 | static struct platform_device *platform_devices[] __initdata = { |
491 | &smc91x_device, | |
74ec71e1 TP |
492 | &mst_flash_device[0], |
493 | &mst_flash_device[1], | |
450d2874 | 494 | &mst_gpio_keys_device, |
74ec71e1 TP |
495 | }; |
496 | ||
81f280e2 RP |
497 | static struct pxaohci_platform_data mainstone_ohci_platform_data = { |
498 | .port_mode = PMM_PERPORT_MODE, | |
097b5334 | 499 | .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW, |
81f280e2 RP |
500 | }; |
501 | ||
36caeb4e | 502 | #if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE) |
0a085a94 | 503 | static const unsigned int mainstone_matrix_keys[] = { |
55c26e40 | 504 | KEY(0, 0, KEY_A), KEY(1, 0, KEY_B), KEY(2, 0, KEY_C), |
505 | KEY(3, 0, KEY_D), KEY(4, 0, KEY_E), KEY(5, 0, KEY_F), | |
506 | KEY(0, 1, KEY_G), KEY(1, 1, KEY_H), KEY(2, 1, KEY_I), | |
507 | KEY(3, 1, KEY_J), KEY(4, 1, KEY_K), KEY(5, 1, KEY_L), | |
508 | KEY(0, 2, KEY_M), KEY(1, 2, KEY_N), KEY(2, 2, KEY_O), | |
509 | KEY(3, 2, KEY_P), KEY(4, 2, KEY_Q), KEY(5, 2, KEY_R), | |
510 | KEY(0, 3, KEY_S), KEY(1, 3, KEY_T), KEY(2, 3, KEY_U), | |
511 | KEY(3, 3, KEY_V), KEY(4, 3, KEY_W), KEY(5, 3, KEY_X), | |
512 | KEY(2, 4, KEY_Y), KEY(3, 4, KEY_Z), | |
513 | ||
514 | KEY(0, 4, KEY_DOT), /* . */ | |
515 | KEY(1, 4, KEY_CLOSE), /* @ */ | |
516 | KEY(4, 4, KEY_SLASH), | |
517 | KEY(5, 4, KEY_BACKSLASH), | |
518 | KEY(0, 5, KEY_HOME), | |
519 | KEY(1, 5, KEY_LEFTSHIFT), | |
520 | KEY(2, 5, KEY_SPACE), | |
521 | KEY(3, 5, KEY_SPACE), | |
522 | KEY(4, 5, KEY_ENTER), | |
523 | KEY(5, 5, KEY_BACKSPACE), | |
524 | ||
525 | KEY(0, 6, KEY_UP), | |
526 | KEY(1, 6, KEY_DOWN), | |
527 | KEY(2, 6, KEY_LEFT), | |
528 | KEY(3, 6, KEY_RIGHT), | |
529 | KEY(4, 6, KEY_SELECT), | |
530 | }; | |
531 | ||
0a085a94 CX |
532 | static struct matrix_keymap_data mainstone_matrix_keymap_data = { |
533 | .keymap = mainstone_matrix_keys, | |
534 | .keymap_size = ARRAY_SIZE(mainstone_matrix_keys), | |
535 | }; | |
536 | ||
55c26e40 | 537 | struct pxa27x_keypad_platform_data mainstone_keypad_info = { |
538 | .matrix_key_rows = 6, | |
539 | .matrix_key_cols = 7, | |
0a085a94 | 540 | .matrix_keymap_data = &mainstone_matrix_keymap_data, |
55c26e40 | 541 | |
542 | .enable_rotary0 = 1, | |
543 | .rotary0_up_key = KEY_UP, | |
544 | .rotary0_down_key = KEY_DOWN, | |
545 | ||
546 | .debounce_interval = 30, | |
547 | }; | |
548 | ||
549 | static void __init mainstone_init_keypad(void) | |
550 | { | |
551 | pxa_set_keypad_info(&mainstone_keypad_info); | |
552 | } | |
553 | #else | |
554 | static inline void mainstone_init_keypad(void) {} | |
555 | #endif | |
556 | ||
1da177e4 LT |
557 | static void __init mainstone_init(void) |
558 | { | |
74ec71e1 TP |
559 | int SW7 = 0; /* FIXME: get from SCR (Mst doc section 3.2.1.1) */ |
560 | ||
fef06d27 | 561 | pxa2xx_mfp_config(ARRAY_AND_SIZE(mainstone_pin_config)); |
562 | ||
cc155c6f RK |
563 | pxa_set_ffuart_info(NULL); |
564 | pxa_set_btuart_info(NULL); | |
565 | pxa_set_stuart_info(NULL); | |
566 | ||
ad68bb9f | 567 | mst_flash_data[0].width = (__raw_readl(BOOT_DEF) & 1) ? 2 : 4; |
74ec71e1 TP |
568 | mst_flash_data[1].width = 4; |
569 | ||
570 | /* Compensate for SW7 which swaps the flash banks */ | |
571 | mst_flash_data[SW7].name = "processor-flash"; | |
572 | mst_flash_data[SW7 ^ 1].name = "mainboard-flash"; | |
573 | ||
574 | printk(KERN_NOTICE "Mainstone configured to boot from %s\n", | |
575 | mst_flash_data[0].name); | |
576 | ||
5b2e98cd JH |
577 | /* system bus arbiter setting |
578 | * - Core_Park | |
579 | * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4 | |
580 | */ | |
581 | ARB_CNTRL = ARB_CORE_PARK | 0x234; | |
582 | ||
74ec71e1 | 583 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); |
1da177e4 LT |
584 | |
585 | /* reading Mainstone's "Virtual Configuration Register" | |
586 | might be handy to select LCD type here */ | |
587 | if (0) | |
d14b272b | 588 | mainstone_pxafb_info.modes = &toshiba_ltm04c380k_mode; |
1da177e4 | 589 | else |
d14b272b RP |
590 | mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode; |
591 | ||
4321e1a1 | 592 | pxa_set_fb_info(NULL, &mainstone_pxafb_info); |
3777f774 | 593 | mainstone_backlight_register(); |
1da177e4 LT |
594 | |
595 | pxa_set_mci_info(&mainstone_mci_platform_data); | |
6f475c01 | 596 | pxa_set_ficp_info(&mainstone_ficp_platform_data); |
81f280e2 | 597 | pxa_set_ohci_info(&mainstone_ohci_platform_data); |
835e7f1c | 598 | pxa_set_i2c_info(NULL); |
9f19d638 | 599 | pxa_set_ac97_info(&mst_audio_ops); |
55c26e40 | 600 | |
601 | mainstone_init_keypad(); | |
1da177e4 LT |
602 | } |
603 | ||
604 | ||
605 | static struct map_desc mainstone_io_desc[] __initdata = { | |
6f9182eb DS |
606 | { /* CPLD */ |
607 | .virtual = MST_FPGA_VIRT, | |
608 | .pfn = __phys_to_pfn(MST_FPGA_PHYS), | |
609 | .length = 0x00100000, | |
610 | .type = MT_DEVICE | |
611 | } | |
1da177e4 LT |
612 | }; |
613 | ||
614 | static void __init mainstone_map_io(void) | |
615 | { | |
851982c1 | 616 | pxa27x_map_io(); |
1da177e4 LT |
617 | iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc)); |
618 | ||
8775420d TP |
619 | /* for use I SRAM as framebuffer. */ |
620 | PSLR |= 0xF04; | |
621 | PCFR = 0x66; | |
1da177e4 LT |
622 | } |
623 | ||
55f5d8ec BW |
624 | /* |
625 | * Driver for the 8 discrete LEDs available for general use: | |
626 | * Note: bits [15-8] are used to enable/blank the 8 7 segment hex displays | |
627 | * so be sure to not monkey with them here. | |
628 | */ | |
629 | ||
630 | #if defined(CONFIG_NEW_LEDS) && defined(CONFIG_LEDS_CLASS) | |
631 | struct mainstone_led { | |
632 | struct led_classdev cdev; | |
633 | u8 mask; | |
634 | }; | |
635 | ||
636 | /* | |
637 | * The triggers lines up below will only be used if the | |
638 | * LED triggers are compiled in. | |
639 | */ | |
640 | static const struct { | |
641 | const char *name; | |
642 | const char *trigger; | |
643 | } mainstone_leds[] = { | |
644 | { "mainstone:D28", "default-on", }, | |
645 | { "mainstone:D27", "cpu0", }, | |
646 | { "mainstone:D26", "heartbeat" }, | |
647 | { "mainstone:D25", }, | |
648 | { "mainstone:D24", }, | |
649 | { "mainstone:D23", }, | |
650 | { "mainstone:D22", }, | |
651 | { "mainstone:D21", }, | |
652 | }; | |
653 | ||
654 | static void mainstone_led_set(struct led_classdev *cdev, | |
655 | enum led_brightness b) | |
656 | { | |
657 | struct mainstone_led *led = container_of(cdev, | |
658 | struct mainstone_led, cdev); | |
659 | u32 reg = MST_LEDCTRL; | |
660 | ||
661 | if (b != LED_OFF) | |
662 | reg |= led->mask; | |
663 | else | |
664 | reg &= ~led->mask; | |
665 | ||
666 | MST_LEDCTRL = reg; | |
667 | } | |
668 | ||
669 | static enum led_brightness mainstone_led_get(struct led_classdev *cdev) | |
670 | { | |
671 | struct mainstone_led *led = container_of(cdev, | |
672 | struct mainstone_led, cdev); | |
673 | u32 reg = MST_LEDCTRL; | |
674 | ||
675 | return (reg & led->mask) ? LED_FULL : LED_OFF; | |
676 | } | |
677 | ||
678 | static int __init mainstone_leds_init(void) | |
679 | { | |
680 | int i; | |
681 | ||
682 | if (!machine_is_mainstone()) | |
683 | return -ENODEV; | |
684 | ||
685 | /* All ON */ | |
686 | MST_LEDCTRL |= 0xff; | |
687 | for (i = 0; i < ARRAY_SIZE(mainstone_leds); i++) { | |
688 | struct mainstone_led *led; | |
689 | ||
690 | led = kzalloc(sizeof(*led), GFP_KERNEL); | |
691 | if (!led) | |
692 | break; | |
693 | ||
694 | led->cdev.name = mainstone_leds[i].name; | |
695 | led->cdev.brightness_set = mainstone_led_set; | |
696 | led->cdev.brightness_get = mainstone_led_get; | |
697 | led->cdev.default_trigger = mainstone_leds[i].trigger; | |
698 | led->mask = BIT(i); | |
699 | ||
700 | if (led_classdev_register(NULL, &led->cdev) < 0) { | |
701 | kfree(led); | |
702 | break; | |
703 | } | |
704 | } | |
705 | ||
706 | return 0; | |
707 | } | |
708 | ||
709 | /* | |
710 | * Since we may have triggers on any subsystem, defer registration | |
711 | * until after subsystem_init. | |
712 | */ | |
713 | fs_initcall(mainstone_leds_init); | |
714 | #endif | |
715 | ||
1da177e4 | 716 | MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)") |
e9dea0c6 | 717 | /* Maintainer: MontaVista Software Inc. */ |
7375aba6 | 718 | .atag_offset = 0x100, /* BLOB boot parameter setting */ |
e9dea0c6 | 719 | .map_io = mainstone_map_io, |
6ac6b817 | 720 | .nr_irqs = MAINSTONE_NR_IRQS, |
e9dea0c6 | 721 | .init_irq = mainstone_init_irq, |
8a97ae2f | 722 | .handle_irq = pxa27x_handle_irq, |
6bb27d73 | 723 | .init_time = pxa_timer_init, |
e9dea0c6 | 724 | .init_machine = mainstone_init, |
271a74fc | 725 | .restart = pxa_restart, |
1da177e4 | 726 | MACHINE_END |