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Merge tag 'ext4_for_linue' of git://git.kernel.org/pub/scm/linux/kernel/git/tytso...
[deliverable/linux.git] / arch / arm / mach-pxa / mainstone.c
CommitLineData
1da177e4
LT		 1/*
2 * linux/arch/arm/mach-pxa/mainstone.c
3 *
4 * Support for the Intel HCDDBBVA0 Development Platform.
5 * (go figure how they came up with such name...)
6 *
7 * Author: Nicolas Pitre
8 * Created: Nov 05, 2002
9 * Copyright: MontaVista Software Inc.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
2f8163ba 15#include <linux/gpio.h>
1da177e4 16#include <linux/init.h>
d052d1be 17#include <linux/platform_device.h>
2eaa03b5 18#include <linux/syscore_ops.h>
1da177e4
LT		 19#include <linux/interrupt.h>
20#include <linux/sched.h>
21#include <linux/bitops.h>
22#include <linux/fb.h>
74ec71e1
TP		 23#include <linux/ioport.h>
24#include <linux/mtd/mtd.h>
25#include <linux/mtd/partitions.h>
450d2874 26#include <linux/input.h>
27#include <linux/gpio_keys.h>
402e4909 28#include <linux/pwm_backlight.h>
38fd6c38 29#include <linux/smc91x.h>
b459396e 30#include <linux/i2c/pxa-i2c.h>
55f5d8ec
BW		 31#include <linux/slab.h>
32#include <linux/leds.h>
1da177e4
LT		 33
34#include <asm/types.h>
35#include <asm/setup.h>
36#include <asm/memory.h>
37#include <asm/mach-types.h>
a09e64fb 38#include <mach/hardware.h>
1da177e4 39#include <asm/irq.h>
74ec71e1 40#include <asm/sizes.h>
1da177e4
LT		 41
42#include <asm/mach/arch.h>
43#include <asm/mach/map.h>
44#include <asm/mach/irq.h>
74ec71e1 45#include <asm/mach/flash.h>
1da177e4 46
51c62982 47#include <mach/pxa27x.h>
a09e64fb
RK		 48#include <mach/mainstone.h>
49#include <mach/audio.h>
293b2da1
AB		 50#include <linux/platform_data/video-pxafb.h>
51#include <linux/platform_data/mmc-pxamci.h>
52#include <linux/platform_data/irda-pxaficp.h>
53#include <linux/platform_data/usb-ohci-pxa27x.h>
54#include <linux/platform_data/keypad-pxa27x.h>
ad68bb9f 55#include <mach/smemc.h>
1da177e4
LT		 56
57#include "generic.h"
46c41e62 58#include "devices.h"
1da177e4 59
fef06d27 60static unsigned long mainstone_pin_config[] = {
61 /* Chip Select */
62 GPIO15_nCS_1,
63
64 /* LCD - 16bpp Active TFT */
bedbda97 65 GPIOxx_LCD_TFT_16BPP,
fef06d27 66 GPIO16_PWM0_OUT, /* Backlight */
67
68 /* MMC */
69 GPIO32_MMC_CLK,
70 GPIO112_MMC_CMD,
71 GPIO92_MMC_DAT_0,
72 GPIO109_MMC_DAT_1,
73 GPIO110_MMC_DAT_2,
74 GPIO111_MMC_DAT_3,
75
76 /* USB Host Port 1 */
77 GPIO88_USBH1_PWR,
78 GPIO89_USBH1_PEN,
79
80 /* PC Card */
81 GPIO48_nPOE,
82 GPIO49_nPWE,
83 GPIO50_nPIOR,
84 GPIO51_nPIOW,
85 GPIO85_nPCE_1,
86 GPIO54_nPCE_2,
87 GPIO79_PSKTSEL,
88 GPIO55_nPREG,
89 GPIO56_nPWAIT,
90 GPIO57_nIOIS16,
91
92 /* AC97 */
c11b6a42
EM		 93 GPIO28_AC97_BITCLK,
94 GPIO29_AC97_SDATA_IN_0,
95 GPIO30_AC97_SDATA_OUT,
96 GPIO31_AC97_SYNC,
fef06d27 97 GPIO45_AC97_SYSCLK,
98
99 /* Keypad */
b18773d5
EM		 100 GPIO93_KP_DKIN_0,
101 GPIO94_KP_DKIN_1,
102 GPIO95_KP_DKIN_2,
fef06d27 103 GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
104 GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH,
105 GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH,
106 GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH,
107 GPIO98_KP_MKIN_4 | WAKEUP_ON_LEVEL_HIGH,
108 GPIO99_KP_MKIN_5 | WAKEUP_ON_LEVEL_HIGH,
109 GPIO103_KP_MKOUT_0,
110 GPIO104_KP_MKOUT_1,
111 GPIO105_KP_MKOUT_2,
112 GPIO106_KP_MKOUT_3,
113 GPIO107_KP_MKOUT_4,
114 GPIO108_KP_MKOUT_5,
115 GPIO96_KP_MKOUT_6,
116
6f584cfa
EM		 117 /* I2C */
118 GPIO117_I2C_SCL,
119 GPIO118_I2C_SDA,
120
fef06d27 121 /* GPIO */
122 GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
123};
1da177e4
LT		 124
125static unsigned long mainstone_irq_enabled;
126
a3f4c927 127static void mainstone_mask_irq(struct irq_data *d)
1da177e4 128{
a3f4c927 129 int mainstone_irq = (d->irq - MAINSTONE_IRQ(0));
1da177e4
LT		 130 MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq));
131}
132
a3f4c927 133static void mainstone_unmask_irq(struct irq_data *d)
1da177e4 134{
a3f4c927 135 int mainstone_irq = (d->irq - MAINSTONE_IRQ(0));
1da177e4
LT		 136 /* the irq can be acknowledged only if deasserted, so it's done here */
137 MST_INTSETCLR &= ~(1 << mainstone_irq);
138 MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq));
139}
140
38c677cb
DB		 141static struct irq_chip mainstone_irq_chip = {
142 .name = "FPGA",
a3f4c927
LB		 143 .irq_ack = mainstone_mask_irq,
144 .irq_mask = mainstone_mask_irq,
145 .irq_unmask = mainstone_unmask_irq,
1da177e4
LT		 146};
147
10dd5ce2 148static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc)
1da177e4
LT		 149{
150 unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled;
151 do {
a3f4c927
LB		 152 /* clear useless edge notification */
153 desc->irq_data.chip->irq_ack(&desc->irq_data);
1da177e4
LT		 154 if (likely(pending)) {
155 irq = MAINSTONE_IRQ(0) + __ffs(pending);
d8aa0251 156 generic_handle_irq(irq);
1da177e4
LT		 157 }
158 pending = MST_INTSETCLR & mainstone_irq_enabled;
159 } while (pending);
160}
161
162static void __init mainstone_init_irq(void)
163{
164 int irq;
165
cd49104d 166 pxa27x_init_irq();
1da177e4
LT		 167
168 /* setup extra Mainstone irqs */
169 for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) {
f38c02f3
TG		 170 irq_set_chip_and_handler(irq, &mainstone_irq_chip,
171 handle_level_irq);
ec64152f
TG		 172 if (irq == MAINSTONE_IRQ(10) || irq == MAINSTONE_IRQ(14))
173 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN);
174 else
175 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
1da177e4
LT		 176 }
177 set_irq_flags(MAINSTONE_IRQ(8), 0);
178 set_irq_flags(MAINSTONE_IRQ(12), 0);
179
180 MST_INTMSKENA = 0;
181 MST_INTSETCLR = 0;
182
6384fdad
HZ		 183 irq_set_chained_handler(PXA_GPIO_TO_IRQ(0), mainstone_irq_handler);
184 irq_set_irq_type(PXA_GPIO_TO_IRQ(0), IRQ_TYPE_EDGE_FALLING);
1da177e4
LT		 185}
186
22f11c4e
NP		 187#ifdef CONFIG_PM
188
2eaa03b5 189static void mainstone_irq_resume(void)
22f11c4e
NP		 190{
191 MST_INTMSKENA = mainstone_irq_enabled;
22f11c4e
NP		 192}
193
2eaa03b5 194static struct syscore_ops mainstone_irq_syscore_ops = {
22f11c4e
NP		 195 .resume = mainstone_irq_resume,
196};
197
22f11c4e
NP		 198static int __init mainstone_irq_device_init(void)
199{
2eaa03b5
RW		 200 if (machine_is_mainstone())
201 register_syscore_ops(&mainstone_irq_syscore_ops);
16f159b1 202
2eaa03b5 203 return 0;
22f11c4e
NP		 204}
205
206device_initcall(mainstone_irq_device_init);
207
208#endif
209
1da177e4
LT		 210
211static struct resource smc91x_resources[] = {
212 [0] = {
213 .start = (MST_ETH_PHYS + 0x300),
214 .end = (MST_ETH_PHYS + 0xfffff),
215 .flags = IORESOURCE_MEM,
216 },
217 [1] = {
218 .start = MAINSTONE_IRQ(3),
219 .end = MAINSTONE_IRQ(3),
e7b3dc7e 220 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
1da177e4
LT		 221 }
222};
223
38fd6c38
EM		 224static struct smc91x_platdata mainstone_smc91x_info = {
225 .flags = SMC91X_USE_8BIT | SMC91X_USE_16BIT | SMC91X_USE_32BIT |
226 SMC91X_NOWAIT | SMC91X_USE_DMA,
227};
228
1da177e4
LT		 229static struct platform_device smc91x_device = {
230 .name = "smc91x",
231 .id = 0,
232 .num_resources = ARRAY_SIZE(smc91x_resources),
233 .resource = smc91x_resources,
38fd6c38
EM		 234 .dev = {
235 .platform_data = &mainstone_smc91x_info,
236 },
1da177e4
LT		 237};
238
f7cbb7fc 239static int mst_audio_startup(struct snd_pcm_substream *substream, void *priv)
1da177e4
LT		 240{
241 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
242 MST_MSCWR2 &= ~MST_MSCWR2_AC97_SPKROFF;
243 return 0;
244}
245
f7cbb7fc 246static void mst_audio_shutdown(struct snd_pcm_substream *substream, void *priv)
1da177e4
LT		 247{
248 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
249 MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
250}
251
252static long mst_audio_suspend_mask;
253
254static void mst_audio_suspend(void *priv)
255{
256 mst_audio_suspend_mask = MST_MSCWR2;
257 MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
258}
259
260static void mst_audio_resume(void *priv)
261{
262 MST_MSCWR2 &= mst_audio_suspend_mask | ~MST_MSCWR2_AC97_SPKROFF;
263}
264
265static pxa2xx_audio_ops_t mst_audio_ops = {
266 .startup = mst_audio_startup,
267 .shutdown = mst_audio_shutdown,
268 .suspend = mst_audio_suspend,
269 .resume = mst_audio_resume,
270};
271
74ec71e1
TP		 272static struct resource flash_resources[] = {
273 [0] = {
274 .start = PXA_CS0_PHYS,
275 .end = PXA_CS0_PHYS + SZ_64M - 1,
276 .flags = IORESOURCE_MEM,
277 },
278 [1] = {
279 .start = PXA_CS1_PHYS,
280 .end = PXA_CS1_PHYS + SZ_64M - 1,
281 .flags = IORESOURCE_MEM,
282 },
283};
284
285static struct mtd_partition mainstoneflash0_partitions[] = {
286 {
287 .name = "Bootloader",
288 .size = 0x00040000,
289 .offset = 0,
290 .mask_flags = MTD_WRITEABLE /* force read-only */
291 },{
292 .name = "Kernel",
293 .size = 0x00400000,
294 .offset = 0x00040000,
295 },{
296 .name = "Filesystem",
297 .size = MTDPART_SIZ_FULL,
298 .offset = 0x00440000
299 }
300};
301
302static struct flash_platform_data mst_flash_data[2] = {
303 {
304 .map_name = "cfi_probe",
305 .parts = mainstoneflash0_partitions,
306 .nr_parts = ARRAY_SIZE(mainstoneflash0_partitions),
307 }, {
308 .map_name = "cfi_probe",
309 .parts = NULL,
310 .nr_parts = 0,
311 }
312};
313
314static struct platform_device mst_flash_device[2] = {
315 {
316 .name = "pxa2xx-flash",
317 .id = 0,
318 .dev = {
319 .platform_data = &mst_flash_data[0],
320 },
321 .resource = &flash_resources[0],
322 .num_resources = 1,
323 },
324 {
325 .name = "pxa2xx-flash",
326 .id = 1,
327 .dev = {
328 .platform_data = &mst_flash_data[1],
329 },
330 .resource = &flash_resources[1],
331 .num_resources = 1,
332 },
333};
334
402e4909
RK		 335#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
336static struct platform_pwm_backlight_data mainstone_backlight_data = {
337 .pwm_id = 0,
338 .max_brightness = 1023,
339 .dft_brightness = 1023,
340 .pwm_period_ns = 78770,
341};
3777f774 342
402e4909
RK		 343static struct platform_device mainstone_backlight_device = {
344 .name = "pwm-backlight",
345 .dev = {
346 .parent = &pxa27x_device_pwm0.dev,
347 .platform_data = &mainstone_backlight_data,
348 },
3777f774
RK		 349};
350
351static void __init mainstone_backlight_register(void)
352{
402e4909
RK		 353 int ret = platform_device_register(&mainstone_backlight_device);
354 if (ret)
355 printk(KERN_ERR "mainstone: failed to register backlight device: %d\n", ret);
1da177e4 356}
3777f774
RK		 357#else
358#define mainstone_backlight_register() do { } while (0)
359#endif
1da177e4 360
d14b272b 361static struct pxafb_mode_info toshiba_ltm04c380k_mode = {
1da177e4
LT		 362 .pixclock = 50000,
363 .xres = 640,
364 .yres = 480,
365 .bpp = 16,
366 .hsync_len = 1,
367 .left_margin = 0x9f,
368 .right_margin = 1,
369 .vsync_len = 44,
370 .upper_margin = 0,
371 .lower_margin = 0,
372 .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
1da177e4
LT		 373};
374
d14b272b 375static struct pxafb_mode_info toshiba_ltm035a776c_mode = {
1da177e4
LT		 376 .pixclock = 110000,
377 .xres = 240,
378 .yres = 320,
379 .bpp = 16,
380 .hsync_len = 4,
381 .left_margin = 8,
382 .right_margin = 20,
383 .vsync_len = 3,
384 .upper_margin = 1,
385 .lower_margin = 10,
386 .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
d14b272b
RP		 387};
388
389static struct pxafb_mach_info mainstone_pxafb_info = {
390 .num_modes = 1,
0454bd09 391 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
1da177e4
LT		 392};
393
40220c1a 394static int mainstone_mci_init(struct device *dev, irq_handler_t mstone_detect_int, void *data)
1da177e4
LT		 395{
396 int err;
397
1da177e4
LT		 398 /* make sure SD/Memory Stick multiplexer's signals
399 * are routed to MMC controller
400 */
401 MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
402
52e405ea 403 err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, IRQF_DISABLED,
1da177e4 404 "MMC card detect", data);
2687bd38 405 if (err)
1da177e4 406 printk(KERN_ERR "mainstone_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
1da177e4 407
2687bd38 408 return err;
1da177e4
LT		 409}
410
411static void mainstone_mci_setpower(struct device *dev, unsigned int vdd)
412{
413 struct pxamci_platform_data* p_d = dev->platform_data;
414
415 if (( 1 << vdd) & p_d->ocr_mask) {
8e86f427 416 printk(KERN_DEBUG "%s: on\n", __func__);
1da177e4
LT		 417 MST_MSCWR1 |= MST_MSCWR1_MMC_ON;
418 MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
419 } else {
8e86f427 420 printk(KERN_DEBUG "%s: off\n", __func__);
1da177e4
LT		 421 MST_MSCWR1 &= ~MST_MSCWR1_MMC_ON;
422 }
423}
424
425static void mainstone_mci_exit(struct device *dev, void *data)
426{
427 free_irq(MAINSTONE_MMC_IRQ, data);
428}
429
430static struct pxamci_platform_data mainstone_mci_platform_data = {
7a648256
RJ		 431 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
432 .init = mainstone_mci_init,
433 .setpower = mainstone_mci_setpower,
434 .exit = mainstone_mci_exit,
435 .gpio_card_detect = -1,
436 .gpio_card_ro = -1,
437 .gpio_power = -1,
1da177e4
LT		 438};
439
6f475c01
NP		 440static void mainstone_irda_transceiver_mode(struct device *dev, int mode)
441{
442 unsigned long flags;
443
444 local_irq_save(flags);
445 if (mode & IR_SIRMODE) {
446 MST_MSCWR1 &= ~MST_MSCWR1_IRDA_FIR;
447 } else if (mode & IR_FIRMODE) {
448 MST_MSCWR1 |= MST_MSCWR1_IRDA_FIR;
449 }
0fc3ff31 450 pxa2xx_transceiver_mode(dev, mode);
6f475c01
NP		 451 if (mode & IR_OFF) {
452 MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_OFF;
453 } else {
454 MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_FULL;
455 }
456 local_irq_restore(flags);
457}
458
459static struct pxaficp_platform_data mainstone_ficp_platform_data = {
c4bd0172
MV		 460 .gpio_pwdown = -1,
461 .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
462 .transceiver_mode = mainstone_irda_transceiver_mode,
6f475c01
NP		 463};
464
450d2874 465static struct gpio_keys_button gpio_keys_button[] = {
466 [0] = {
467 .desc = "wakeup",
468 .code = KEY_SUSPEND,
469 .type = EV_KEY,
470 .gpio = 1,
471 .wakeup = 1,
472 },
473};
474
475static struct gpio_keys_platform_data mainstone_gpio_keys = {
476 .buttons = gpio_keys_button,
477 .nbuttons = 1,
478};
479
480static struct platform_device mst_gpio_keys_device = {
481 .name = "gpio-keys",
482 .id = -1,
483 .dev = {
484 .platform_data = &mainstone_gpio_keys,
485 },
486};
487
74ec71e1
TP		 488static struct platform_device *platform_devices[] __initdata = {
489 &smc91x_device,
74ec71e1
TP		 490 &mst_flash_device[0],
491 &mst_flash_device[1],
450d2874 492 &mst_gpio_keys_device,
74ec71e1
TP		 493};
494
81f280e2
RP		 495static struct pxaohci_platform_data mainstone_ohci_platform_data = {
496 .port_mode = PMM_PERPORT_MODE,
097b5334 497 .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
81f280e2
RP		 498};
499
36caeb4e 500#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
55c26e40 501static unsigned int mainstone_matrix_keys[] = {
502 KEY(0, 0, KEY_A), KEY(1, 0, KEY_B), KEY(2, 0, KEY_C),
503 KEY(3, 0, KEY_D), KEY(4, 0, KEY_E), KEY(5, 0, KEY_F),
504 KEY(0, 1, KEY_G), KEY(1, 1, KEY_H), KEY(2, 1, KEY_I),
505 KEY(3, 1, KEY_J), KEY(4, 1, KEY_K), KEY(5, 1, KEY_L),
506 KEY(0, 2, KEY_M), KEY(1, 2, KEY_N), KEY(2, 2, KEY_O),
507 KEY(3, 2, KEY_P), KEY(4, 2, KEY_Q), KEY(5, 2, KEY_R),
508 KEY(0, 3, KEY_S), KEY(1, 3, KEY_T), KEY(2, 3, KEY_U),
509 KEY(3, 3, KEY_V), KEY(4, 3, KEY_W), KEY(5, 3, KEY_X),
510 KEY(2, 4, KEY_Y), KEY(3, 4, KEY_Z),
511
512 KEY(0, 4, KEY_DOT), /* . */
513 KEY(1, 4, KEY_CLOSE), /* @ */
514 KEY(4, 4, KEY_SLASH),
515 KEY(5, 4, KEY_BACKSLASH),
516 KEY(0, 5, KEY_HOME),
517 KEY(1, 5, KEY_LEFTSHIFT),
518 KEY(2, 5, KEY_SPACE),
519 KEY(3, 5, KEY_SPACE),
520 KEY(4, 5, KEY_ENTER),
521 KEY(5, 5, KEY_BACKSPACE),
522
523 KEY(0, 6, KEY_UP),
524 KEY(1, 6, KEY_DOWN),
525 KEY(2, 6, KEY_LEFT),
526 KEY(3, 6, KEY_RIGHT),
527 KEY(4, 6, KEY_SELECT),
528};
529
530struct pxa27x_keypad_platform_data mainstone_keypad_info = {
531 .matrix_key_rows = 6,
532 .matrix_key_cols = 7,
533 .matrix_key_map = mainstone_matrix_keys,
534 .matrix_key_map_size = ARRAY_SIZE(mainstone_matrix_keys),
535
536 .enable_rotary0 = 1,
537 .rotary0_up_key = KEY_UP,
538 .rotary0_down_key = KEY_DOWN,
539
540 .debounce_interval = 30,
541};
542
543static void __init mainstone_init_keypad(void)
544{
545 pxa_set_keypad_info(&mainstone_keypad_info);
546}
547#else
548static inline void mainstone_init_keypad(void) {}
549#endif
550
1da177e4
LT		 551static void __init mainstone_init(void)
552{
74ec71e1
TP		 553 int SW7 = 0; /* FIXME: get from SCR (Mst doc section 3.2.1.1) */
554
fef06d27 555 pxa2xx_mfp_config(ARRAY_AND_SIZE(mainstone_pin_config));
556
cc155c6f
RK		 557 pxa_set_ffuart_info(NULL);
558 pxa_set_btuart_info(NULL);
559 pxa_set_stuart_info(NULL);
560
ad68bb9f 561 mst_flash_data[0].width = (__raw_readl(BOOT_DEF) & 1) ? 2 : 4;
74ec71e1
TP		 562 mst_flash_data[1].width = 4;
563
564 /* Compensate for SW7 which swaps the flash banks */
565 mst_flash_data[SW7].name = "processor-flash";
566 mst_flash_data[SW7 ^ 1].name = "mainboard-flash";
567
568 printk(KERN_NOTICE "Mainstone configured to boot from %s\n",
569 mst_flash_data[0].name);
570
5b2e98cd
JH		 571 /* system bus arbiter setting
572 * - Core_Park
573 * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
574 */
575 ARB_CNTRL = ARB_CORE_PARK | 0x234;
576
74ec71e1 577 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
1da177e4
LT		 578
579 /* reading Mainstone's "Virtual Configuration Register"
580 might be handy to select LCD type here */
581 if (0)
d14b272b 582 mainstone_pxafb_info.modes = &toshiba_ltm04c380k_mode;
1da177e4 583 else
d14b272b
RP		 584 mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode;
585
4321e1a1 586 pxa_set_fb_info(NULL, &mainstone_pxafb_info);
3777f774 587 mainstone_backlight_register();
1da177e4
LT		 588
589 pxa_set_mci_info(&mainstone_mci_platform_data);
6f475c01 590 pxa_set_ficp_info(&mainstone_ficp_platform_data);
81f280e2 591 pxa_set_ohci_info(&mainstone_ohci_platform_data);
835e7f1c 592 pxa_set_i2c_info(NULL);
9f19d638 593 pxa_set_ac97_info(&mst_audio_ops);
55c26e40 594
595 mainstone_init_keypad();
1da177e4
LT		 596}
597
598
599static struct map_desc mainstone_io_desc[] __initdata = {
6f9182eb
DS		 600 { /* CPLD */
601 .virtual = MST_FPGA_VIRT,
602 .pfn = __phys_to_pfn(MST_FPGA_PHYS),
603 .length = 0x00100000,
604 .type = MT_DEVICE
605 }
1da177e4
LT		 606};
607
608static void __init mainstone_map_io(void)
609{
851982c1 610 pxa27x_map_io();
1da177e4
LT		 611 iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc));
612
8775420d
TP		 613 /* for use I SRAM as framebuffer. */
614 PSLR |= 0xF04;
615 PCFR = 0x66;
1da177e4
LT		 616}
617
55f5d8ec
BW		 618/*
619 * Driver for the 8 discrete LEDs available for general use:
620 * Note: bits [15-8] are used to enable/blank the 8 7 segment hex displays
621 * so be sure to not monkey with them here.
622 */
623
624#if defined(CONFIG_NEW_LEDS) && defined(CONFIG_LEDS_CLASS)
625struct mainstone_led {
626 struct led_classdev cdev;
627 u8 mask;
628};
629
630/*
631 * The triggers lines up below will only be used if the
632 * LED triggers are compiled in.
633 */
634static const struct {
635 const char *name;
636 const char *trigger;
637} mainstone_leds[] = {
638 { "mainstone:D28", "default-on", },
639 { "mainstone:D27", "cpu0", },
640 { "mainstone:D26", "heartbeat" },
641 { "mainstone:D25", },
642 { "mainstone:D24", },
643 { "mainstone:D23", },
644 { "mainstone:D22", },
645 { "mainstone:D21", },
646};
647
648static void mainstone_led_set(struct led_classdev *cdev,
649 enum led_brightness b)
650{
651 struct mainstone_led *led = container_of(cdev,
652 struct mainstone_led, cdev);
653 u32 reg = MST_LEDCTRL;
654
655 if (b != LED_OFF)
656 reg |= led->mask;
657 else
658 reg &= ~led->mask;
659
660 MST_LEDCTRL = reg;
661}
662
663static enum led_brightness mainstone_led_get(struct led_classdev *cdev)
664{
665 struct mainstone_led *led = container_of(cdev,
666 struct mainstone_led, cdev);
667 u32 reg = MST_LEDCTRL;
668
669 return (reg & led->mask) ? LED_FULL : LED_OFF;
670}
671
672static int __init mainstone_leds_init(void)
673{
674 int i;
675
676 if (!machine_is_mainstone())
677 return -ENODEV;
678
679 /* All ON */
680 MST_LEDCTRL |= 0xff;
681 for (i = 0; i < ARRAY_SIZE(mainstone_leds); i++) {
682 struct mainstone_led *led;
683
684 led = kzalloc(sizeof(*led), GFP_KERNEL);
685 if (!led)
686 break;
687
688 led->cdev.name = mainstone_leds[i].name;
689 led->cdev.brightness_set = mainstone_led_set;
690 led->cdev.brightness_get = mainstone_led_get;
691 led->cdev.default_trigger = mainstone_leds[i].trigger;
692 led->mask = BIT(i);
693
694 if (led_classdev_register(NULL, &led->cdev) < 0) {
695 kfree(led);
696 break;
697 }
698 }
699
700 return 0;
701}
702
703/*
704 * Since we may have triggers on any subsystem, defer registration
705 * until after subsystem_init.
706 */
707fs_initcall(mainstone_leds_init);
708#endif
709
1da177e4 710MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
e9dea0c6 711 /* Maintainer: MontaVista Software Inc. */
7375aba6 712 .atag_offset = 0x100, /* BLOB boot parameter setting */
e9dea0c6 713 .map_io = mainstone_map_io,
6ac6b817 714 .nr_irqs = MAINSTONE_NR_IRQS,
e9dea0c6 715 .init_irq = mainstone_init_irq,
8a97ae2f 716 .handle_irq = pxa27x_handle_irq,
6bb27d73 717 .init_time = pxa_timer_init,
e9dea0c6 718 .init_machine = mainstone_init,
271a74fc 719 .restart = pxa_restart,
1da177e4 720MACHINE_END
Linux kernel - Deliverables
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