Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * linux/arch/arm/mach-pxa/mainstone.c | |
3 | * | |
4 | * Support for the Intel HCDDBBVA0 Development Platform. | |
5 | * (go figure how they came up with such name...) | |
6 | * | |
7 | * Author: Nicolas Pitre | |
8 | * Created: Nov 05, 2002 | |
9 | * Copyright: MontaVista Software Inc. | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License version 2 as | |
13 | * published by the Free Software Foundation. | |
14 | */ | |
15 | ||
16 | #include <linux/init.h> | |
d052d1be | 17 | #include <linux/platform_device.h> |
22f11c4e | 18 | #include <linux/sysdev.h> |
1da177e4 LT |
19 | #include <linux/interrupt.h> |
20 | #include <linux/sched.h> | |
21 | #include <linux/bitops.h> | |
22 | #include <linux/fb.h> | |
74ec71e1 TP |
23 | #include <linux/ioport.h> |
24 | #include <linux/mtd/mtd.h> | |
25 | #include <linux/mtd/partitions.h> | |
450d2874 | 26 | #include <linux/input.h> |
27 | #include <linux/gpio_keys.h> | |
402e4909 | 28 | #include <linux/pwm_backlight.h> |
38fd6c38 | 29 | #include <linux/smc91x.h> |
1da177e4 LT |
30 | |
31 | #include <asm/types.h> | |
32 | #include <asm/setup.h> | |
33 | #include <asm/memory.h> | |
34 | #include <asm/mach-types.h> | |
a09e64fb | 35 | #include <mach/hardware.h> |
1da177e4 | 36 | #include <asm/irq.h> |
74ec71e1 | 37 | #include <asm/sizes.h> |
1da177e4 LT |
38 | |
39 | #include <asm/mach/arch.h> | |
40 | #include <asm/mach/map.h> | |
41 | #include <asm/mach/irq.h> | |
74ec71e1 | 42 | #include <asm/mach/flash.h> |
1da177e4 | 43 | |
51c62982 | 44 | #include <mach/pxa27x.h> |
da065a0b | 45 | #include <mach/gpio.h> |
a09e64fb RK |
46 | #include <mach/mainstone.h> |
47 | #include <mach/audio.h> | |
48 | #include <mach/pxafb.h> | |
f0a83701 | 49 | #include <plat/i2c.h> |
a09e64fb RK |
50 | #include <mach/mmc.h> |
51 | #include <mach/irda.h> | |
52 | #include <mach/ohci.h> | |
53 | #include <mach/pxa27x_keypad.h> | |
1da177e4 LT |
54 | |
55 | #include "generic.h" | |
46c41e62 | 56 | #include "devices.h" |
1da177e4 | 57 | |
fef06d27 | 58 | static unsigned long mainstone_pin_config[] = { |
59 | /* Chip Select */ | |
60 | GPIO15_nCS_1, | |
61 | ||
62 | /* LCD - 16bpp Active TFT */ | |
63 | GPIO58_LCD_LDD_0, | |
64 | GPIO59_LCD_LDD_1, | |
65 | GPIO60_LCD_LDD_2, | |
66 | GPIO61_LCD_LDD_3, | |
67 | GPIO62_LCD_LDD_4, | |
68 | GPIO63_LCD_LDD_5, | |
69 | GPIO64_LCD_LDD_6, | |
70 | GPIO65_LCD_LDD_7, | |
71 | GPIO66_LCD_LDD_8, | |
72 | GPIO67_LCD_LDD_9, | |
73 | GPIO68_LCD_LDD_10, | |
74 | GPIO69_LCD_LDD_11, | |
75 | GPIO70_LCD_LDD_12, | |
76 | GPIO71_LCD_LDD_13, | |
77 | GPIO72_LCD_LDD_14, | |
78 | GPIO73_LCD_LDD_15, | |
79 | GPIO74_LCD_FCLK, | |
80 | GPIO75_LCD_LCLK, | |
81 | GPIO76_LCD_PCLK, | |
82 | GPIO77_LCD_BIAS, | |
83 | GPIO16_PWM0_OUT, /* Backlight */ | |
84 | ||
85 | /* MMC */ | |
86 | GPIO32_MMC_CLK, | |
87 | GPIO112_MMC_CMD, | |
88 | GPIO92_MMC_DAT_0, | |
89 | GPIO109_MMC_DAT_1, | |
90 | GPIO110_MMC_DAT_2, | |
91 | GPIO111_MMC_DAT_3, | |
92 | ||
93 | /* USB Host Port 1 */ | |
94 | GPIO88_USBH1_PWR, | |
95 | GPIO89_USBH1_PEN, | |
96 | ||
97 | /* PC Card */ | |
98 | GPIO48_nPOE, | |
99 | GPIO49_nPWE, | |
100 | GPIO50_nPIOR, | |
101 | GPIO51_nPIOW, | |
102 | GPIO85_nPCE_1, | |
103 | GPIO54_nPCE_2, | |
104 | GPIO79_PSKTSEL, | |
105 | GPIO55_nPREG, | |
106 | GPIO56_nPWAIT, | |
107 | GPIO57_nIOIS16, | |
108 | ||
109 | /* AC97 */ | |
110 | GPIO45_AC97_SYSCLK, | |
111 | ||
112 | /* Keypad */ | |
b18773d5 EM |
113 | GPIO93_KP_DKIN_0, |
114 | GPIO94_KP_DKIN_1, | |
115 | GPIO95_KP_DKIN_2, | |
fef06d27 | 116 | GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH, |
117 | GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH, | |
118 | GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH, | |
119 | GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH, | |
120 | GPIO98_KP_MKIN_4 | WAKEUP_ON_LEVEL_HIGH, | |
121 | GPIO99_KP_MKIN_5 | WAKEUP_ON_LEVEL_HIGH, | |
122 | GPIO103_KP_MKOUT_0, | |
123 | GPIO104_KP_MKOUT_1, | |
124 | GPIO105_KP_MKOUT_2, | |
125 | GPIO106_KP_MKOUT_3, | |
126 | GPIO107_KP_MKOUT_4, | |
127 | GPIO108_KP_MKOUT_5, | |
128 | GPIO96_KP_MKOUT_6, | |
129 | ||
6f584cfa EM |
130 | /* I2C */ |
131 | GPIO117_I2C_SCL, | |
132 | GPIO118_I2C_SDA, | |
133 | ||
fef06d27 | 134 | /* GPIO */ |
135 | GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH, | |
136 | }; | |
1da177e4 LT |
137 | |
138 | static unsigned long mainstone_irq_enabled; | |
139 | ||
140 | static void mainstone_mask_irq(unsigned int irq) | |
141 | { | |
142 | int mainstone_irq = (irq - MAINSTONE_IRQ(0)); | |
143 | MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq)); | |
144 | } | |
145 | ||
146 | static void mainstone_unmask_irq(unsigned int irq) | |
147 | { | |
148 | int mainstone_irq = (irq - MAINSTONE_IRQ(0)); | |
149 | /* the irq can be acknowledged only if deasserted, so it's done here */ | |
150 | MST_INTSETCLR &= ~(1 << mainstone_irq); | |
151 | MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq)); | |
152 | } | |
153 | ||
38c677cb DB |
154 | static struct irq_chip mainstone_irq_chip = { |
155 | .name = "FPGA", | |
1da177e4 LT |
156 | .ack = mainstone_mask_irq, |
157 | .mask = mainstone_mask_irq, | |
158 | .unmask = mainstone_unmask_irq, | |
159 | }; | |
160 | ||
10dd5ce2 | 161 | static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc) |
1da177e4 LT |
162 | { |
163 | unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled; | |
164 | do { | |
165 | GEDR(0) = GPIO_bit(0); /* clear useless edge notification */ | |
166 | if (likely(pending)) { | |
167 | irq = MAINSTONE_IRQ(0) + __ffs(pending); | |
d8aa0251 | 168 | generic_handle_irq(irq); |
1da177e4 LT |
169 | } |
170 | pending = MST_INTSETCLR & mainstone_irq_enabled; | |
171 | } while (pending); | |
172 | } | |
173 | ||
174 | static void __init mainstone_init_irq(void) | |
175 | { | |
176 | int irq; | |
177 | ||
cd49104d | 178 | pxa27x_init_irq(); |
1da177e4 LT |
179 | |
180 | /* setup extra Mainstone irqs */ | |
181 | for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) { | |
182 | set_irq_chip(irq, &mainstone_irq_chip); | |
10dd5ce2 | 183 | set_irq_handler(irq, handle_level_irq); |
ec64152f TG |
184 | if (irq == MAINSTONE_IRQ(10) || irq == MAINSTONE_IRQ(14)) |
185 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN); | |
186 | else | |
187 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | |
1da177e4 LT |
188 | } |
189 | set_irq_flags(MAINSTONE_IRQ(8), 0); | |
190 | set_irq_flags(MAINSTONE_IRQ(12), 0); | |
191 | ||
192 | MST_INTMSKENA = 0; | |
193 | MST_INTSETCLR = 0; | |
194 | ||
195 | set_irq_chained_handler(IRQ_GPIO(0), mainstone_irq_handler); | |
6cab4860 | 196 | set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING); |
1da177e4 LT |
197 | } |
198 | ||
22f11c4e NP |
199 | #ifdef CONFIG_PM |
200 | ||
201 | static int mainstone_irq_resume(struct sys_device *dev) | |
202 | { | |
203 | MST_INTMSKENA = mainstone_irq_enabled; | |
204 | return 0; | |
205 | } | |
206 | ||
207 | static struct sysdev_class mainstone_irq_sysclass = { | |
af5ca3f4 | 208 | .name = "cpld_irq", |
22f11c4e NP |
209 | .resume = mainstone_irq_resume, |
210 | }; | |
211 | ||
212 | static struct sys_device mainstone_irq_device = { | |
213 | .cls = &mainstone_irq_sysclass, | |
214 | }; | |
215 | ||
216 | static int __init mainstone_irq_device_init(void) | |
217 | { | |
16f159b1 RK |
218 | int ret = -ENODEV; |
219 | ||
220 | if (machine_is_mainstone()) { | |
221 | ret = sysdev_class_register(&mainstone_irq_sysclass); | |
222 | if (ret == 0) | |
223 | ret = sysdev_register(&mainstone_irq_device); | |
224 | } | |
22f11c4e NP |
225 | return ret; |
226 | } | |
227 | ||
228 | device_initcall(mainstone_irq_device_init); | |
229 | ||
230 | #endif | |
231 | ||
1da177e4 LT |
232 | |
233 | static struct resource smc91x_resources[] = { | |
234 | [0] = { | |
235 | .start = (MST_ETH_PHYS + 0x300), | |
236 | .end = (MST_ETH_PHYS + 0xfffff), | |
237 | .flags = IORESOURCE_MEM, | |
238 | }, | |
239 | [1] = { | |
240 | .start = MAINSTONE_IRQ(3), | |
241 | .end = MAINSTONE_IRQ(3), | |
e7b3dc7e | 242 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
1da177e4 LT |
243 | } |
244 | }; | |
245 | ||
38fd6c38 EM |
246 | static struct smc91x_platdata mainstone_smc91x_info = { |
247 | .flags = SMC91X_USE_8BIT | SMC91X_USE_16BIT | SMC91X_USE_32BIT | | |
248 | SMC91X_NOWAIT | SMC91X_USE_DMA, | |
249 | }; | |
250 | ||
1da177e4 LT |
251 | static struct platform_device smc91x_device = { |
252 | .name = "smc91x", | |
253 | .id = 0, | |
254 | .num_resources = ARRAY_SIZE(smc91x_resources), | |
255 | .resource = smc91x_resources, | |
38fd6c38 EM |
256 | .dev = { |
257 | .platform_data = &mainstone_smc91x_info, | |
258 | }, | |
1da177e4 LT |
259 | }; |
260 | ||
f7cbb7fc | 261 | static int mst_audio_startup(struct snd_pcm_substream *substream, void *priv) |
1da177e4 LT |
262 | { |
263 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | |
264 | MST_MSCWR2 &= ~MST_MSCWR2_AC97_SPKROFF; | |
265 | return 0; | |
266 | } | |
267 | ||
f7cbb7fc | 268 | static void mst_audio_shutdown(struct snd_pcm_substream *substream, void *priv) |
1da177e4 LT |
269 | { |
270 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | |
271 | MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF; | |
272 | } | |
273 | ||
274 | static long mst_audio_suspend_mask; | |
275 | ||
276 | static void mst_audio_suspend(void *priv) | |
277 | { | |
278 | mst_audio_suspend_mask = MST_MSCWR2; | |
279 | MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF; | |
280 | } | |
281 | ||
282 | static void mst_audio_resume(void *priv) | |
283 | { | |
284 | MST_MSCWR2 &= mst_audio_suspend_mask | ~MST_MSCWR2_AC97_SPKROFF; | |
285 | } | |
286 | ||
287 | static pxa2xx_audio_ops_t mst_audio_ops = { | |
288 | .startup = mst_audio_startup, | |
289 | .shutdown = mst_audio_shutdown, | |
290 | .suspend = mst_audio_suspend, | |
291 | .resume = mst_audio_resume, | |
292 | }; | |
293 | ||
74ec71e1 TP |
294 | static struct resource flash_resources[] = { |
295 | [0] = { | |
296 | .start = PXA_CS0_PHYS, | |
297 | .end = PXA_CS0_PHYS + SZ_64M - 1, | |
298 | .flags = IORESOURCE_MEM, | |
299 | }, | |
300 | [1] = { | |
301 | .start = PXA_CS1_PHYS, | |
302 | .end = PXA_CS1_PHYS + SZ_64M - 1, | |
303 | .flags = IORESOURCE_MEM, | |
304 | }, | |
305 | }; | |
306 | ||
307 | static struct mtd_partition mainstoneflash0_partitions[] = { | |
308 | { | |
309 | .name = "Bootloader", | |
310 | .size = 0x00040000, | |
311 | .offset = 0, | |
312 | .mask_flags = MTD_WRITEABLE /* force read-only */ | |
313 | },{ | |
314 | .name = "Kernel", | |
315 | .size = 0x00400000, | |
316 | .offset = 0x00040000, | |
317 | },{ | |
318 | .name = "Filesystem", | |
319 | .size = MTDPART_SIZ_FULL, | |
320 | .offset = 0x00440000 | |
321 | } | |
322 | }; | |
323 | ||
324 | static struct flash_platform_data mst_flash_data[2] = { | |
325 | { | |
326 | .map_name = "cfi_probe", | |
327 | .parts = mainstoneflash0_partitions, | |
328 | .nr_parts = ARRAY_SIZE(mainstoneflash0_partitions), | |
329 | }, { | |
330 | .map_name = "cfi_probe", | |
331 | .parts = NULL, | |
332 | .nr_parts = 0, | |
333 | } | |
334 | }; | |
335 | ||
336 | static struct platform_device mst_flash_device[2] = { | |
337 | { | |
338 | .name = "pxa2xx-flash", | |
339 | .id = 0, | |
340 | .dev = { | |
341 | .platform_data = &mst_flash_data[0], | |
342 | }, | |
343 | .resource = &flash_resources[0], | |
344 | .num_resources = 1, | |
345 | }, | |
346 | { | |
347 | .name = "pxa2xx-flash", | |
348 | .id = 1, | |
349 | .dev = { | |
350 | .platform_data = &mst_flash_data[1], | |
351 | }, | |
352 | .resource = &flash_resources[1], | |
353 | .num_resources = 1, | |
354 | }, | |
355 | }; | |
356 | ||
402e4909 RK |
357 | #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) |
358 | static struct platform_pwm_backlight_data mainstone_backlight_data = { | |
359 | .pwm_id = 0, | |
360 | .max_brightness = 1023, | |
361 | .dft_brightness = 1023, | |
362 | .pwm_period_ns = 78770, | |
363 | }; | |
3777f774 | 364 | |
402e4909 RK |
365 | static struct platform_device mainstone_backlight_device = { |
366 | .name = "pwm-backlight", | |
367 | .dev = { | |
368 | .parent = &pxa27x_device_pwm0.dev, | |
369 | .platform_data = &mainstone_backlight_data, | |
370 | }, | |
3777f774 RK |
371 | }; |
372 | ||
373 | static void __init mainstone_backlight_register(void) | |
374 | { | |
402e4909 RK |
375 | int ret = platform_device_register(&mainstone_backlight_device); |
376 | if (ret) | |
377 | printk(KERN_ERR "mainstone: failed to register backlight device: %d\n", ret); | |
1da177e4 | 378 | } |
3777f774 RK |
379 | #else |
380 | #define mainstone_backlight_register() do { } while (0) | |
381 | #endif | |
1da177e4 | 382 | |
d14b272b | 383 | static struct pxafb_mode_info toshiba_ltm04c380k_mode = { |
1da177e4 LT |
384 | .pixclock = 50000, |
385 | .xres = 640, | |
386 | .yres = 480, | |
387 | .bpp = 16, | |
388 | .hsync_len = 1, | |
389 | .left_margin = 0x9f, | |
390 | .right_margin = 1, | |
391 | .vsync_len = 44, | |
392 | .upper_margin = 0, | |
393 | .lower_margin = 0, | |
394 | .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, | |
1da177e4 LT |
395 | }; |
396 | ||
d14b272b | 397 | static struct pxafb_mode_info toshiba_ltm035a776c_mode = { |
1da177e4 LT |
398 | .pixclock = 110000, |
399 | .xres = 240, | |
400 | .yres = 320, | |
401 | .bpp = 16, | |
402 | .hsync_len = 4, | |
403 | .left_margin = 8, | |
404 | .right_margin = 20, | |
405 | .vsync_len = 3, | |
406 | .upper_margin = 1, | |
407 | .lower_margin = 10, | |
408 | .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, | |
d14b272b RP |
409 | }; |
410 | ||
411 | static struct pxafb_mach_info mainstone_pxafb_info = { | |
412 | .num_modes = 1, | |
0454bd09 | 413 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, |
1da177e4 LT |
414 | }; |
415 | ||
40220c1a | 416 | static int mainstone_mci_init(struct device *dev, irq_handler_t mstone_detect_int, void *data) |
1da177e4 LT |
417 | { |
418 | int err; | |
419 | ||
1da177e4 LT |
420 | /* make sure SD/Memory Stick multiplexer's signals |
421 | * are routed to MMC controller | |
422 | */ | |
423 | MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL; | |
424 | ||
52e405ea | 425 | err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, IRQF_DISABLED, |
1da177e4 | 426 | "MMC card detect", data); |
2687bd38 | 427 | if (err) |
1da177e4 | 428 | printk(KERN_ERR "mainstone_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); |
1da177e4 | 429 | |
2687bd38 | 430 | return err; |
1da177e4 LT |
431 | } |
432 | ||
433 | static void mainstone_mci_setpower(struct device *dev, unsigned int vdd) | |
434 | { | |
435 | struct pxamci_platform_data* p_d = dev->platform_data; | |
436 | ||
437 | if (( 1 << vdd) & p_d->ocr_mask) { | |
8e86f427 | 438 | printk(KERN_DEBUG "%s: on\n", __func__); |
1da177e4 LT |
439 | MST_MSCWR1 |= MST_MSCWR1_MMC_ON; |
440 | MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL; | |
441 | } else { | |
8e86f427 | 442 | printk(KERN_DEBUG "%s: off\n", __func__); |
1da177e4 LT |
443 | MST_MSCWR1 &= ~MST_MSCWR1_MMC_ON; |
444 | } | |
445 | } | |
446 | ||
447 | static void mainstone_mci_exit(struct device *dev, void *data) | |
448 | { | |
449 | free_irq(MAINSTONE_MMC_IRQ, data); | |
450 | } | |
451 | ||
452 | static struct pxamci_platform_data mainstone_mci_platform_data = { | |
7a648256 RJ |
453 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, |
454 | .init = mainstone_mci_init, | |
455 | .setpower = mainstone_mci_setpower, | |
456 | .exit = mainstone_mci_exit, | |
457 | .gpio_card_detect = -1, | |
458 | .gpio_card_ro = -1, | |
459 | .gpio_power = -1, | |
1da177e4 LT |
460 | }; |
461 | ||
6f475c01 NP |
462 | static void mainstone_irda_transceiver_mode(struct device *dev, int mode) |
463 | { | |
464 | unsigned long flags; | |
465 | ||
466 | local_irq_save(flags); | |
467 | if (mode & IR_SIRMODE) { | |
468 | MST_MSCWR1 &= ~MST_MSCWR1_IRDA_FIR; | |
469 | } else if (mode & IR_FIRMODE) { | |
470 | MST_MSCWR1 |= MST_MSCWR1_IRDA_FIR; | |
471 | } | |
0fc3ff31 | 472 | pxa2xx_transceiver_mode(dev, mode); |
6f475c01 NP |
473 | if (mode & IR_OFF) { |
474 | MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_OFF; | |
475 | } else { | |
476 | MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_FULL; | |
477 | } | |
478 | local_irq_restore(flags); | |
479 | } | |
480 | ||
481 | static struct pxaficp_platform_data mainstone_ficp_platform_data = { | |
c4bd0172 MV |
482 | .gpio_pwdown = -1, |
483 | .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF, | |
484 | .transceiver_mode = mainstone_irda_transceiver_mode, | |
6f475c01 NP |
485 | }; |
486 | ||
450d2874 | 487 | static struct gpio_keys_button gpio_keys_button[] = { |
488 | [0] = { | |
489 | .desc = "wakeup", | |
490 | .code = KEY_SUSPEND, | |
491 | .type = EV_KEY, | |
492 | .gpio = 1, | |
493 | .wakeup = 1, | |
494 | }, | |
495 | }; | |
496 | ||
497 | static struct gpio_keys_platform_data mainstone_gpio_keys = { | |
498 | .buttons = gpio_keys_button, | |
499 | .nbuttons = 1, | |
500 | }; | |
501 | ||
502 | static struct platform_device mst_gpio_keys_device = { | |
503 | .name = "gpio-keys", | |
504 | .id = -1, | |
505 | .dev = { | |
506 | .platform_data = &mainstone_gpio_keys, | |
507 | }, | |
508 | }; | |
509 | ||
74ec71e1 TP |
510 | static struct platform_device *platform_devices[] __initdata = { |
511 | &smc91x_device, | |
74ec71e1 TP |
512 | &mst_flash_device[0], |
513 | &mst_flash_device[1], | |
450d2874 | 514 | &mst_gpio_keys_device, |
74ec71e1 TP |
515 | }; |
516 | ||
81f280e2 RP |
517 | static struct pxaohci_platform_data mainstone_ohci_platform_data = { |
518 | .port_mode = PMM_PERPORT_MODE, | |
097b5334 | 519 | .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW, |
81f280e2 RP |
520 | }; |
521 | ||
36caeb4e | 522 | #if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE) |
55c26e40 | 523 | static unsigned int mainstone_matrix_keys[] = { |
524 | KEY(0, 0, KEY_A), KEY(1, 0, KEY_B), KEY(2, 0, KEY_C), | |
525 | KEY(3, 0, KEY_D), KEY(4, 0, KEY_E), KEY(5, 0, KEY_F), | |
526 | KEY(0, 1, KEY_G), KEY(1, 1, KEY_H), KEY(2, 1, KEY_I), | |
527 | KEY(3, 1, KEY_J), KEY(4, 1, KEY_K), KEY(5, 1, KEY_L), | |
528 | KEY(0, 2, KEY_M), KEY(1, 2, KEY_N), KEY(2, 2, KEY_O), | |
529 | KEY(3, 2, KEY_P), KEY(4, 2, KEY_Q), KEY(5, 2, KEY_R), | |
530 | KEY(0, 3, KEY_S), KEY(1, 3, KEY_T), KEY(2, 3, KEY_U), | |
531 | KEY(3, 3, KEY_V), KEY(4, 3, KEY_W), KEY(5, 3, KEY_X), | |
532 | KEY(2, 4, KEY_Y), KEY(3, 4, KEY_Z), | |
533 | ||
534 | KEY(0, 4, KEY_DOT), /* . */ | |
535 | KEY(1, 4, KEY_CLOSE), /* @ */ | |
536 | KEY(4, 4, KEY_SLASH), | |
537 | KEY(5, 4, KEY_BACKSLASH), | |
538 | KEY(0, 5, KEY_HOME), | |
539 | KEY(1, 5, KEY_LEFTSHIFT), | |
540 | KEY(2, 5, KEY_SPACE), | |
541 | KEY(3, 5, KEY_SPACE), | |
542 | KEY(4, 5, KEY_ENTER), | |
543 | KEY(5, 5, KEY_BACKSPACE), | |
544 | ||
545 | KEY(0, 6, KEY_UP), | |
546 | KEY(1, 6, KEY_DOWN), | |
547 | KEY(2, 6, KEY_LEFT), | |
548 | KEY(3, 6, KEY_RIGHT), | |
549 | KEY(4, 6, KEY_SELECT), | |
550 | }; | |
551 | ||
552 | struct pxa27x_keypad_platform_data mainstone_keypad_info = { | |
553 | .matrix_key_rows = 6, | |
554 | .matrix_key_cols = 7, | |
555 | .matrix_key_map = mainstone_matrix_keys, | |
556 | .matrix_key_map_size = ARRAY_SIZE(mainstone_matrix_keys), | |
557 | ||
558 | .enable_rotary0 = 1, | |
559 | .rotary0_up_key = KEY_UP, | |
560 | .rotary0_down_key = KEY_DOWN, | |
561 | ||
562 | .debounce_interval = 30, | |
563 | }; | |
564 | ||
565 | static void __init mainstone_init_keypad(void) | |
566 | { | |
567 | pxa_set_keypad_info(&mainstone_keypad_info); | |
568 | } | |
569 | #else | |
570 | static inline void mainstone_init_keypad(void) {} | |
571 | #endif | |
572 | ||
1da177e4 LT |
573 | static void __init mainstone_init(void) |
574 | { | |
74ec71e1 TP |
575 | int SW7 = 0; /* FIXME: get from SCR (Mst doc section 3.2.1.1) */ |
576 | ||
fef06d27 | 577 | pxa2xx_mfp_config(ARRAY_AND_SIZE(mainstone_pin_config)); |
578 | ||
cc155c6f RK |
579 | pxa_set_ffuart_info(NULL); |
580 | pxa_set_btuart_info(NULL); | |
581 | pxa_set_stuart_info(NULL); | |
582 | ||
74ec71e1 TP |
583 | mst_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4; |
584 | mst_flash_data[1].width = 4; | |
585 | ||
586 | /* Compensate for SW7 which swaps the flash banks */ | |
587 | mst_flash_data[SW7].name = "processor-flash"; | |
588 | mst_flash_data[SW7 ^ 1].name = "mainboard-flash"; | |
589 | ||
590 | printk(KERN_NOTICE "Mainstone configured to boot from %s\n", | |
591 | mst_flash_data[0].name); | |
592 | ||
5b2e98cd JH |
593 | /* system bus arbiter setting |
594 | * - Core_Park | |
595 | * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4 | |
596 | */ | |
597 | ARB_CNTRL = ARB_CORE_PARK | 0x234; | |
598 | ||
74ec71e1 | 599 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); |
1da177e4 LT |
600 | |
601 | /* reading Mainstone's "Virtual Configuration Register" | |
602 | might be handy to select LCD type here */ | |
603 | if (0) | |
d14b272b | 604 | mainstone_pxafb_info.modes = &toshiba_ltm04c380k_mode; |
1da177e4 | 605 | else |
d14b272b RP |
606 | mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode; |
607 | ||
608 | set_pxa_fb_info(&mainstone_pxafb_info); | |
3777f774 | 609 | mainstone_backlight_register(); |
1da177e4 LT |
610 | |
611 | pxa_set_mci_info(&mainstone_mci_platform_data); | |
6f475c01 | 612 | pxa_set_ficp_info(&mainstone_ficp_platform_data); |
81f280e2 | 613 | pxa_set_ohci_info(&mainstone_ohci_platform_data); |
835e7f1c | 614 | pxa_set_i2c_info(NULL); |
9f19d638 | 615 | pxa_set_ac97_info(&mst_audio_ops); |
55c26e40 | 616 | |
617 | mainstone_init_keypad(); | |
1da177e4 LT |
618 | } |
619 | ||
620 | ||
621 | static struct map_desc mainstone_io_desc[] __initdata = { | |
6f9182eb DS |
622 | { /* CPLD */ |
623 | .virtual = MST_FPGA_VIRT, | |
624 | .pfn = __phys_to_pfn(MST_FPGA_PHYS), | |
625 | .length = 0x00100000, | |
626 | .type = MT_DEVICE | |
627 | } | |
1da177e4 LT |
628 | }; |
629 | ||
630 | static void __init mainstone_map_io(void) | |
631 | { | |
632 | pxa_map_io(); | |
633 | iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc)); | |
634 | ||
8775420d TP |
635 | /* for use I SRAM as framebuffer. */ |
636 | PSLR |= 0xF04; | |
637 | PCFR = 0x66; | |
1da177e4 LT |
638 | } |
639 | ||
640 | MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)") | |
e9dea0c6 | 641 | /* Maintainer: MontaVista Software Inc. */ |
e9dea0c6 | 642 | .phys_io = 0x40000000, |
a7d14f87 | 643 | .boot_params = 0xa0000100, /* BLOB boot parameter setting */ |
68070bde | 644 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, |
e9dea0c6 RK |
645 | .map_io = mainstone_map_io, |
646 | .init_irq = mainstone_init_irq, | |
1da177e4 | 647 | .timer = &pxa_timer, |
e9dea0c6 | 648 | .init_machine = mainstone_init, |
1da177e4 | 649 | MACHINE_END |