[deliverable/linux.git] / arch / arm / mach-pxa / mfp-pxa2xx.c

/*
 *  linux/arch/arm/mach-pxa/mfp-pxa2xx.c
 *
 *  PXA2xx pin mux configuration support
 *
 *  The GPIOs on PXA2xx can be configured as one of many alternate
 *  functions, this is by concept samilar to the MFP configuration
 *  on PXA3xx,  what's more important, the low power pin state and
 *  wakeup detection are also supported by the same framework.
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License version 2 as
 *  published by the Free Software Foundation.
 */
#include <linux/gpio.h>
#include <linux/gpio-pxa.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/syscore_ops.h>

#include <mach/pxa2xx-regs.h>
#include <mach/mfp-pxa2xx.h>

#include "generic.h"

#define PGSR(x)		__REG2(0x40F00020, (x) << 2)
#define __GAFR(u, x)	__REG2((u) ? 0x40E00058 : 0x40E00054, (x) << 3)
#define GAFR_L(x)	__GAFR(0, x)
#define GAFR_U(x)	__GAFR(1, x)

#define BANK_OFF(n)	(((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
#define GPLR(x)		__REG2(0x40E00000, BANK_OFF((x) >> 5))
#define GPDR(x)		__REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x0c)

#define PWER_WE35	(1 << 24)

struct gpio_desc {
	unsigned	valid		: 1;
	unsigned	can_wakeup	: 1;
	unsigned	keypad_gpio	: 1;
	unsigned	dir_inverted	: 1;
	unsigned int	mask; /* bit mask in PWER or PKWR */
	unsigned int	mux_mask; /* bit mask of muxed gpio bits, 0 if no mux */
	unsigned long	config;
};

static struct gpio_desc gpio_desc[MFP_PIN_GPIO127 + 1];

static unsigned long gpdr_lpm[4];

static int __mfp_config_gpio(unsigned gpio, unsigned long c)
{
	unsigned long gafr, mask = GPIO_bit(gpio);
	int bank = gpio_to_bank(gpio);
	int uorl = !!(gpio & 0x10); /* GAFRx_U or GAFRx_L ? */
	int shft = (gpio & 0xf) << 1;
	int fn = MFP_AF(c);
	int is_out = (c & MFP_DIR_OUT) ? 1 : 0;

	if (fn > 3)
		return -EINVAL;

	/* alternate function and direction at run-time */
	gafr = (uorl == 0) ? GAFR_L(bank) : GAFR_U(bank);
	gafr = (gafr & ~(0x3 << shft)) | (fn << shft);

	if (uorl == 0)
		GAFR_L(bank) = gafr;
	else
		GAFR_U(bank) = gafr;

	if (is_out ^ gpio_desc[gpio].dir_inverted)
		GPDR(gpio) |= mask;
	else
		GPDR(gpio) &= ~mask;

	/* alternate function and direction at low power mode */
	switch (c & MFP_LPM_STATE_MASK) {
	case MFP_LPM_DRIVE_HIGH:
		PGSR(bank) |= mask;
		is_out = 1;
		break;
	case MFP_LPM_DRIVE_LOW:
		PGSR(bank) &= ~mask;
		is_out = 1;
		break;
	case MFP_LPM_INPUT:
	case MFP_LPM_DEFAULT:
		break;
	default:
		/* warning and fall through, treat as MFP_LPM_DEFAULT */
		pr_warning("%s: GPIO%d: unsupported low power mode\n",
				__func__, gpio);
		break;
	}

	if (is_out ^ gpio_desc[gpio].dir_inverted)
		gpdr_lpm[bank] |= mask;
	else
		gpdr_lpm[bank] &= ~mask;

	/* give early warning if MFP_LPM_CAN_WAKEUP is set on the
	 * configurations of those pins not able to wakeup
	 */
	if ((c & MFP_LPM_CAN_WAKEUP) && !gpio_desc[gpio].can_wakeup) {
		pr_warning("%s: GPIO%d unable to wakeup\n",
				__func__, gpio);
		return -EINVAL;
	}

	if ((c & MFP_LPM_CAN_WAKEUP) && is_out) {
		pr_warning("%s: output GPIO%d unable to wakeup\n",
				__func__, gpio);
		return -EINVAL;
	}

	return 0;
}

static inline int __mfp_validate(int mfp)
{
	int gpio = mfp_to_gpio(mfp);

	if ((mfp > MFP_PIN_GPIO127) || !gpio_desc[gpio].valid) {
		pr_warning("%s: GPIO%d is invalid pin\n", __func__, gpio);
		return -1;
	}

	return gpio;
}

void pxa2xx_mfp_config(unsigned long *mfp_cfgs, int num)
{
	unsigned long flags;
	unsigned long *c;
	int i, gpio;

	for (i = 0, c = mfp_cfgs; i < num; i++, c++) {

		gpio = __mfp_validate(MFP_PIN(*c));
		if (gpio < 0)
			continue;

		local_irq_save(flags);

		gpio_desc[gpio].config = *c;
		__mfp_config_gpio(gpio, *c);

		local_irq_restore(flags);
	}
}

void pxa2xx_mfp_set_lpm(int mfp, unsigned long lpm)
{
	unsigned long flags, c;
	int gpio;

	gpio = __mfp_validate(mfp);
	if (gpio < 0)
		return;

	local_irq_save(flags);

	c = gpio_desc[gpio].config;
	c = (c & ~MFP_LPM_STATE_MASK) | lpm;
	__mfp_config_gpio(gpio, c);

	local_irq_restore(flags);
}

int gpio_set_wake(unsigned int gpio, unsigned int on)
{
	struct gpio_desc *d;
	unsigned long c, mux_taken;

	if (gpio > mfp_to_gpio(MFP_PIN_GPIO127))
		return -EINVAL;

	d = &gpio_desc[gpio];
	c = d->config;

	if (!d->valid)
		return -EINVAL;

	/* Allow keypad GPIOs to wakeup system when
	 * configured as generic GPIOs.
	 */
	if (d->keypad_gpio && (MFP_AF(d->config) == 0) &&
	    (d->config & MFP_LPM_CAN_WAKEUP)) {
		if (on)
			PKWR |= d->mask;
		else
			PKWR &= ~d->mask;
		return 0;
	}

	mux_taken = (PWER & d->mux_mask) & (~d->mask);
	if (on && mux_taken)
		return -EBUSY;

	if (d->can_wakeup && (c & MFP_LPM_CAN_WAKEUP)) {
		if (on) {
			PWER = (PWER & ~d->mux_mask) | d->mask;

			if (c & MFP_LPM_EDGE_RISE)
				PRER |= d->mask;
			else
				PRER &= ~d->mask;

			if (c & MFP_LPM_EDGE_FALL)
				PFER |= d->mask;
			else
				PFER &= ~d->mask;
		} else {
			PWER &= ~d->mask;
			PRER &= ~d->mask;
			PFER &= ~d->mask;
		}
	}
	return 0;
}

#ifdef CONFIG_PXA25x
static void __init pxa25x_mfp_init(void)
{
	int i;

	for (i = 0; i <= pxa_last_gpio; i++)
		gpio_desc[i].valid = 1;

	for (i = 0; i <= 15; i++) {
		gpio_desc[i].can_wakeup = 1;
		gpio_desc[i].mask = GPIO_bit(i);
	}

	/* PXA26x has additional 4 GPIOs (86/87/88/89) which has the
	 * direction bit inverted in GPDR2. See PXA26x DM 4.1.1.
	 */
	for (i = 86; i <= pxa_last_gpio; i++)
		gpio_desc[i].dir_inverted = 1;
}
#else
static inline void pxa25x_mfp_init(void) {}
#endif /* CONFIG_PXA25x */

#ifdef CONFIG_PXA27x
static int pxa27x_pkwr_gpio[] = {
	13, 16, 17, 34, 36, 37, 38, 39, 90, 91, 93, 94,
	95, 96, 97, 98, 99, 100, 101, 102
};

int keypad_set_wake(unsigned int on)
{
	unsigned int i, gpio, mask = 0;
	struct gpio_desc *d;

	for (i = 0; i < ARRAY_SIZE(pxa27x_pkwr_gpio); i++) {

		gpio = pxa27x_pkwr_gpio[i];
		d = &gpio_desc[gpio];

		/* skip if configured as generic GPIO */
		if (MFP_AF(d->config) == 0)
			continue;

		if (d->config & MFP_LPM_CAN_WAKEUP)
			mask |= gpio_desc[gpio].mask;
	}

	if (on)
		PKWR |= mask;
	else
		PKWR &= ~mask;
	return 0;
}

#define PWER_WEMUX2_GPIO38	(1 << 16)
#define PWER_WEMUX2_GPIO53	(2 << 16)
#define PWER_WEMUX2_GPIO40	(3 << 16)
#define PWER_WEMUX2_GPIO36	(4 << 16)
#define PWER_WEMUX2_MASK	(7 << 16)
#define PWER_WEMUX3_GPIO31	(1 << 19)
#define PWER_WEMUX3_GPIO113	(2 << 19)
#define PWER_WEMUX3_MASK	(3 << 19)

#define INIT_GPIO_DESC_MUXED(mux, gpio)				\
do {								\
	gpio_desc[(gpio)].can_wakeup = 1;			\
	gpio_desc[(gpio)].mask = PWER_ ## mux ## _GPIO ##gpio;	\
	gpio_desc[(gpio)].mux_mask = PWER_ ## mux ## _MASK;	\
} while (0)

static void __init pxa27x_mfp_init(void)
{
	int i, gpio;

	for (i = 0; i <= pxa_last_gpio; i++) {
		/* skip GPIO2, 5, 6, 7, 8, they are not
		 * valid pins allow configuration
		 */
		if (i == 2 || i == 5 || i == 6 || i == 7 || i == 8)
			continue;

		gpio_desc[i].valid = 1;
	}

	/* Keypad GPIOs */
	for (i = 0; i < ARRAY_SIZE(pxa27x_pkwr_gpio); i++) {
		gpio = pxa27x_pkwr_gpio[i];
		gpio_desc[gpio].can_wakeup = 1;
		gpio_desc[gpio].keypad_gpio = 1;
		gpio_desc[gpio].mask = 1 << i;
	}

	/* Overwrite GPIO13 as a PWER wakeup source */
	for (i = 0; i <= 15; i++) {
		/* skip GPIO2, 5, 6, 7, 8 */
		if (GPIO_bit(i) & 0x1e4)
			continue;

		gpio_desc[i].can_wakeup = 1;
		gpio_desc[i].mask = GPIO_bit(i);
	}

	gpio_desc[35].can_wakeup = 1;
	gpio_desc[35].mask = PWER_WE35;

	INIT_GPIO_DESC_MUXED(WEMUX3, 31);
	INIT_GPIO_DESC_MUXED(WEMUX3, 113);
	INIT_GPIO_DESC_MUXED(WEMUX2, 38);
	INIT_GPIO_DESC_MUXED(WEMUX2, 53);
	INIT_GPIO_DESC_MUXED(WEMUX2, 40);
	INIT_GPIO_DESC_MUXED(WEMUX2, 36);
}
#else
static inline void pxa27x_mfp_init(void) {}
#endif /* CONFIG_PXA27x */

#ifdef CONFIG_PM
static unsigned long saved_gafr[2][4];
static unsigned long saved_gpdr[4];
static unsigned long saved_pgsr[4];

static int pxa2xx_mfp_suspend(void)
{
	int i;

	/* set corresponding PGSR bit of those marked MFP_LPM_KEEP_OUTPUT */
	for (i = 0; i < pxa_last_gpio; i++) {
		if ((gpio_desc[i].config & MFP_LPM_KEEP_OUTPUT) &&
		    (GPDR(i) & GPIO_bit(i))) {
			if (GPLR(i) & GPIO_bit(i))
				PGSR(gpio_to_bank(i)) |= GPIO_bit(i);
			else
				PGSR(gpio_to_bank(i)) &= ~GPIO_bit(i);
		}
	}

	for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) {

		saved_gafr[0][i] = GAFR_L(i);
		saved_gafr[1][i] = GAFR_U(i);
		saved_gpdr[i] = GPDR(i * 32);
		saved_pgsr[i] = PGSR(i);

		GPDR(i * 32) = gpdr_lpm[i];
	}
	return 0;
}

static void pxa2xx_mfp_resume(void)
{
	int i;

	for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) {
		GAFR_L(i) = saved_gafr[0][i];
		GAFR_U(i) = saved_gafr[1][i];
		GPDR(i * 32) = saved_gpdr[i];
		PGSR(i) = saved_pgsr[i];
	}
	PSSR = PSSR_RDH | PSSR_PH;
}
#else
#define pxa2xx_mfp_suspend	NULL
#define pxa2xx_mfp_resume	NULL
#endif

struct syscore_ops pxa2xx_mfp_syscore_ops = {
	.suspend	= pxa2xx_mfp_suspend,
	.resume		= pxa2xx_mfp_resume,
};

static int __init pxa2xx_mfp_init(void)
{
	int i;

	if (!cpu_is_pxa2xx())
		return 0;

	if (cpu_is_pxa25x())
		pxa25x_mfp_init();

	if (cpu_is_pxa27x())
		pxa27x_mfp_init();

	/* clear RDH bit to enable GPIO receivers after reset/sleep exit */
	PSSR = PSSR_RDH;

	/* initialize gafr_run[], pgsr_lpm[] from existing values */
	for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++)
		gpdr_lpm[i] = GPDR(i * 32);

	return 0;
}
postcore_initcall(pxa2xx_mfp_init);
Commit	Line	Data
7facc2f9	1	/*
	2	* linux/arch/arm/mach-pxa/mfp-pxa2xx.c
	3	*
	4	* PXA2xx pin mux configuration support
	5	*
	6	* The GPIOs on PXA2xx can be configured as one of many alternate
	7	* functions, this is by concept samilar to the MFP configuration
	8	* on PXA3xx, what's more important, the low power pin state and
	9	* wakeup detection are also supported by the same framework.
	10	*
	11	* This program is free software; you can redistribute it and/or modify
	12	* it under the terms of the GNU General Public License version 2 as
	13	* published by the Free Software Foundation.
	14	*/
2f8163ba	15	#include <linux/gpio.h>
157d2644	16	#include <linux/gpio-pxa.h>
7facc2f9	17	#include <linux/module.h>
	18	#include <linux/kernel.h>
	19	#include <linux/init.h>
2eaa03b5	20	#include <linux/syscore_ops.h>
7facc2f9	21
a09e64fb RK	22	#include <mach/pxa2xx-regs.h>
a09e64fb RK	23	#include <mach/mfp-pxa2xx.h>
7facc2f9	24
	25	#include "generic.h"
	26
5a3d9651 EM	27	#define PGSR(x) __REG2(0x40F00020, (x) << 2)
	28	#define __GAFR(u, x) __REG2((u) ? 0x40E00058 : 0x40E00054, (x) << 3)
	29	#define GAFR_L(x) __GAFR(0, x)
	30	#define GAFR_U(x) __GAFR(1, x)
7facc2f9	31
157d2644 HZ	32	#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
	33	#define GPLR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5))
	34	#define GPDR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x0c)
	35
7facc2f9	36	#define PWER_WE35 (1 << 24)
7facc2f9	37
c0a596d6	38	struct gpio_desc {
7facc2f9	39	unsigned valid : 1;
	40	unsigned can_wakeup : 1;
	41	unsigned keypad_gpio : 1;
067455aa	42	unsigned dir_inverted : 1;
7facc2f9	43	unsigned int mask; /* bit mask in PWER or PKWR */
99687114	44	unsigned int mux_mask; /* bit mask of muxed gpio bits, 0 if no mux */
7facc2f9	45	unsigned long config;
c0a596d6	46	};
	47
	48	static struct gpio_desc gpio_desc[MFP_PIN_GPIO127 + 1];
7facc2f9	49
5a3d9651	50	static unsigned long gpdr_lpm[4];
566b450c	51
c0a596d6	52	static int __mfp_config_gpio(unsigned gpio, unsigned long c)
7facc2f9	53	{
7facc2f9	54	unsigned long gafr, mask = GPIO_bit(gpio);
5a3d9651 EM	55	int bank = gpio_to_bank(gpio);
	56	int uorl = !!(gpio & 0x10); /* GAFRx_U or GAFRx_L ? */
	57	int shft = (gpio & 0xf) << 1;
	58	int fn = MFP_AF(c);
067455aa	59	int is_out = (c & MFP_DIR_OUT) ? 1 : 0;
7facc2f9	60
7facc2f9	61	if (fn > 3)
	62	return -EINVAL;
	63
5a3d9651 EM	64	/* alternate function and direction at run-time */
	65	gafr = (uorl == 0) ? GAFR_L(bank) : GAFR_U(bank);
	66	gafr = (gafr & ~(0x3 << shft)) \| (fn << shft);
7facc2f9	67
5a3d9651 EM	68	if (uorl == 0)
	69	GAFR_L(bank) = gafr;
	70	else
	71	GAFR_U(bank) = gafr;
	72
067455aa	73	if (is_out ^ gpio_desc[gpio].dir_inverted)
7facc2f9	74	GPDR(gpio) \|= mask;
	75	else
	76	GPDR(gpio) &= ~mask;
	77
5a3d9651 EM	78	/* alternate function and direction at low power mode */
	79	switch (c & MFP_LPM_STATE_MASK) {
	80	case MFP_LPM_DRIVE_HIGH:
	81	PGSR(bank) \|= mask;
067455aa	82	is_out = 1;
5a3d9651 EM	83	break;
	84	case MFP_LPM_DRIVE_LOW:
	85	PGSR(bank) &= ~mask;
067455aa	86	is_out = 1;
5a3d9651	87	break;
1fe8c2bc	88	case MFP_LPM_INPUT:
5a3d9651 EM	89	case MFP_LPM_DEFAULT:
	90	break;
	91	default:
	92	/* warning and fall through, treat as MFP_LPM_DEFAULT */
	93	pr_warning("%s: GPIO%d: unsupported low power mode\n",
	94	__func__, gpio);
	95	break;
	96	}
	97
067455aa	98	if (is_out ^ gpio_desc[gpio].dir_inverted)
5a3d9651 EM	99	gpdr_lpm[bank] \|= mask;
	100	else
	101	gpdr_lpm[bank] &= ~mask;
7facc2f9	102
c0a596d6	103	/* give early warning if MFP_LPM_CAN_WAKEUP is set on the
	104	* configurations of those pins not able to wakeup
	105	*/
	106	if ((c & MFP_LPM_CAN_WAKEUP) && !gpio_desc[gpio].can_wakeup) {
7facc2f9	107	pr_warning("%s: GPIO%d unable to wakeup\n",
	108	__func__, gpio);
	109	return -EINVAL;
	110	}
	111
067455aa	112	if ((c & MFP_LPM_CAN_WAKEUP) && is_out) {
c0a596d6	113	pr_warning("%s: output GPIO%d unable to wakeup\n",
	114	__func__, gpio);
	115	return -EINVAL;
7facc2f9	116	}
	117
	118	return 0;
	119	}
	120
0fedb0ca EM	121	static inline int __mfp_validate(int mfp)
	122	{
	123	int gpio = mfp_to_gpio(mfp);
	124
	125	if ((mfp > MFP_PIN_GPIO127) \|\| !gpio_desc[gpio].valid) {
	126	pr_warning("%s: GPIO%d is invalid pin\n", __func__, gpio);
	127	return -1;
	128	}
	129
	130	return gpio;
	131	}
	132
7facc2f9	133	void pxa2xx_mfp_config(unsigned long *mfp_cfgs, int num)
	134	{
	135	unsigned long flags;
	136	unsigned long *c;
	137	int i, gpio;
	138
	139	for (i = 0, c = mfp_cfgs; i < num; i++, c++) {
	140
0fedb0ca EM	141	gpio = __mfp_validate(MFP_PIN(*c));
0fedb0ca EM	142	if (gpio < 0)
7facc2f9	143	continue;
7facc2f9	144
	145	local_irq_save(flags);
	146
	147	gpio_desc[gpio].config = *c;
	148	__mfp_config_gpio(gpio, *c);
	149
	150	local_irq_restore(flags);
	151	}
	152	}
	153
566b450c EM	154	void pxa2xx_mfp_set_lpm(int mfp, unsigned long lpm)
566b450c EM	155	{
5a3d9651	156	unsigned long flags, c;
566b450c EM	157	int gpio;
	158
	159	gpio = __mfp_validate(mfp);
	160	if (gpio < 0)
	161	return;
	162
	163	local_irq_save(flags);
5a3d9651 EM	164
	165	c = gpio_desc[gpio].config;
	166	c = (c & ~MFP_LPM_STATE_MASK) \| lpm;
	167	__mfp_config_gpio(gpio, c);
	168
566b450c EM	169	local_irq_restore(flags);
	170	}
	171
c0a596d6	172	int gpio_set_wake(unsigned int gpio, unsigned int on)
	173	{
	174	struct gpio_desc *d;
99687114	175	unsigned long c, mux_taken;
c0a596d6	176
	177	if (gpio > mfp_to_gpio(MFP_PIN_GPIO127))
	178	return -EINVAL;
	179
	180	d = &gpio_desc[gpio];
	181	c = d->config;
	182
	183	if (!d->valid)
	184	return -EINVAL;
	185
c09f431c EM	186	/* Allow keypad GPIOs to wakeup system when
	187	* configured as generic GPIOs.
	188	*/
	189	if (d->keypad_gpio && (MFP_AF(d->config) == 0) &&
	190	(d->config & MFP_LPM_CAN_WAKEUP)) {
	191	if (on)
	192	PKWR \|= d->mask;
	193	else
	194	PKWR &= ~d->mask;
	195	return 0;
	196	}
c0a596d6	197
99687114 RJ	198	mux_taken = (PWER & d->mux_mask) & (~d->mask);
	199	if (on && mux_taken)
	200	return -EBUSY;
	201
c0a596d6	202	if (d->can_wakeup && (c & MFP_LPM_CAN_WAKEUP)) {
c0a596d6	203	if (on) {
99687114	204	PWER = (PWER & ~d->mux_mask) \| d->mask;
c0a596d6	205
	206	if (c & MFP_LPM_EDGE_RISE)
	207	PRER \|= d->mask;
	208	else
	209	PRER &= ~d->mask;
	210
	211	if (c & MFP_LPM_EDGE_FALL)
	212	PFER \|= d->mask;
	213	else
	214	PFER &= ~d->mask;
	215	} else {
	216	PWER &= ~d->mask;
	217	PRER &= ~d->mask;
	218	PFER &= ~d->mask;
	219	}
	220	}
	221	return 0;
	222	}
	223
7facc2f9	224	#ifdef CONFIG_PXA25x
5a3d9651	225	static void __init pxa25x_mfp_init(void)
7facc2f9	226	{
	227	int i;
	228
ddd244dd	229	for (i = 0; i <= pxa_last_gpio; i++)
5a3d9651	230	gpio_desc[i].valid = 1;
7facc2f9	231
5a3d9651 EM	232	for (i = 0; i <= 15; i++) {
	233	gpio_desc[i].can_wakeup = 1;
	234	gpio_desc[i].mask = GPIO_bit(i);
7facc2f9	235	}
067455aa EM	236
	237	/* PXA26x has additional 4 GPIOs (86/87/88/89) which has the
	238	* direction bit inverted in GPDR2. See PXA26x DM 4.1.1.
	239	*/
	240	for (i = 86; i <= pxa_last_gpio; i++)
	241	gpio_desc[i].dir_inverted = 1;
7facc2f9	242	}
5a3d9651 EM	243	#else
5a3d9651 EM	244	static inline void pxa25x_mfp_init(void) {}
7facc2f9	245	#endif /* CONFIG_PXA25x */
	246
	247	#ifdef CONFIG_PXA27x
c0a596d6	248	static int pxa27x_pkwr_gpio[] = {
7facc2f9	249	13, 16, 17, 34, 36, 37, 38, 39, 90, 91, 93, 94,
	250	95, 96, 97, 98, 99, 100, 101, 102
	251	};
	252
c0a596d6	253	int keypad_set_wake(unsigned int on)
	254	{
	255	unsigned int i, gpio, mask = 0;
c09f431c	256	struct gpio_desc *d;
c0a596d6	257
	258	for (i = 0; i < ARRAY_SIZE(pxa27x_pkwr_gpio); i++) {
	259
	260	gpio = pxa27x_pkwr_gpio[i];
c09f431c	261	d = &gpio_desc[gpio];
c0a596d6	262
c09f431c EM	263	/* skip if configured as generic GPIO */
	264	if (MFP_AF(d->config) == 0)
	265	continue;
	266
	267	if (d->config & MFP_LPM_CAN_WAKEUP)
c0a596d6	268	mask \|= gpio_desc[gpio].mask;
	269	}
	270
c09f431c EM	271	if (on)
	272	PKWR \|= mask;
	273	else
	274	PKWR &= ~mask;
c0a596d6	275	return 0;
	276	}
	277
99687114 RJ	278	#define PWER_WEMUX2_GPIO38 (1 << 16)
	279	#define PWER_WEMUX2_GPIO53 (2 << 16)
	280	#define PWER_WEMUX2_GPIO40 (3 << 16)
	281	#define PWER_WEMUX2_GPIO36 (4 << 16)
	282	#define PWER_WEMUX2_MASK (7 << 16)
	283	#define PWER_WEMUX3_GPIO31 (1 << 19)
	284	#define PWER_WEMUX3_GPIO113 (2 << 19)
	285	#define PWER_WEMUX3_MASK (3 << 19)
	286
	287	#define INIT_GPIO_DESC_MUXED(mux, gpio) \
	288	do { \
	289	gpio_desc[(gpio)].can_wakeup = 1; \
	290	gpio_desc[(gpio)].mask = PWER_ ## mux ## _GPIO ##gpio; \
	291	gpio_desc[(gpio)].mux_mask = PWER_ ## mux ## _MASK; \
	292	} while (0)
	293
5a3d9651	294	static void __init pxa27x_mfp_init(void)
7facc2f9	295	{
	296	int i, gpio;
	297
ddd244dd	298	for (i = 0; i <= pxa_last_gpio; i++) {
5a3d9651 EM	299	/* skip GPIO2, 5, 6, 7, 8, they are not
	300	* valid pins allow configuration
	301	*/
	302	if (i == 2 \|\| i == 5 \|\| i == 6 \|\| i == 7 \|\| i == 8)
	303	continue;
7facc2f9	304
5a3d9651 EM	305	gpio_desc[i].valid = 1;
5a3d9651 EM	306	}
7facc2f9	307
5a3d9651 EM	308	/* Keypad GPIOs */
	309	for (i = 0; i < ARRAY_SIZE(pxa27x_pkwr_gpio); i++) {
	310	gpio = pxa27x_pkwr_gpio[i];
	311	gpio_desc[gpio].can_wakeup = 1;
	312	gpio_desc[gpio].keypad_gpio = 1;
	313	gpio_desc[gpio].mask = 1 << i;
	314	}
7facc2f9	315
5a3d9651 EM	316	/* Overwrite GPIO13 as a PWER wakeup source */
	317	for (i = 0; i <= 15; i++) {
	318	/* skip GPIO2, 5, 6, 7, 8 */
	319	if (GPIO_bit(i) & 0x1e4)
	320	continue;
7facc2f9	321
5a3d9651 EM	322	gpio_desc[i].can_wakeup = 1;
	323	gpio_desc[i].mask = GPIO_bit(i);
	324	}
	325
	326	gpio_desc[35].can_wakeup = 1;
	327	gpio_desc[35].mask = PWER_WE35;
	328
99687114 RJ	329	INIT_GPIO_DESC_MUXED(WEMUX3, 31);
	330	INIT_GPIO_DESC_MUXED(WEMUX3, 113);
	331	INIT_GPIO_DESC_MUXED(WEMUX2, 38);
	332	INIT_GPIO_DESC_MUXED(WEMUX2, 53);
	333	INIT_GPIO_DESC_MUXED(WEMUX2, 40);
	334	INIT_GPIO_DESC_MUXED(WEMUX2, 36);
5a3d9651 EM	335	}
	336	#else
	337	static inline void pxa27x_mfp_init(void) {}
	338	#endif /* CONFIG_PXA27x */
	339
	340	#ifdef CONFIG_PM
	341	static unsigned long saved_gafr[2][4];
	342	static unsigned long saved_gpdr[4];
818bc814	343	static unsigned long saved_pgsr[4];
5a3d9651	344
2eaa03b5	345	static int pxa2xx_mfp_suspend(void)
5a3d9651 EM	346	{
	347	int i;
	348
1106143d EM	349	/* set corresponding PGSR bit of those marked MFP_LPM_KEEP_OUTPUT */
	350	for (i = 0; i < pxa_last_gpio; i++) {
	351	if ((gpio_desc[i].config & MFP_LPM_KEEP_OUTPUT) &&
	352	(GPDR(i) & GPIO_bit(i))) {
	353	if (GPLR(i) & GPIO_bit(i))
beb0c9b0	354	PGSR(gpio_to_bank(i)) \|= GPIO_bit(i);
1106143d	355	else
beb0c9b0	356	PGSR(gpio_to_bank(i)) &= ~GPIO_bit(i);
1106143d EM	357	}
	358	}
	359
ddd244dd	360	for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) {
7facc2f9	361
5a3d9651 EM	362	saved_gafr[0][i] = GAFR_L(i);
	363	saved_gafr[1][i] = GAFR_U(i);
	364	saved_gpdr[i] = GPDR(i * 32);
818bc814	365	saved_pgsr[i] = PGSR(i);
5a3d9651 EM	366
5a3d9651 EM	367	GPDR(i * 32) = gpdr_lpm[i];
7facc2f9	368	}
5a3d9651 EM	369	return 0;
5a3d9651 EM	370	}
7facc2f9	371
2eaa03b5	372	static void pxa2xx_mfp_resume(void)
5a3d9651 EM	373	{
	374	int i;
	375
ddd244dd	376	for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) {
5a3d9651 EM	377	GAFR_L(i) = saved_gafr[0][i];
	378	GAFR_U(i) = saved_gafr[1][i];
	379	GPDR(i * 32) = saved_gpdr[i];
818bc814	380	PGSR(i) = saved_pgsr[i];
5a3d9651 EM	381	}
5a3d9651 EM	382	PSSR = PSSR_RDH \| PSSR_PH;
7facc2f9	383	}
5a3d9651 EM	384	#else
	385	#define pxa2xx_mfp_suspend NULL
	386	#define pxa2xx_mfp_resume NULL
	387	#endif
	388
2eaa03b5	389	struct syscore_ops pxa2xx_mfp_syscore_ops = {
5a3d9651 EM	390	.suspend = pxa2xx_mfp_suspend,
	391	.resume = pxa2xx_mfp_resume,
	392	};
	393
	394	static int __init pxa2xx_mfp_init(void)
	395	{
	396	int i;
	397
e7f3c600 EM	398	if (!cpu_is_pxa2xx())
	399	return 0;
	400
5a3d9651 EM	401	if (cpu_is_pxa25x())
	402	pxa25x_mfp_init();
	403
	404	if (cpu_is_pxa27x())
	405	pxa27x_mfp_init();
	406
866bd435 TC	407	/* clear RDH bit to enable GPIO receivers after reset/sleep exit */
	408	PSSR = PSSR_RDH;
	409
5a3d9651	410	/* initialize gafr_run[], pgsr_lpm[] from existing values */
ddd244dd	411	for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++)
5a3d9651 EM	412	gpdr_lpm[i] = GPDR(i * 32);
5a3d9651 EM	413
2eaa03b5	414	return 0;
5a3d9651 EM	415	}
5a3d9651 EM	416	postcore_initcall(pxa2xx_mfp_init);