Merge branch 'oprofile-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[deliverable/linux.git] / arch / arm / mach-pxa / mfp-pxa2xx.c
CommitLineData
7facc2f9 1/*
2 * linux/arch/arm/mach-pxa/mfp-pxa2xx.c
3 *
4 * PXA2xx pin mux configuration support
5 *
6 * The GPIOs on PXA2xx can be configured as one of many alternate
7 * functions, this is by concept samilar to the MFP configuration
8 * on PXA3xx, what's more important, the low power pin state and
9 * wakeup detection are also supported by the same framework.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include <linux/module.h>
17#include <linux/kernel.h>
18#include <linux/init.h>
19#include <linux/sysdev.h>
20
da065a0b 21#include <mach/gpio.h>
a09e64fb
RK
22#include <mach/pxa2xx-regs.h>
23#include <mach/mfp-pxa2xx.h>
7facc2f9 24
25#include "generic.h"
26
5a3d9651
EM
27#define PGSR(x) __REG2(0x40F00020, (x) << 2)
28#define __GAFR(u, x) __REG2((u) ? 0x40E00058 : 0x40E00054, (x) << 3)
29#define GAFR_L(x) __GAFR(0, x)
30#define GAFR_U(x) __GAFR(1, x)
7facc2f9 31
32#define PWER_WE35 (1 << 24)
33
c0a596d6 34struct gpio_desc {
7facc2f9 35 unsigned valid : 1;
36 unsigned can_wakeup : 1;
37 unsigned keypad_gpio : 1;
067455aa 38 unsigned dir_inverted : 1;
7facc2f9 39 unsigned int mask; /* bit mask in PWER or PKWR */
99687114 40 unsigned int mux_mask; /* bit mask of muxed gpio bits, 0 if no mux */
7facc2f9 41 unsigned long config;
c0a596d6 42};
43
44static struct gpio_desc gpio_desc[MFP_PIN_GPIO127 + 1];
7facc2f9 45
5a3d9651 46static unsigned long gpdr_lpm[4];
566b450c 47
c0a596d6 48static int __mfp_config_gpio(unsigned gpio, unsigned long c)
7facc2f9 49{
50 unsigned long gafr, mask = GPIO_bit(gpio);
5a3d9651
EM
51 int bank = gpio_to_bank(gpio);
52 int uorl = !!(gpio & 0x10); /* GAFRx_U or GAFRx_L ? */
53 int shft = (gpio & 0xf) << 1;
54 int fn = MFP_AF(c);
067455aa 55 int is_out = (c & MFP_DIR_OUT) ? 1 : 0;
7facc2f9 56
7facc2f9 57 if (fn > 3)
58 return -EINVAL;
59
5a3d9651
EM
60 /* alternate function and direction at run-time */
61 gafr = (uorl == 0) ? GAFR_L(bank) : GAFR_U(bank);
62 gafr = (gafr & ~(0x3 << shft)) | (fn << shft);
7facc2f9 63
5a3d9651
EM
64 if (uorl == 0)
65 GAFR_L(bank) = gafr;
66 else
67 GAFR_U(bank) = gafr;
68
067455aa 69 if (is_out ^ gpio_desc[gpio].dir_inverted)
7facc2f9 70 GPDR(gpio) |= mask;
71 else
72 GPDR(gpio) &= ~mask;
73
5a3d9651
EM
74 /* alternate function and direction at low power mode */
75 switch (c & MFP_LPM_STATE_MASK) {
76 case MFP_LPM_DRIVE_HIGH:
77 PGSR(bank) |= mask;
067455aa 78 is_out = 1;
5a3d9651
EM
79 break;
80 case MFP_LPM_DRIVE_LOW:
81 PGSR(bank) &= ~mask;
067455aa 82 is_out = 1;
5a3d9651
EM
83 break;
84 case MFP_LPM_DEFAULT:
85 break;
86 default:
87 /* warning and fall through, treat as MFP_LPM_DEFAULT */
88 pr_warning("%s: GPIO%d: unsupported low power mode\n",
89 __func__, gpio);
90 break;
91 }
92
067455aa 93 if (is_out ^ gpio_desc[gpio].dir_inverted)
5a3d9651
EM
94 gpdr_lpm[bank] |= mask;
95 else
96 gpdr_lpm[bank] &= ~mask;
7facc2f9 97
c0a596d6 98 /* give early warning if MFP_LPM_CAN_WAKEUP is set on the
99 * configurations of those pins not able to wakeup
100 */
101 if ((c & MFP_LPM_CAN_WAKEUP) && !gpio_desc[gpio].can_wakeup) {
7facc2f9 102 pr_warning("%s: GPIO%d unable to wakeup\n",
103 __func__, gpio);
104 return -EINVAL;
105 }
106
067455aa 107 if ((c & MFP_LPM_CAN_WAKEUP) && is_out) {
c0a596d6 108 pr_warning("%s: output GPIO%d unable to wakeup\n",
109 __func__, gpio);
110 return -EINVAL;
7facc2f9 111 }
112
113 return 0;
114}
115
0fedb0ca
EM
116static inline int __mfp_validate(int mfp)
117{
118 int gpio = mfp_to_gpio(mfp);
119
120 if ((mfp > MFP_PIN_GPIO127) || !gpio_desc[gpio].valid) {
121 pr_warning("%s: GPIO%d is invalid pin\n", __func__, gpio);
122 return -1;
123 }
124
125 return gpio;
126}
127
7facc2f9 128void pxa2xx_mfp_config(unsigned long *mfp_cfgs, int num)
129{
130 unsigned long flags;
131 unsigned long *c;
132 int i, gpio;
133
134 for (i = 0, c = mfp_cfgs; i < num; i++, c++) {
135
0fedb0ca
EM
136 gpio = __mfp_validate(MFP_PIN(*c));
137 if (gpio < 0)
7facc2f9 138 continue;
7facc2f9 139
140 local_irq_save(flags);
141
142 gpio_desc[gpio].config = *c;
143 __mfp_config_gpio(gpio, *c);
144
145 local_irq_restore(flags);
146 }
147}
148
566b450c
EM
149void pxa2xx_mfp_set_lpm(int mfp, unsigned long lpm)
150{
5a3d9651 151 unsigned long flags, c;
566b450c
EM
152 int gpio;
153
154 gpio = __mfp_validate(mfp);
155 if (gpio < 0)
156 return;
157
158 local_irq_save(flags);
5a3d9651
EM
159
160 c = gpio_desc[gpio].config;
161 c = (c & ~MFP_LPM_STATE_MASK) | lpm;
162 __mfp_config_gpio(gpio, c);
163
566b450c
EM
164 local_irq_restore(flags);
165}
166
c0a596d6 167int gpio_set_wake(unsigned int gpio, unsigned int on)
168{
169 struct gpio_desc *d;
99687114 170 unsigned long c, mux_taken;
c0a596d6 171
172 if (gpio > mfp_to_gpio(MFP_PIN_GPIO127))
173 return -EINVAL;
174
175 d = &gpio_desc[gpio];
176 c = d->config;
177
178 if (!d->valid)
179 return -EINVAL;
180
181 if (d->keypad_gpio)
182 return -EINVAL;
183
99687114
RJ
184 mux_taken = (PWER & d->mux_mask) & (~d->mask);
185 if (on && mux_taken)
186 return -EBUSY;
187
c0a596d6 188 if (d->can_wakeup && (c & MFP_LPM_CAN_WAKEUP)) {
189 if (on) {
99687114 190 PWER = (PWER & ~d->mux_mask) | d->mask;
c0a596d6 191
192 if (c & MFP_LPM_EDGE_RISE)
193 PRER |= d->mask;
194 else
195 PRER &= ~d->mask;
196
197 if (c & MFP_LPM_EDGE_FALL)
198 PFER |= d->mask;
199 else
200 PFER &= ~d->mask;
201 } else {
202 PWER &= ~d->mask;
203 PRER &= ~d->mask;
204 PFER &= ~d->mask;
205 }
206 }
207 return 0;
208}
209
7facc2f9 210#ifdef CONFIG_PXA25x
5a3d9651 211static void __init pxa25x_mfp_init(void)
7facc2f9 212{
213 int i;
214
ddd244dd 215 for (i = 0; i <= pxa_last_gpio; i++)
5a3d9651 216 gpio_desc[i].valid = 1;
7facc2f9 217
5a3d9651
EM
218 for (i = 0; i <= 15; i++) {
219 gpio_desc[i].can_wakeup = 1;
220 gpio_desc[i].mask = GPIO_bit(i);
7facc2f9 221 }
067455aa
EM
222
223 /* PXA26x has additional 4 GPIOs (86/87/88/89) which has the
224 * direction bit inverted in GPDR2. See PXA26x DM 4.1.1.
225 */
226 for (i = 86; i <= pxa_last_gpio; i++)
227 gpio_desc[i].dir_inverted = 1;
7facc2f9 228}
5a3d9651
EM
229#else
230static inline void pxa25x_mfp_init(void) {}
7facc2f9 231#endif /* CONFIG_PXA25x */
232
233#ifdef CONFIG_PXA27x
c0a596d6 234static int pxa27x_pkwr_gpio[] = {
7facc2f9 235 13, 16, 17, 34, 36, 37, 38, 39, 90, 91, 93, 94,
236 95, 96, 97, 98, 99, 100, 101, 102
237};
238
c0a596d6 239int keypad_set_wake(unsigned int on)
240{
241 unsigned int i, gpio, mask = 0;
242
243 if (!on) {
244 PKWR = 0;
245 return 0;
246 }
247
248 for (i = 0; i < ARRAY_SIZE(pxa27x_pkwr_gpio); i++) {
249
250 gpio = pxa27x_pkwr_gpio[i];
251
252 if (gpio_desc[gpio].config & MFP_LPM_CAN_WAKEUP)
253 mask |= gpio_desc[gpio].mask;
254 }
255
256 PKWR = mask;
257 return 0;
258}
259
99687114
RJ
260#define PWER_WEMUX2_GPIO38 (1 << 16)
261#define PWER_WEMUX2_GPIO53 (2 << 16)
262#define PWER_WEMUX2_GPIO40 (3 << 16)
263#define PWER_WEMUX2_GPIO36 (4 << 16)
264#define PWER_WEMUX2_MASK (7 << 16)
265#define PWER_WEMUX3_GPIO31 (1 << 19)
266#define PWER_WEMUX3_GPIO113 (2 << 19)
267#define PWER_WEMUX3_MASK (3 << 19)
268
269#define INIT_GPIO_DESC_MUXED(mux, gpio) \
270do { \
271 gpio_desc[(gpio)].can_wakeup = 1; \
272 gpio_desc[(gpio)].mask = PWER_ ## mux ## _GPIO ##gpio; \
273 gpio_desc[(gpio)].mux_mask = PWER_ ## mux ## _MASK; \
274} while (0)
275
5a3d9651 276static void __init pxa27x_mfp_init(void)
7facc2f9 277{
278 int i, gpio;
279
ddd244dd 280 for (i = 0; i <= pxa_last_gpio; i++) {
5a3d9651
EM
281 /* skip GPIO2, 5, 6, 7, 8, they are not
282 * valid pins allow configuration
283 */
284 if (i == 2 || i == 5 || i == 6 || i == 7 || i == 8)
285 continue;
7facc2f9 286
5a3d9651
EM
287 gpio_desc[i].valid = 1;
288 }
7facc2f9 289
5a3d9651
EM
290 /* Keypad GPIOs */
291 for (i = 0; i < ARRAY_SIZE(pxa27x_pkwr_gpio); i++) {
292 gpio = pxa27x_pkwr_gpio[i];
293 gpio_desc[gpio].can_wakeup = 1;
294 gpio_desc[gpio].keypad_gpio = 1;
295 gpio_desc[gpio].mask = 1 << i;
296 }
7facc2f9 297
5a3d9651
EM
298 /* Overwrite GPIO13 as a PWER wakeup source */
299 for (i = 0; i <= 15; i++) {
300 /* skip GPIO2, 5, 6, 7, 8 */
301 if (GPIO_bit(i) & 0x1e4)
302 continue;
7facc2f9 303
5a3d9651
EM
304 gpio_desc[i].can_wakeup = 1;
305 gpio_desc[i].mask = GPIO_bit(i);
306 }
307
308 gpio_desc[35].can_wakeup = 1;
309 gpio_desc[35].mask = PWER_WE35;
310
99687114
RJ
311 INIT_GPIO_DESC_MUXED(WEMUX3, 31);
312 INIT_GPIO_DESC_MUXED(WEMUX3, 113);
313 INIT_GPIO_DESC_MUXED(WEMUX2, 38);
314 INIT_GPIO_DESC_MUXED(WEMUX2, 53);
315 INIT_GPIO_DESC_MUXED(WEMUX2, 40);
316 INIT_GPIO_DESC_MUXED(WEMUX2, 36);
5a3d9651
EM
317}
318#else
319static inline void pxa27x_mfp_init(void) {}
320#endif /* CONFIG_PXA27x */
321
322#ifdef CONFIG_PM
323static unsigned long saved_gafr[2][4];
324static unsigned long saved_gpdr[4];
818bc814 325static unsigned long saved_pgsr[4];
5a3d9651
EM
326
327static int pxa2xx_mfp_suspend(struct sys_device *d, pm_message_t state)
328{
329 int i;
330
ddd244dd 331 for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) {
7facc2f9 332
5a3d9651
EM
333 saved_gafr[0][i] = GAFR_L(i);
334 saved_gafr[1][i] = GAFR_U(i);
335 saved_gpdr[i] = GPDR(i * 32);
818bc814 336 saved_pgsr[i] = PGSR(i);
5a3d9651
EM
337
338 GPDR(i * 32) = gpdr_lpm[i];
7facc2f9 339 }
5a3d9651
EM
340 return 0;
341}
7facc2f9 342
5a3d9651
EM
343static int pxa2xx_mfp_resume(struct sys_device *d)
344{
345 int i;
346
ddd244dd 347 for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) {
5a3d9651
EM
348 GAFR_L(i) = saved_gafr[0][i];
349 GAFR_U(i) = saved_gafr[1][i];
350 GPDR(i * 32) = saved_gpdr[i];
818bc814 351 PGSR(i) = saved_pgsr[i];
5a3d9651
EM
352 }
353 PSSR = PSSR_RDH | PSSR_PH;
7facc2f9 354 return 0;
355}
5a3d9651
EM
356#else
357#define pxa2xx_mfp_suspend NULL
358#define pxa2xx_mfp_resume NULL
359#endif
360
361struct sysdev_class pxa2xx_mfp_sysclass = {
362 .name = "mfp",
363 .suspend = pxa2xx_mfp_suspend,
364 .resume = pxa2xx_mfp_resume,
365};
366
367static int __init pxa2xx_mfp_init(void)
368{
369 int i;
370
e7f3c600
EM
371 if (!cpu_is_pxa2xx())
372 return 0;
373
5a3d9651
EM
374 if (cpu_is_pxa25x())
375 pxa25x_mfp_init();
376
377 if (cpu_is_pxa27x())
378 pxa27x_mfp_init();
379
866bd435
TC
380 /* clear RDH bit to enable GPIO receivers after reset/sleep exit */
381 PSSR = PSSR_RDH;
382
5a3d9651 383 /* initialize gafr_run[], pgsr_lpm[] from existing values */
ddd244dd 384 for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++)
5a3d9651
EM
385 gpdr_lpm[i] = GPDR(i * 32);
386
387 return sysdev_class_register(&pxa2xx_mfp_sysclass);
388}
389postcore_initcall(pxa2xx_mfp_init);
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