Merge branches 'irq-urgent-for-linus' and 'smp-hotplug-for-linus' of git://git.kernel...
[deliverable/linux.git] / arch / arm / mach-pxa / pcm990-baseboard.c
CommitLineData
2e927b76
RS
1/*
2 * arch/arm/mach-pxa/pcm990-baseboard.c
3 * Support for the Phytec phyCORE-PXA270 Development Platform (PCM-990).
4 *
5 * Refer
6 * http://www.phytec.com/products/rdk/ARM-XScale/phyCORE-XScale-PXA270.html
7 * for additional hardware info
8 *
9 * Author: Juergen Kilb
10 * Created: April 05, 2005
11 * Copyright: Phytec Messtechnik GmbH
12 * e-Mail: armlinux@phytec.de
13 *
14 * based on Intel Mainstone Board
15 *
16 * Copyright 2007 Juergen Beisert @ Pengutronix (j.beisert@pengutronix.de)
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License version 2 as
20 * published by the Free Software Foundation.
21 */
2f8163ba 22#include <linux/gpio.h>
2e927b76
RS
23#include <linux/irq.h>
24#include <linux/platform_device.h>
58762e77 25#include <linux/i2c.h>
b459396e 26#include <linux/i2c/pxa-i2c.h>
c0f7edb3 27#include <linux/pwm_backlight.h>
58762e77
GL
28
29#include <media/soc_camera.h>
30
a09e64fb 31#include <mach/camera.h>
2e927b76 32#include <asm/mach/map.h>
51c62982 33#include <mach/pxa27x.h>
a09e64fb
RK
34#include <mach/audio.h>
35#include <mach/mmc.h>
36#include <mach/ohci.h>
37#include <mach/pcm990_baseboard.h>
38#include <mach/pxafb.h>
c0f7edb3
GL
39
40#include "devices.h"
6a566fbb
GL
41#include "generic.h"
42
43static unsigned long pcm990_pin_config[] __initdata = {
44 /* MMC */
45 GPIO32_MMC_CLK,
46 GPIO112_MMC_CMD,
47 GPIO92_MMC_DAT_0,
48 GPIO109_MMC_DAT_1,
49 GPIO110_MMC_DAT_2,
50 GPIO111_MMC_DAT_3,
51 /* USB */
52 GPIO88_USBH1_PWR,
53 GPIO89_USBH1_PEN,
54 /* PWM0 */
55 GPIO16_PWM0_OUT,
6f584cfa
EM
56
57 /* I2C */
58 GPIO117_I2C_SCL,
59 GPIO118_I2C_SDA,
c11b6a42
EM
60
61 /* AC97 */
62 GPIO28_AC97_BITCLK,
63 GPIO29_AC97_SDATA_IN_0,
64 GPIO30_AC97_SDATA_OUT,
65 GPIO31_AC97_SYNC,
6a566fbb 66};
c0f7edb3 67
b298322b
SH
68static void __iomem *pcm990_cpld_base;
69
70static u8 pcm990_cpld_readb(unsigned int reg)
71{
72 return readb(pcm990_cpld_base + reg);
73}
74
75static void pcm990_cpld_writeb(u8 value, unsigned int reg)
76{
77 writeb(value, pcm990_cpld_base + reg);
78}
79
c0f7edb3
GL
80/*
81 * pcm990_lcd_power - control power supply to the LCD
82 * @on: 0 = switch off, 1 = switch on
83 *
84 * Called by the pxafb driver
85 */
86#ifndef CONFIG_PCM990_DISPLAY_NONE
87static void pcm990_lcd_power(int on, struct fb_var_screeninfo *var)
88{
89 if (on) {
90 /* enable LCD-Latches
91 * power on LCD
92 */
b298322b
SH
93 pcm990_cpld_writeb(PCM990_CTRL_LCDPWR + PCM990_CTRL_LCDON,
94 PCM990_CTRL_REG3);
c0f7edb3
GL
95 } else {
96 /* disable LCD-Latches
97 * power off LCD
98 */
b298322b 99 pcm990_cpld_writeb(0, PCM990_CTRL_REG3);
c0f7edb3
GL
100 }
101}
102#endif
103
104#if defined(CONFIG_PCM990_DISPLAY_SHARP)
105static struct pxafb_mode_info fb_info_sharp_lq084v1dg21 = {
106 .pixclock = 28000,
107 .xres = 640,
108 .yres = 480,
109 .bpp = 16,
110 .hsync_len = 20,
111 .left_margin = 103,
112 .right_margin = 47,
113 .vsync_len = 6,
114 .upper_margin = 28,
115 .lower_margin = 5,
116 .sync = 0,
117 .cmap_greyscale = 0,
118};
119
120static struct pxafb_mach_info pcm990_fbinfo __initdata = {
121 .modes = &fb_info_sharp_lq084v1dg21,
122 .num_modes = 1,
9587319b 123 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
c0f7edb3
GL
124 .pxafb_lcd_power = pcm990_lcd_power,
125};
126#elif defined(CONFIG_PCM990_DISPLAY_NEC)
127struct pxafb_mode_info fb_info_nec_nl6448bc20_18d = {
128 .pixclock = 39720,
129 .xres = 640,
130 .yres = 480,
131 .bpp = 16,
132 .hsync_len = 32,
133 .left_margin = 16,
134 .right_margin = 48,
135 .vsync_len = 2,
136 .upper_margin = 12,
137 .lower_margin = 17,
138 .sync = 0,
139 .cmap_greyscale = 0,
140};
141
142static struct pxafb_mach_info pcm990_fbinfo __initdata = {
143 .modes = &fb_info_nec_nl6448bc20_18d,
144 .num_modes = 1,
9587319b 145 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
c0f7edb3
GL
146 .pxafb_lcd_power = pcm990_lcd_power,
147};
148#endif
149
150static struct platform_pwm_backlight_data pcm990_backlight_data = {
151 .pwm_id = 0,
152 .max_brightness = 1023,
153 .dft_brightness = 1023,
154 .pwm_period_ns = 78770,
155};
156
157static struct platform_device pcm990_backlight_device = {
158 .name = "pwm-backlight",
159 .dev = {
160 .parent = &pxa27x_device_pwm0.dev,
161 .platform_data = &pcm990_backlight_data,
162 },
163};
2e927b76
RS
164
165/*
c0f7edb3 166 * The PCM-990 development baseboard uses PCM-027's hardware in the
2e927b76
RS
167 * following way:
168 *
169 * - LCD support is in use
170 * - GPIO16 is output for back light on/off with PWM
171 * - GPIO58 ... GPIO73 are outputs for display data
172 * - GPIO74 is output output for LCDFCLK
173 * - GPIO75 is output for LCDLCLK
174 * - GPIO76 is output for LCDPCLK
175 * - GPIO77 is output for LCDBIAS
176 * - MMC support is in use
177 * - GPIO32 is output for MMCCLK
178 * - GPIO92 is MMDAT0
179 * - GPIO109 is MMDAT1
180 * - GPIO110 is MMCS0
181 * - GPIO111 is MMCS1
182 * - GPIO112 is MMCMD
183 * - IDE/CF card is in use
184 * - GPIO48 is output /POE
185 * - GPIO49 is output /PWE
186 * - GPIO50 is output /PIOR
187 * - GPIO51 is output /PIOW
188 * - GPIO54 is output /PCE2
189 * - GPIO55 is output /PREG
190 * - GPIO56 is input /PWAIT
191 * - GPIO57 is output /PIOS16
192 * - GPIO79 is output PSKTSEL
193 * - GPIO85 is output /PCE1
194 * - FFUART is in use
195 * - GPIO34 is input FFRXD
196 * - GPIO35 is input FFCTS
197 * - GPIO36 is input FFDCD
198 * - GPIO37 is input FFDSR
199 * - GPIO38 is input FFRI
200 * - GPIO39 is output FFTXD
201 * - GPIO40 is output FFDTR
202 * - GPIO41 is output FFRTS
203 * - BTUART is in use
204 * - GPIO42 is input BTRXD
205 * - GPIO43 is output BTTXD
206 * - GPIO44 is input BTCTS
207 * - GPIO45 is output BTRTS
208 * - IRUART is in use
209 * - GPIO46 is input STDRXD
210 * - GPIO47 is output STDTXD
211 * - AC97 is in use*)
212 * - GPIO28 is input AC97CLK
213 * - GPIO29 is input AC97DatIn
214 * - GPIO30 is output AC97DatO
215 * - GPIO31 is output AC97SYNC
216 * - GPIO113 is output AC97_RESET
217 * - SSP is in use
218 * - GPIO23 is output SSPSCLK
219 * - GPIO24 is output chip select to Max7301
220 * - GPIO25 is output SSPTXD
221 * - GPIO26 is input SSPRXD
222 * - GPIO27 is input for Max7301 IRQ
223 * - GPIO53 is input SSPSYSCLK
224 * - SSP3 is in use
225 * - GPIO81 is output SSPTXD3
226 * - GPIO82 is input SSPRXD3
227 * - GPIO83 is output SSPSFRM
228 * - GPIO84 is output SSPCLK3
229 *
230 * Otherwise claimed GPIOs:
231 * GPIO1 -> IRQ from user switch
232 * GPIO9 -> IRQ from power management
233 * GPIO10 -> IRQ from WML9712 AC97 controller
234 * GPIO11 -> IRQ from IDE controller
235 * GPIO12 -> IRQ from CF controller
236 * GPIO13 -> IRQ from CF controller
237 * GPIO14 -> GPIO free
238 * GPIO15 -> /CS1 selects baseboard's Control CPLD (U7, 16 bit wide data path)
239 * GPIO19 -> GPIO free
240 * GPIO20 -> /SDCS2
241 * GPIO21 -> /CS3 PC card socket select
242 * GPIO33 -> /CS5 network controller select
243 * GPIO78 -> /CS2 (16 bit wide data path)
244 * GPIO80 -> /CS4 (16 bit wide data path)
245 * GPIO86 -> GPIO free
246 * GPIO87 -> GPIO free
247 * GPIO90 -> LED0 on CPU module
248 * GPIO91 -> LED1 on CPI module
249 * GPIO117 -> SCL
250 * GPIO118 -> SDA
251 */
252
253static unsigned long pcm990_irq_enabled;
254
a3f4c927 255static void pcm990_mask_ack_irq(struct irq_data *d)
2e927b76 256{
a3f4c927 257 int pcm990_irq = (d->irq - PCM027_IRQ(0));
b298322b
SH
258
259 pcm990_irq_enabled &= ~(1 << pcm990_irq);
260
261 pcm990_cpld_writeb(pcm990_irq_enabled, PCM990_CTRL_INTMSKENA);
2e927b76
RS
262}
263
a3f4c927 264static void pcm990_unmask_irq(struct irq_data *d)
2e927b76 265{
a3f4c927 266 int pcm990_irq = (d->irq - PCM027_IRQ(0));
b298322b
SH
267 u8 val;
268
2e927b76 269 /* the irq can be acknowledged only if deasserted, so it's done here */
b298322b
SH
270
271 pcm990_irq_enabled |= (1 << pcm990_irq);
272
273 val = pcm990_cpld_readb(PCM990_CTRL_INTSETCLR);
274 val |= 1 << pcm990_irq;
275 pcm990_cpld_writeb(val, PCM990_CTRL_INTSETCLR);
276
277 pcm990_cpld_writeb(pcm990_irq_enabled, PCM990_CTRL_INTMSKENA);
2e927b76
RS
278}
279
280static struct irq_chip pcm990_irq_chip = {
a3f4c927
LB
281 .irq_mask_ack = pcm990_mask_ack_irq,
282 .irq_unmask = pcm990_unmask_irq,
2e927b76
RS
283};
284
285static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc)
286{
b298322b
SH
287 unsigned long pending;
288
289 pending = ~pcm990_cpld_readb(PCM990_CTRL_INTSETCLR);
290 pending &= pcm990_irq_enabled;
2e927b76
RS
291
292 do {
a3f4c927
LB
293 /* clear our parent IRQ */
294 desc->irq_data.chip->irq_ack(&desc->irq_data);
2e927b76
RS
295 if (likely(pending)) {
296 irq = PCM027_IRQ(0) + __ffs(pending);
d8aa0251 297 generic_handle_irq(irq);
2e927b76 298 }
b298322b
SH
299 pending = ~pcm990_cpld_readb(PCM990_CTRL_INTSETCLR);
300 pending &= pcm990_irq_enabled;
2e927b76
RS
301 } while (pending);
302}
303
304static void __init pcm990_init_irq(void)
305{
306 int irq;
307
308 /* setup extra PCM990 irqs */
309 for (irq = PCM027_IRQ(0); irq <= PCM027_IRQ(3); irq++) {
f38c02f3
TG
310 irq_set_chip_and_handler(irq, &pcm990_irq_chip,
311 handle_level_irq);
2e927b76
RS
312 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
313 }
314
b298322b
SH
315 /* disable all Interrupts */
316 pcm990_cpld_writeb(0x0, PCM990_CTRL_INTMSKENA);
317 pcm990_cpld_writeb(0xff, PCM990_CTRL_INTSETCLR);
2e927b76 318
6845664a
TG
319 irq_set_chained_handler(PCM990_CTRL_INT_IRQ, pcm990_irq_handler);
320 irq_set_irq_type(PCM990_CTRL_INT_IRQ, PCM990_CTRL_INT_IRQ_EDGE);
2e927b76
RS
321}
322
323static int pcm990_mci_init(struct device *dev, irq_handler_t mci_detect_int,
324 void *data)
325{
326 int err;
327
2e927b76
RS
328 err = request_irq(PCM027_MMCDET_IRQ, mci_detect_int, IRQF_DISABLED,
329 "MMC card detect", data);
330 if (err)
331 printk(KERN_ERR "pcm990_mci_init: MMC/SD: can't request MMC "
332 "card detect IRQ\n");
333
334 return err;
335}
336
337static void pcm990_mci_setpower(struct device *dev, unsigned int vdd)
338{
339 struct pxamci_platform_data *p_d = dev->platform_data;
b298322b
SH
340 u8 val;
341
342 val = pcm990_cpld_readb(PCM990_CTRL_REG5);
2e927b76
RS
343
344 if ((1 << vdd) & p_d->ocr_mask)
b298322b 345 val |= PCM990_CTRL_MMC2PWR;
2e927b76 346 else
b298322b
SH
347 val &= ~PCM990_CTRL_MMC2PWR;
348
349 pcm990_cpld_writeb(PCM990_CTRL_MMC2PWR, PCM990_CTRL_REG5);
2e927b76
RS
350}
351
352static void pcm990_mci_exit(struct device *dev, void *data)
353{
354 free_irq(PCM027_MMCDET_IRQ, data);
355}
356
357#define MSECS_PER_JIFFY (1000/HZ)
358
359static struct pxamci_platform_data pcm990_mci_platform_data = {
f97cab28 360 .detect_delay_ms = 250,
7a648256
RJ
361 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
362 .init = pcm990_mci_init,
363 .setpower = pcm990_mci_setpower,
364 .exit = pcm990_mci_exit,
365 .gpio_card_detect = -1,
366 .gpio_card_ro = -1,
367 .gpio_power = -1,
2e927b76
RS
368};
369
2e927b76
RS
370static struct pxaohci_platform_data pcm990_ohci_platform_data = {
371 .port_mode = PMM_PERPORT_MODE,
097b5334
EM
372 .flags = ENABLE_PORT1 | POWER_CONTROL_LOW | POWER_SENSE_LOW,
373 .power_on_delay = 10,
2e927b76
RS
374};
375
58762e77
GL
376/*
377 * PXA27x Camera specific stuff
378 */
379#if defined(CONFIG_VIDEO_PXA27x) || defined(CONFIG_VIDEO_PXA27x_MODULE)
6a566fbb
GL
380static unsigned long pcm990_camera_pin_config[] = {
381 /* CIF */
382 GPIO98_CIF_DD_0,
383 GPIO105_CIF_DD_1,
384 GPIO104_CIF_DD_2,
385 GPIO103_CIF_DD_3,
386 GPIO95_CIF_DD_4,
387 GPIO94_CIF_DD_5,
388 GPIO93_CIF_DD_6,
389 GPIO108_CIF_DD_7,
390 GPIO107_CIF_DD_8,
391 GPIO106_CIF_DD_9,
392 GPIO42_CIF_MCLK,
393 GPIO45_CIF_PCLK,
394 GPIO43_CIF_FV,
395 GPIO44_CIF_LV,
396};
397
58762e77
GL
398/*
399 * CICR4: PCLK_EN: Pixel clock is supplied by the sensor
400 * MCLK_EN: Master clock is generated by PXA
401 * PCP: Data sampled on the falling edge of pixel clock
402 */
403struct pxacamera_platform_data pcm990_pxacamera_platform_data = {
58762e77
GL
404 .flags = PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 | PXA_CAMERA_DATAWIDTH_10 |
405 PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN/* | PXA_CAMERA_PCP*/,
406 .mclk_10khz = 1000,
407};
408
409#include <linux/i2c/pca953x.h>
410
411static struct pca953x_platform_data pca9536_data = {
1a8d5fab 412 .gpio_base = PXA_NR_BUILTIN_GPIO,
58762e77
GL
413};
414
594bb46d 415static int gpio_bus_switch = -EINVAL;
d75b1dcc
SH
416
417static int pcm990_camera_set_bus_param(struct soc_camera_link *link,
594bb46d 418 unsigned long flags)
d75b1dcc 419{
594bb46d 420 if (gpio_bus_switch < 0) {
d75b1dcc
SH
421 if (flags == SOCAM_DATAWIDTH_10)
422 return 0;
423 else
424 return -EINVAL;
425 }
426
427 if (flags & SOCAM_DATAWIDTH_8)
fae00288 428 gpio_set_value_cansleep(gpio_bus_switch, 1);
d75b1dcc 429 else
fae00288 430 gpio_set_value_cansleep(gpio_bus_switch, 0);
d75b1dcc
SH
431
432 return 0;
433}
434
435static unsigned long pcm990_camera_query_bus_param(struct soc_camera_link *link)
436{
437 int ret;
438
594bb46d 439 if (gpio_bus_switch < 0) {
1a8d5fab 440 ret = gpio_request(PXA_NR_BUILTIN_GPIO, "camera");
d75b1dcc 441 if (!ret) {
1a8d5fab 442 gpio_bus_switch = PXA_NR_BUILTIN_GPIO;
d75b1dcc 443 gpio_direction_output(gpio_bus_switch, 0);
594bb46d 444 }
58762e77 445 }
d75b1dcc 446
594bb46d 447 if (gpio_bus_switch >= 0)
d75b1dcc
SH
448 return SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_10;
449 else
450 return SOCAM_DATAWIDTH_10;
451}
452
594bb46d
GL
453static void pcm990_camera_free_bus(struct soc_camera_link *link)
454{
455 if (gpio_bus_switch < 0)
456 return;
457
458 gpio_free(gpio_bus_switch);
459 gpio_bus_switch = -EINVAL;
460}
461
58762e77
GL
462/* Board I2C devices. */
463static struct i2c_board_info __initdata pcm990_i2c_devices[] = {
464 {
465 /* Must initialize before the camera(s) */
3760f736 466 I2C_BOARD_INFO("pca9536", 0x41),
58762e77 467 .platform_data = &pca9536_data,
4a3d3abe
GL
468 },
469};
470
471static struct i2c_board_info pcm990_camera_i2c[] = {
472 {
58762e77 473 I2C_BOARD_INFO("mt9v022", 0x48),
58762e77
GL
474 }, {
475 I2C_BOARD_INFO("mt9m001", 0x5d),
4a3d3abe
GL
476 },
477};
478
479static struct soc_camera_link iclink[] = {
480 {
481 .bus_id = 0, /* Must match with the camera ID */
482 .board_info = &pcm990_camera_i2c[0],
483 .i2c_adapter_id = 0,
484 .query_bus_param = pcm990_camera_query_bus_param,
485 .set_bus_param = pcm990_camera_set_bus_param,
486 .free_bus = pcm990_camera_free_bus,
4a3d3abe
GL
487 }, {
488 .bus_id = 0, /* Must match with the camera ID */
489 .board_info = &pcm990_camera_i2c[1],
490 .i2c_adapter_id = 0,
491 .query_bus_param = pcm990_camera_query_bus_param,
492 .set_bus_param = pcm990_camera_set_bus_param,
493 .free_bus = pcm990_camera_free_bus,
4a3d3abe
GL
494 },
495};
496
497static struct platform_device pcm990_camera[] = {
498 {
499 .name = "soc-camera-pdrv",
500 .id = 0,
501 .dev = {
502 .platform_data = &iclink[0],
503 },
504 }, {
505 .name = "soc-camera-pdrv",
506 .id = 1,
507 .dev = {
508 .platform_data = &iclink[1],
509 },
58762e77
GL
510 },
511};
512#endif /* CONFIG_VIDEO_PXA27x ||CONFIG_VIDEO_PXA27x_MODULE */
513
2e927b76
RS
514/*
515 * system init for baseboard usage. Will be called by pcm027 init.
516 *
517 * Add platform devices present on this baseboard and init
518 * them from CPU side as far as required to use them later on
519 */
520void __init pcm990_baseboard_init(void)
521{
6a566fbb
GL
522 pxa2xx_mfp_config(ARRAY_AND_SIZE(pcm990_pin_config));
523
b298322b
SH
524 pcm990_cpld_base = ioremap(PCM990_CTRL_PHYS, PCM990_CTRL_SIZE);
525 if (!pcm990_cpld_base) {
526 pr_err("pcm990: failed to ioremap cpld\n");
527 return;
528 }
2e927b76
RS
529
530 /* register CPLD's IRQ controller */
531 pcm990_init_irq();
532
c0f7edb3 533#ifndef CONFIG_PCM990_DISPLAY_NONE
4321e1a1 534 pxa_set_fb_info(NULL, &pcm990_fbinfo);
c0f7edb3 535#endif
c0f7edb3
GL
536 platform_device_register(&pcm990_backlight_device);
537
2e927b76
RS
538 /* MMC */
539 pxa_set_mci_info(&pcm990_mci_platform_data);
540
541 /* USB host */
542 pxa_set_ohci_info(&pcm990_ohci_platform_data);
543
58762e77 544 pxa_set_i2c_info(NULL);
9f19d638 545 pxa_set_ac97_info(NULL);
58762e77
GL
546
547#if defined(CONFIG_VIDEO_PXA27x) || defined(CONFIG_VIDEO_PXA27x_MODULE)
0e851907 548 pxa2xx_mfp_config(ARRAY_AND_SIZE(pcm990_camera_pin_config));
58762e77
GL
549 pxa_set_camera_info(&pcm990_pxacamera_platform_data);
550
6a566fbb 551 i2c_register_board_info(0, ARRAY_AND_SIZE(pcm990_i2c_devices));
4a3d3abe
GL
552
553 platform_device_register(&pcm990_camera[0]);
554 platform_device_register(&pcm990_camera[1]);
58762e77
GL
555#endif
556
6a566fbb 557 printk(KERN_INFO "PCM-990 Evaluation baseboard initialized\n");
2e927b76 558}
This page took 0.310599 seconds and 5 git commands to generate.