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2e927b76 RS |
1 | /* |
2 | * arch/arm/mach-pxa/pcm990-baseboard.c | |
3 | * Support for the Phytec phyCORE-PXA270 Development Platform (PCM-990). | |
4 | * | |
5 | * Refer | |
6 | * http://www.phytec.com/products/rdk/ARM-XScale/phyCORE-XScale-PXA270.html | |
7 | * for additional hardware info | |
8 | * | |
9 | * Author: Juergen Kilb | |
10 | * Created: April 05, 2005 | |
11 | * Copyright: Phytec Messtechnik GmbH | |
12 | * e-Mail: armlinux@phytec.de | |
13 | * | |
14 | * based on Intel Mainstone Board | |
15 | * | |
16 | * Copyright 2007 Juergen Beisert @ Pengutronix (j.beisert@pengutronix.de) | |
17 | * | |
18 | * This program is free software; you can redistribute it and/or modify | |
19 | * it under the terms of the GNU General Public License version 2 as | |
20 | * published by the Free Software Foundation. | |
21 | */ | |
22 | ||
23 | #include <linux/irq.h> | |
24 | #include <linux/platform_device.h> | |
58762e77 | 25 | #include <linux/i2c.h> |
c0f7edb3 | 26 | #include <linux/pwm_backlight.h> |
58762e77 GL |
27 | |
28 | #include <media/soc_camera.h> | |
29 | ||
30 | #include <asm/gpio.h> | |
f0a83701 | 31 | #include <plat/i2c.h> |
a09e64fb | 32 | #include <mach/camera.h> |
2e927b76 | 33 | #include <asm/mach/map.h> |
51c62982 | 34 | #include <mach/pxa27x.h> |
a09e64fb RK |
35 | #include <mach/audio.h> |
36 | #include <mach/mmc.h> | |
37 | #include <mach/ohci.h> | |
38 | #include <mach/pcm990_baseboard.h> | |
39 | #include <mach/pxafb.h> | |
c0f7edb3 GL |
40 | |
41 | #include "devices.h" | |
6a566fbb GL |
42 | #include "generic.h" |
43 | ||
44 | static unsigned long pcm990_pin_config[] __initdata = { | |
45 | /* MMC */ | |
46 | GPIO32_MMC_CLK, | |
47 | GPIO112_MMC_CMD, | |
48 | GPIO92_MMC_DAT_0, | |
49 | GPIO109_MMC_DAT_1, | |
50 | GPIO110_MMC_DAT_2, | |
51 | GPIO111_MMC_DAT_3, | |
52 | /* USB */ | |
53 | GPIO88_USBH1_PWR, | |
54 | GPIO89_USBH1_PEN, | |
55 | /* PWM0 */ | |
56 | GPIO16_PWM0_OUT, | |
6f584cfa EM |
57 | |
58 | /* I2C */ | |
59 | GPIO117_I2C_SCL, | |
60 | GPIO118_I2C_SDA, | |
6a566fbb | 61 | }; |
c0f7edb3 GL |
62 | |
63 | /* | |
64 | * pcm990_lcd_power - control power supply to the LCD | |
65 | * @on: 0 = switch off, 1 = switch on | |
66 | * | |
67 | * Called by the pxafb driver | |
68 | */ | |
69 | #ifndef CONFIG_PCM990_DISPLAY_NONE | |
70 | static void pcm990_lcd_power(int on, struct fb_var_screeninfo *var) | |
71 | { | |
72 | if (on) { | |
73 | /* enable LCD-Latches | |
74 | * power on LCD | |
75 | */ | |
76 | __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG3) = | |
77 | PCM990_CTRL_LCDPWR + PCM990_CTRL_LCDON; | |
78 | } else { | |
79 | /* disable LCD-Latches | |
80 | * power off LCD | |
81 | */ | |
82 | __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG3) = 0x00; | |
83 | } | |
84 | } | |
85 | #endif | |
86 | ||
87 | #if defined(CONFIG_PCM990_DISPLAY_SHARP) | |
88 | static struct pxafb_mode_info fb_info_sharp_lq084v1dg21 = { | |
89 | .pixclock = 28000, | |
90 | .xres = 640, | |
91 | .yres = 480, | |
92 | .bpp = 16, | |
93 | .hsync_len = 20, | |
94 | .left_margin = 103, | |
95 | .right_margin = 47, | |
96 | .vsync_len = 6, | |
97 | .upper_margin = 28, | |
98 | .lower_margin = 5, | |
99 | .sync = 0, | |
100 | .cmap_greyscale = 0, | |
101 | }; | |
102 | ||
103 | static struct pxafb_mach_info pcm990_fbinfo __initdata = { | |
104 | .modes = &fb_info_sharp_lq084v1dg21, | |
105 | .num_modes = 1, | |
9587319b | 106 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, |
c0f7edb3 GL |
107 | .pxafb_lcd_power = pcm990_lcd_power, |
108 | }; | |
109 | #elif defined(CONFIG_PCM990_DISPLAY_NEC) | |
110 | struct pxafb_mode_info fb_info_nec_nl6448bc20_18d = { | |
111 | .pixclock = 39720, | |
112 | .xres = 640, | |
113 | .yres = 480, | |
114 | .bpp = 16, | |
115 | .hsync_len = 32, | |
116 | .left_margin = 16, | |
117 | .right_margin = 48, | |
118 | .vsync_len = 2, | |
119 | .upper_margin = 12, | |
120 | .lower_margin = 17, | |
121 | .sync = 0, | |
122 | .cmap_greyscale = 0, | |
123 | }; | |
124 | ||
125 | static struct pxafb_mach_info pcm990_fbinfo __initdata = { | |
126 | .modes = &fb_info_nec_nl6448bc20_18d, | |
127 | .num_modes = 1, | |
9587319b | 128 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, |
c0f7edb3 GL |
129 | .pxafb_lcd_power = pcm990_lcd_power, |
130 | }; | |
131 | #endif | |
132 | ||
133 | static struct platform_pwm_backlight_data pcm990_backlight_data = { | |
134 | .pwm_id = 0, | |
135 | .max_brightness = 1023, | |
136 | .dft_brightness = 1023, | |
137 | .pwm_period_ns = 78770, | |
138 | }; | |
139 | ||
140 | static struct platform_device pcm990_backlight_device = { | |
141 | .name = "pwm-backlight", | |
142 | .dev = { | |
143 | .parent = &pxa27x_device_pwm0.dev, | |
144 | .platform_data = &pcm990_backlight_data, | |
145 | }, | |
146 | }; | |
2e927b76 RS |
147 | |
148 | /* | |
c0f7edb3 | 149 | * The PCM-990 development baseboard uses PCM-027's hardware in the |
2e927b76 RS |
150 | * following way: |
151 | * | |
152 | * - LCD support is in use | |
153 | * - GPIO16 is output for back light on/off with PWM | |
154 | * - GPIO58 ... GPIO73 are outputs for display data | |
155 | * - GPIO74 is output output for LCDFCLK | |
156 | * - GPIO75 is output for LCDLCLK | |
157 | * - GPIO76 is output for LCDPCLK | |
158 | * - GPIO77 is output for LCDBIAS | |
159 | * - MMC support is in use | |
160 | * - GPIO32 is output for MMCCLK | |
161 | * - GPIO92 is MMDAT0 | |
162 | * - GPIO109 is MMDAT1 | |
163 | * - GPIO110 is MMCS0 | |
164 | * - GPIO111 is MMCS1 | |
165 | * - GPIO112 is MMCMD | |
166 | * - IDE/CF card is in use | |
167 | * - GPIO48 is output /POE | |
168 | * - GPIO49 is output /PWE | |
169 | * - GPIO50 is output /PIOR | |
170 | * - GPIO51 is output /PIOW | |
171 | * - GPIO54 is output /PCE2 | |
172 | * - GPIO55 is output /PREG | |
173 | * - GPIO56 is input /PWAIT | |
174 | * - GPIO57 is output /PIOS16 | |
175 | * - GPIO79 is output PSKTSEL | |
176 | * - GPIO85 is output /PCE1 | |
177 | * - FFUART is in use | |
178 | * - GPIO34 is input FFRXD | |
179 | * - GPIO35 is input FFCTS | |
180 | * - GPIO36 is input FFDCD | |
181 | * - GPIO37 is input FFDSR | |
182 | * - GPIO38 is input FFRI | |
183 | * - GPIO39 is output FFTXD | |
184 | * - GPIO40 is output FFDTR | |
185 | * - GPIO41 is output FFRTS | |
186 | * - BTUART is in use | |
187 | * - GPIO42 is input BTRXD | |
188 | * - GPIO43 is output BTTXD | |
189 | * - GPIO44 is input BTCTS | |
190 | * - GPIO45 is output BTRTS | |
191 | * - IRUART is in use | |
192 | * - GPIO46 is input STDRXD | |
193 | * - GPIO47 is output STDTXD | |
194 | * - AC97 is in use*) | |
195 | * - GPIO28 is input AC97CLK | |
196 | * - GPIO29 is input AC97DatIn | |
197 | * - GPIO30 is output AC97DatO | |
198 | * - GPIO31 is output AC97SYNC | |
199 | * - GPIO113 is output AC97_RESET | |
200 | * - SSP is in use | |
201 | * - GPIO23 is output SSPSCLK | |
202 | * - GPIO24 is output chip select to Max7301 | |
203 | * - GPIO25 is output SSPTXD | |
204 | * - GPIO26 is input SSPRXD | |
205 | * - GPIO27 is input for Max7301 IRQ | |
206 | * - GPIO53 is input SSPSYSCLK | |
207 | * - SSP3 is in use | |
208 | * - GPIO81 is output SSPTXD3 | |
209 | * - GPIO82 is input SSPRXD3 | |
210 | * - GPIO83 is output SSPSFRM | |
211 | * - GPIO84 is output SSPCLK3 | |
212 | * | |
213 | * Otherwise claimed GPIOs: | |
214 | * GPIO1 -> IRQ from user switch | |
215 | * GPIO9 -> IRQ from power management | |
216 | * GPIO10 -> IRQ from WML9712 AC97 controller | |
217 | * GPIO11 -> IRQ from IDE controller | |
218 | * GPIO12 -> IRQ from CF controller | |
219 | * GPIO13 -> IRQ from CF controller | |
220 | * GPIO14 -> GPIO free | |
221 | * GPIO15 -> /CS1 selects baseboard's Control CPLD (U7, 16 bit wide data path) | |
222 | * GPIO19 -> GPIO free | |
223 | * GPIO20 -> /SDCS2 | |
224 | * GPIO21 -> /CS3 PC card socket select | |
225 | * GPIO33 -> /CS5 network controller select | |
226 | * GPIO78 -> /CS2 (16 bit wide data path) | |
227 | * GPIO80 -> /CS4 (16 bit wide data path) | |
228 | * GPIO86 -> GPIO free | |
229 | * GPIO87 -> GPIO free | |
230 | * GPIO90 -> LED0 on CPU module | |
231 | * GPIO91 -> LED1 on CPI module | |
232 | * GPIO117 -> SCL | |
233 | * GPIO118 -> SDA | |
234 | */ | |
235 | ||
236 | static unsigned long pcm990_irq_enabled; | |
237 | ||
238 | static void pcm990_mask_ack_irq(unsigned int irq) | |
239 | { | |
240 | int pcm990_irq = (irq - PCM027_IRQ(0)); | |
241 | PCM990_INTMSKENA = (pcm990_irq_enabled &= ~(1 << pcm990_irq)); | |
242 | } | |
243 | ||
244 | static void pcm990_unmask_irq(unsigned int irq) | |
245 | { | |
246 | int pcm990_irq = (irq - PCM027_IRQ(0)); | |
247 | /* the irq can be acknowledged only if deasserted, so it's done here */ | |
248 | PCM990_INTSETCLR |= 1 << pcm990_irq; | |
249 | PCM990_INTMSKENA = (pcm990_irq_enabled |= (1 << pcm990_irq)); | |
250 | } | |
251 | ||
252 | static struct irq_chip pcm990_irq_chip = { | |
253 | .mask_ack = pcm990_mask_ack_irq, | |
254 | .unmask = pcm990_unmask_irq, | |
255 | }; | |
256 | ||
257 | static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc) | |
258 | { | |
259 | unsigned long pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled; | |
260 | ||
261 | do { | |
262 | GEDR(PCM990_CTRL_INT_IRQ_GPIO) = | |
263 | GPIO_bit(PCM990_CTRL_INT_IRQ_GPIO); | |
264 | if (likely(pending)) { | |
265 | irq = PCM027_IRQ(0) + __ffs(pending); | |
d8aa0251 | 266 | generic_handle_irq(irq); |
2e927b76 RS |
267 | } |
268 | pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled; | |
269 | } while (pending); | |
270 | } | |
271 | ||
272 | static void __init pcm990_init_irq(void) | |
273 | { | |
274 | int irq; | |
275 | ||
276 | /* setup extra PCM990 irqs */ | |
277 | for (irq = PCM027_IRQ(0); irq <= PCM027_IRQ(3); irq++) { | |
278 | set_irq_chip(irq, &pcm990_irq_chip); | |
279 | set_irq_handler(irq, handle_level_irq); | |
280 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | |
281 | } | |
282 | ||
283 | PCM990_INTMSKENA = 0x00; /* disable all Interrupts */ | |
284 | PCM990_INTSETCLR = 0xFF; | |
285 | ||
286 | set_irq_chained_handler(PCM990_CTRL_INT_IRQ, pcm990_irq_handler); | |
287 | set_irq_type(PCM990_CTRL_INT_IRQ, PCM990_CTRL_INT_IRQ_EDGE); | |
288 | } | |
289 | ||
290 | static int pcm990_mci_init(struct device *dev, irq_handler_t mci_detect_int, | |
291 | void *data) | |
292 | { | |
293 | int err; | |
294 | ||
2e927b76 RS |
295 | err = request_irq(PCM027_MMCDET_IRQ, mci_detect_int, IRQF_DISABLED, |
296 | "MMC card detect", data); | |
297 | if (err) | |
298 | printk(KERN_ERR "pcm990_mci_init: MMC/SD: can't request MMC " | |
299 | "card detect IRQ\n"); | |
300 | ||
301 | return err; | |
302 | } | |
303 | ||
304 | static void pcm990_mci_setpower(struct device *dev, unsigned int vdd) | |
305 | { | |
306 | struct pxamci_platform_data *p_d = dev->platform_data; | |
307 | ||
308 | if ((1 << vdd) & p_d->ocr_mask) | |
309 | __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG5) = | |
310 | PCM990_CTRL_MMC2PWR; | |
311 | else | |
312 | __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG5) = | |
313 | ~PCM990_CTRL_MMC2PWR; | |
314 | } | |
315 | ||
316 | static void pcm990_mci_exit(struct device *dev, void *data) | |
317 | { | |
318 | free_irq(PCM027_MMCDET_IRQ, data); | |
319 | } | |
320 | ||
321 | #define MSECS_PER_JIFFY (1000/HZ) | |
322 | ||
323 | static struct pxamci_platform_data pcm990_mci_platform_data = { | |
324 | .detect_delay = 250 / MSECS_PER_JIFFY, | |
325 | .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, | |
326 | .init = pcm990_mci_init, | |
327 | .setpower = pcm990_mci_setpower, | |
328 | .exit = pcm990_mci_exit, | |
329 | }; | |
330 | ||
2e927b76 RS |
331 | static struct pxaohci_platform_data pcm990_ohci_platform_data = { |
332 | .port_mode = PMM_PERPORT_MODE, | |
097b5334 EM |
333 | .flags = ENABLE_PORT1 | POWER_CONTROL_LOW | POWER_SENSE_LOW, |
334 | .power_on_delay = 10, | |
2e927b76 RS |
335 | }; |
336 | ||
58762e77 GL |
337 | /* |
338 | * PXA27x Camera specific stuff | |
339 | */ | |
340 | #if defined(CONFIG_VIDEO_PXA27x) || defined(CONFIG_VIDEO_PXA27x_MODULE) | |
6a566fbb GL |
341 | static unsigned long pcm990_camera_pin_config[] = { |
342 | /* CIF */ | |
343 | GPIO98_CIF_DD_0, | |
344 | GPIO105_CIF_DD_1, | |
345 | GPIO104_CIF_DD_2, | |
346 | GPIO103_CIF_DD_3, | |
347 | GPIO95_CIF_DD_4, | |
348 | GPIO94_CIF_DD_5, | |
349 | GPIO93_CIF_DD_6, | |
350 | GPIO108_CIF_DD_7, | |
351 | GPIO107_CIF_DD_8, | |
352 | GPIO106_CIF_DD_9, | |
353 | GPIO42_CIF_MCLK, | |
354 | GPIO45_CIF_PCLK, | |
355 | GPIO43_CIF_FV, | |
356 | GPIO44_CIF_LV, | |
357 | }; | |
358 | ||
58762e77 GL |
359 | static int pcm990_pxacamera_init(struct device *dev) |
360 | { | |
6a566fbb | 361 | pxa2xx_mfp_config(ARRAY_AND_SIZE(pcm990_camera_pin_config)); |
58762e77 GL |
362 | return 0; |
363 | } | |
364 | ||
365 | /* | |
366 | * CICR4: PCLK_EN: Pixel clock is supplied by the sensor | |
367 | * MCLK_EN: Master clock is generated by PXA | |
368 | * PCP: Data sampled on the falling edge of pixel clock | |
369 | */ | |
370 | struct pxacamera_platform_data pcm990_pxacamera_platform_data = { | |
371 | .init = pcm990_pxacamera_init, | |
372 | .flags = PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 | PXA_CAMERA_DATAWIDTH_10 | | |
373 | PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN/* | PXA_CAMERA_PCP*/, | |
374 | .mclk_10khz = 1000, | |
375 | }; | |
376 | ||
377 | #include <linux/i2c/pca953x.h> | |
378 | ||
379 | static struct pca953x_platform_data pca9536_data = { | |
a48dc30d | 380 | .gpio_base = NR_BUILTIN_GPIO, |
58762e77 GL |
381 | }; |
382 | ||
d75b1dcc SH |
383 | static int gpio_bus_switch; |
384 | ||
385 | static int pcm990_camera_set_bus_param(struct soc_camera_link *link, | |
386 | unsigned long flags) | |
387 | { | |
388 | if (gpio_bus_switch <= 0) { | |
389 | if (flags == SOCAM_DATAWIDTH_10) | |
390 | return 0; | |
391 | else | |
392 | return -EINVAL; | |
393 | } | |
394 | ||
395 | if (flags & SOCAM_DATAWIDTH_8) | |
396 | gpio_set_value(gpio_bus_switch, 1); | |
397 | else | |
398 | gpio_set_value(gpio_bus_switch, 0); | |
399 | ||
400 | return 0; | |
401 | } | |
402 | ||
403 | static unsigned long pcm990_camera_query_bus_param(struct soc_camera_link *link) | |
404 | { | |
405 | int ret; | |
406 | ||
407 | if (!gpio_bus_switch) { | |
a48dc30d | 408 | ret = gpio_request(NR_BUILTIN_GPIO, "camera"); |
d75b1dcc | 409 | if (!ret) { |
a48dc30d | 410 | gpio_bus_switch = NR_BUILTIN_GPIO; |
d75b1dcc SH |
411 | gpio_direction_output(gpio_bus_switch, 0); |
412 | } else | |
413 | gpio_bus_switch = -EINVAL; | |
58762e77 | 414 | } |
d75b1dcc SH |
415 | |
416 | if (gpio_bus_switch > 0) | |
417 | return SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_10; | |
418 | else | |
419 | return SOCAM_DATAWIDTH_10; | |
420 | } | |
421 | ||
422 | static struct soc_camera_link iclink = { | |
423 | .bus_id = 0, /* Must match with the camera ID above */ | |
d75b1dcc SH |
424 | .query_bus_param = pcm990_camera_query_bus_param, |
425 | .set_bus_param = pcm990_camera_set_bus_param, | |
58762e77 GL |
426 | }; |
427 | ||
428 | /* Board I2C devices. */ | |
429 | static struct i2c_board_info __initdata pcm990_i2c_devices[] = { | |
430 | { | |
431 | /* Must initialize before the camera(s) */ | |
3760f736 | 432 | I2C_BOARD_INFO("pca9536", 0x41), |
58762e77 GL |
433 | .platform_data = &pca9536_data, |
434 | }, { | |
435 | I2C_BOARD_INFO("mt9v022", 0x48), | |
d75b1dcc | 436 | .platform_data = &iclink, /* With extender */ |
58762e77 GL |
437 | }, { |
438 | I2C_BOARD_INFO("mt9m001", 0x5d), | |
d75b1dcc | 439 | .platform_data = &iclink, /* With extender */ |
58762e77 GL |
440 | }, |
441 | }; | |
442 | #endif /* CONFIG_VIDEO_PXA27x ||CONFIG_VIDEO_PXA27x_MODULE */ | |
443 | ||
2e927b76 RS |
444 | /* |
445 | * enable generic access to the base board control CPLDs U6 and U7 | |
446 | */ | |
447 | static struct map_desc pcm990_io_desc[] __initdata = { | |
448 | { | |
449 | .virtual = PCM990_CTRL_BASE, | |
450 | .pfn = __phys_to_pfn(PCM990_CTRL_PHYS), | |
451 | .length = PCM990_CTRL_SIZE, | |
452 | .type = MT_DEVICE /* CPLD */ | |
453 | }, { | |
454 | .virtual = PCM990_CF_PLD_BASE, | |
455 | .pfn = __phys_to_pfn(PCM990_CF_PLD_PHYS), | |
456 | .length = PCM990_CF_PLD_SIZE, | |
457 | .type = MT_DEVICE /* CPLD */ | |
458 | } | |
459 | }; | |
460 | ||
461 | /* | |
462 | * system init for baseboard usage. Will be called by pcm027 init. | |
463 | * | |
464 | * Add platform devices present on this baseboard and init | |
465 | * them from CPU side as far as required to use them later on | |
466 | */ | |
467 | void __init pcm990_baseboard_init(void) | |
468 | { | |
6a566fbb GL |
469 | pxa2xx_mfp_config(ARRAY_AND_SIZE(pcm990_pin_config)); |
470 | ||
2e927b76 | 471 | /* register CPLD access */ |
6a566fbb | 472 | iotable_init(ARRAY_AND_SIZE(pcm990_io_desc)); |
2e927b76 RS |
473 | |
474 | /* register CPLD's IRQ controller */ | |
475 | pcm990_init_irq(); | |
476 | ||
c0f7edb3 GL |
477 | #ifndef CONFIG_PCM990_DISPLAY_NONE |
478 | set_pxa_fb_info(&pcm990_fbinfo); | |
479 | #endif | |
c0f7edb3 GL |
480 | platform_device_register(&pcm990_backlight_device); |
481 | ||
2e927b76 RS |
482 | /* MMC */ |
483 | pxa_set_mci_info(&pcm990_mci_platform_data); | |
484 | ||
485 | /* USB host */ | |
486 | pxa_set_ohci_info(&pcm990_ohci_platform_data); | |
487 | ||
58762e77 | 488 | pxa_set_i2c_info(NULL); |
9f19d638 | 489 | pxa_set_ac97_info(NULL); |
58762e77 GL |
490 | |
491 | #if defined(CONFIG_VIDEO_PXA27x) || defined(CONFIG_VIDEO_PXA27x_MODULE) | |
492 | pxa_set_camera_info(&pcm990_pxacamera_platform_data); | |
493 | ||
6a566fbb | 494 | i2c_register_board_info(0, ARRAY_AND_SIZE(pcm990_i2c_devices)); |
58762e77 GL |
495 | #endif |
496 | ||
6a566fbb | 497 | printk(KERN_INFO "PCM-990 Evaluation baseboard initialized\n"); |
2e927b76 | 498 | } |