[deliverable/linux.git] / arch / arm / mach-pxa / pxa25x.c

/*
 *  linux/arch/arm/mach-pxa/pxa25x.c
 *
 *  Author:	Nicolas Pitre
 *  Created:	Jun 15, 2001
 *  Copyright:	MontaVista Software Inc.
 *
 * Code specific to PXA21x/25x/26x variants.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * Since this file should be linked before any other machine specific file,
 * the __initcall() here will be executed first.  This serves as default
 * initialization stuff for PXA machines which can be overridden later if
 * need be.
 */
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/pm.h>

#include <asm/hardware.h>
#include <asm/arch/irqs.h>
#include <asm/arch/pxa-regs.h>
#include <asm/arch/pm.h>

#include "generic.h"

/*
 * Various clock factors driven by the CCCR register.
 */

/* Crystal Frequency to Memory Frequency Multiplier (L) */
static unsigned char L_clk_mult[32] = { 0, 27, 32, 36, 40, 45, 0, };

/* Memory Frequency to Run Mode Frequency Multiplier (M) */
static unsigned char M_clk_mult[4] = { 0, 1, 2, 4 };

/* Run Mode Frequency to Turbo Mode Frequency Multiplier (N) */
/* Note: we store the value N * 2 here. */
static unsigned char N2_clk_mult[8] = { 0, 0, 2, 3, 4, 0, 6, 0 };

/* Crystal clock */
#define BASE_CLK	3686400

/*
 * Get the clock frequency as reflected by CCCR and the turbo flag.
 * We assume these values have been applied via a fcs.
 * If info is not 0 we also display the current settings.
 */
unsigned int get_clk_frequency_khz(int info)
{
	unsigned long cccr, turbo;
	unsigned int l, L, m, M, n2, N;

	cccr = CCCR;
	asm( "mrc\tp14, 0, %0, c6, c0, 0" : "=r" (turbo) );

	l  =  L_clk_mult[(cccr >> 0) & 0x1f];
	m  =  M_clk_mult[(cccr >> 5) & 0x03];
	n2 = N2_clk_mult[(cccr >> 7) & 0x07];

	L = l * BASE_CLK;
	M = m * L;
	N = n2 * M / 2;

	if(info)
	{
		L += 5000;
		printk( KERN_INFO "Memory clock: %d.%02dMHz (*%d)\n",
			L / 1000000, (L % 1000000) / 10000, l );
		M += 5000;
		printk( KERN_INFO "Run Mode clock: %d.%02dMHz (*%d)\n",
			M / 1000000, (M % 1000000) / 10000, m );
		N += 5000;
		printk( KERN_INFO "Turbo Mode clock: %d.%02dMHz (*%d.%d, %sactive)\n",
			N / 1000000, (N % 1000000) / 10000, n2 / 2, (n2 % 2) * 5,
			(turbo & 1) ? "" : "in" );
	}

	return (turbo & 1) ? (N/1000) : (M/1000);
}

EXPORT_SYMBOL(get_clk_frequency_khz);

/*
 * Return the current memory clock frequency in units of 10kHz
 */
unsigned int get_memclk_frequency_10khz(void)
{
	return L_clk_mult[(CCCR >> 0) & 0x1f] * BASE_CLK / 10000;
}

EXPORT_SYMBOL(get_memclk_frequency_10khz);

/*
 * Return the current LCD clock frequency in units of 10kHz
 */
unsigned int get_lcdclk_frequency_10khz(void)
{
	return get_memclk_frequency_10khz();
}

EXPORT_SYMBOL(get_lcdclk_frequency_10khz);

#ifdef CONFIG_PM

void pxa_cpu_pm_enter(suspend_state_t state)
{
	extern void pxa_cpu_suspend(unsigned int);
	extern void pxa_cpu_resume(void);

	CKEN = 0;

	switch (state) {
	case PM_SUSPEND_MEM:
		/* set resume return address */
		PSPR = virt_to_phys(pxa_cpu_resume);
		pxa_cpu_suspend(PWRMODE_SLEEP);
		break;
	}
}

static struct pm_ops pxa25x_pm_ops = {
	.enter		= pxa_pm_enter,
	.valid		= pm_valid_only_mem,
};
#endif

void __init pxa25x_init_irq(void)
{
	pxa_init_irq_low();
	pxa_init_irq_gpio(85);
}

static int __init pxa25x_init(void)
{
	if (cpu_is_pxa21x() || cpu_is_pxa25x()) {
#ifdef CONFIG_PM
		pm_set_ops(&pxa25x_pm_ops);
#endif
	}
	return 0; 
}

subsys_initcall(pxa25x_init);
Commit	Line	Data
1da177e4 LT	1	/*
	2	* linux/arch/arm/mach-pxa/pxa25x.c
	3	*
	4	* Author: Nicolas Pitre
	5	* Created: Jun 15, 2001
	6	* Copyright: MontaVista Software Inc.
	7	*
	8	* Code specific to PXA21x/25x/26x variants.
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License version 2 as
	12	* published by the Free Software Foundation.
	13	*
	14	* Since this file should be linked before any other machine specific file,
	15	* the __initcall() here will be executed first. This serves as default
	16	* initialization stuff for PXA machines which can be overridden later if
	17	* need be.
	18	*/
	19	#include <linux/module.h>
	20	#include <linux/kernel.h>
	21	#include <linux/init.h>
	22	#include <linux/pm.h>
	23
	24	#include <asm/hardware.h>
cd49104d	25	#include <asm/arch/irqs.h>
1da177e4	26	#include <asm/arch/pxa-regs.h>
e176bb05	27	#include <asm/arch/pm.h>
1da177e4 LT	28
	29	#include "generic.h"
	30
	31	/*
	32	* Various clock factors driven by the CCCR register.
	33	*/
	34
	35	/* Crystal Frequency to Memory Frequency Multiplier (L) */
	36	static unsigned char L_clk_mult[32] = { 0, 27, 32, 36, 40, 45, 0, };
	37
	38	/* Memory Frequency to Run Mode Frequency Multiplier (M) */
	39	static unsigned char M_clk_mult[4] = { 0, 1, 2, 4 };
	40
	41	/* Run Mode Frequency to Turbo Mode Frequency Multiplier (N) */
	42	/* Note: we store the value N * 2 here. */
	43	static unsigned char N2_clk_mult[8] = { 0, 0, 2, 3, 4, 0, 6, 0 };
	44
	45	/* Crystal clock */
	46	#define BASE_CLK 3686400
	47
	48	/*
	49	* Get the clock frequency as reflected by CCCR and the turbo flag.
	50	* We assume these values have been applied via a fcs.
	51	* If info is not 0 we also display the current settings.
	52	*/
	53	unsigned int get_clk_frequency_khz(int info)
	54	{
	55	unsigned long cccr, turbo;
	56	unsigned int l, L, m, M, n2, N;
	57
	58	cccr = CCCR;
	59	asm( "mrc\tp14, 0, %0, c6, c0, 0" : "=r" (turbo) );
	60
	61	l = L_clk_mult[(cccr >> 0) & 0x1f];
	62	m = M_clk_mult[(cccr >> 5) & 0x03];
	63	n2 = N2_clk_mult[(cccr >> 7) & 0x07];
	64
	65	L = l * BASE_CLK;
	66	M = m * L;
	67	N = n2 * M / 2;
	68
	69	if(info)
	70	{
	71	L += 5000;
	72	printk( KERN_INFO "Memory clock: %d.%02dMHz (*%d)\n",
	73	L / 1000000, (L % 1000000) / 10000, l );
	74	M += 5000;
	75	printk( KERN_INFO "Run Mode clock: %d.%02dMHz (*%d)\n",
	76	M / 1000000, (M % 1000000) / 10000, m );
	77	N += 5000;
	78	printk( KERN_INFO "Turbo Mode clock: %d.%02dMHz (*%d.%d, %sactive)\n",
	79	N / 1000000, (N % 1000000) / 10000, n2 / 2, (n2 % 2) * 5,
	80	(turbo & 1) ? "" : "in" );
	81	}
	82
	83	return (turbo & 1) ? (N/1000) : (M/1000);
	84	}
	85
	86	EXPORT_SYMBOL(get_clk_frequency_khz);
	87
	88	/*
	89	* Return the current memory clock frequency in units of 10kHz
	90	*/
	91	unsigned int get_memclk_frequency_10khz(void)
92	{
93	return L_clk_mult[(CCCR >> 0) & 0x1f] * BASE_CLK / 10000;
94	}
95
96	EXPORT_SYMBOL(get_memclk_frequency_10khz);
97
98	/*
99	* Return the current LCD clock frequency in units of 10kHz
100	*/
101	unsigned int get_lcdclk_frequency_10khz(void)
102	{
103	return get_memclk_frequency_10khz();
104	}
105
106	EXPORT_SYMBOL(get_lcdclk_frequency_10khz);
8775420d	107
a8fa3f0c	108	#ifdef CONFIG_PM
8775420d	109
8775420d TP	110	void pxa_cpu_pm_enter(suspend_state_t state)
	111	{
	112	extern void pxa_cpu_suspend(unsigned int);
	113	extern void pxa_cpu_resume(void);
	114
	115	CKEN = 0;
	116
	117	switch (state) {
	118	case PM_SUSPEND_MEM:
	119	/* set resume return address */
	120	PSPR = virt_to_phys(pxa_cpu_resume);
80a18573	121	pxa_cpu_suspend(PWRMODE_SLEEP);
8775420d TP	122	break;
	123	}
	124	}
a8fa3f0c	125
e176bb05	126	static struct pm_ops pxa25x_pm_ops = {
e176bb05 RK	127	.enter = pxa_pm_enter,
	128	.valid = pm_valid_only_mem,
	129	};
a8fa3f0c	130	#endif
e176bb05	131
cd49104d EM	132	void __init pxa25x_init_irq(void)
	133	{
	134	pxa_init_irq_low();
	135	pxa_init_irq_gpio(85);
	136	}
	137
e176bb05 RK	138	static int __init pxa25x_init(void)
	139	{
	140	if (cpu_is_pxa21x() \|\| cpu_is_pxa25x()) {
	141	#ifdef CONFIG_PM
	142	pm_set_ops(&pxa25x_pm_ops);
	143	#endif
	144	}
	145	return 0;
	146	}
	147
	148	subsys_initcall(pxa25x_init);