Commit | Line | Data |
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0dd28f1d RP |
1 | /* |
2 | * Support for Sharp SL-Cxx00 Series of PDAs | |
3 | * Models: SL-C3000 (Spitz), SL-C1000 (Akita) and SL-C3100 (Borzoi) | |
4 | * | |
5 | * Copyright (c) 2005 Richard Purdie | |
6 | * | |
7 | * Based on Sharp's 2.4 kernel patches/lubbock.c | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | * | |
13 | */ | |
14 | ||
15 | #include <linux/kernel.h> | |
d052d1be | 16 | #include <linux/platform_device.h> |
0dd28f1d | 17 | #include <linux/delay.h> |
dd5980d6 | 18 | #include <linux/gpio.h> |
4fe3224f | 19 | #include <linux/leds.h> |
e5d3bf3c | 20 | #include <linux/mtd/physmap.h> |
f72de663 EM |
21 | #include <linux/i2c.h> |
22 | #include <linux/i2c/pca953x.h> | |
859b7963 EM |
23 | #include <linux/spi/spi.h> |
24 | #include <linux/spi/ads7846.h> | |
25 | #include <linux/spi/corgi_lcd.h> | |
6af7a8eb | 26 | #include <linux/mtd/sharpsl.h> |
0dd28f1d RP |
27 | |
28 | #include <asm/setup.h> | |
0dd28f1d | 29 | #include <asm/mach-types.h> |
0dd28f1d | 30 | #include <asm/mach/arch.h> |
f0ba4017 DES |
31 | #include <asm/mach/sharpsl_param.h> |
32 | #include <asm/hardware/scoop.h> | |
33 | ||
0dd28f1d | 34 | |
51c62982 | 35 | #include <mach/pxa27x.h> |
a09e64fb | 36 | #include <mach/pxa27x-udc.h> |
afd2fc02 | 37 | #include <mach/reset.h> |
f0a83701 | 38 | #include <plat/i2c.h> |
a09e64fb RK |
39 | #include <mach/irda.h> |
40 | #include <mach/mmc.h> | |
41 | #include <mach/ohci.h> | |
a09e64fb | 42 | #include <mach/pxafb.h> |
859b7963 | 43 | #include <mach/pxa2xx_spi.h> |
a09e64fb | 44 | #include <mach/spitz.h> |
0dd28f1d RP |
45 | |
46 | #include "generic.h" | |
46c41e62 | 47 | #include "devices.h" |
0dd28f1d RP |
48 | #include "sharpsl.h" |
49 | ||
5e96adec EM |
50 | static unsigned long spitz_pin_config[] __initdata = { |
51 | /* Chip Selects */ | |
52 | GPIO78_nCS_2, /* SCOOP #2 */ | |
faf2f0ab | 53 | GPIO79_nCS_3, /* NAND */ |
5e96adec EM |
54 | GPIO80_nCS_4, /* SCOOP #1 */ |
55 | ||
56 | /* LCD - 16bpp Active TFT */ | |
57 | GPIO58_LCD_LDD_0, | |
58 | GPIO59_LCD_LDD_1, | |
59 | GPIO60_LCD_LDD_2, | |
60 | GPIO61_LCD_LDD_3, | |
61 | GPIO62_LCD_LDD_4, | |
62 | GPIO63_LCD_LDD_5, | |
63 | GPIO64_LCD_LDD_6, | |
64 | GPIO65_LCD_LDD_7, | |
65 | GPIO66_LCD_LDD_8, | |
66 | GPIO67_LCD_LDD_9, | |
67 | GPIO68_LCD_LDD_10, | |
68 | GPIO69_LCD_LDD_11, | |
69 | GPIO70_LCD_LDD_12, | |
70 | GPIO71_LCD_LDD_13, | |
71 | GPIO72_LCD_LDD_14, | |
72 | GPIO73_LCD_LDD_15, | |
73 | GPIO74_LCD_FCLK, | |
74 | GPIO75_LCD_LCLK, | |
75 | GPIO76_LCD_PCLK, | |
76 | ||
77 | /* PC Card */ | |
78 | GPIO48_nPOE, | |
79 | GPIO49_nPWE, | |
80 | GPIO50_nPIOR, | |
81 | GPIO51_nPIOW, | |
82 | GPIO85_nPCE_1, | |
83 | GPIO54_nPCE_2, | |
5e96adec EM |
84 | GPIO55_nPREG, |
85 | GPIO56_nPWAIT, | |
86 | GPIO57_nIOIS16, | |
faf2f0ab | 87 | GPIO104_PSKTSEL, |
5e96adec | 88 | |
772885c1 PZ |
89 | /* I2S */ |
90 | GPIO28_I2S_BITCLK_OUT, | |
91 | GPIO29_I2S_SDATA_IN, | |
92 | GPIO30_I2S_SDATA_OUT, | |
93 | GPIO31_I2S_SYNC, | |
94 | ||
5e96adec EM |
95 | /* MMC */ |
96 | GPIO32_MMC_CLK, | |
97 | GPIO112_MMC_CMD, | |
98 | GPIO92_MMC_DAT_0, | |
99 | GPIO109_MMC_DAT_1, | |
100 | GPIO110_MMC_DAT_2, | |
101 | GPIO111_MMC_DAT_3, | |
102 | ||
103 | /* GPIOs */ | |
104 | GPIO9_GPIO, /* SPITZ_GPIO_nSD_DETECT */ | |
105 | GPIO81_GPIO, /* SPITZ_GPIO_nSD_WP */ | |
106 | GPIO41_GPIO, /* SPITZ_GPIO_USB_CONNECT */ | |
107 | GPIO37_GPIO, /* SPITZ_GPIO_USB_HOST */ | |
108 | GPIO35_GPIO, /* SPITZ_GPIO_USB_DEVICE */ | |
109 | GPIO22_GPIO, /* SPITZ_GPIO_HSYNC */ | |
110 | GPIO94_GPIO, /* SPITZ_GPIO_CF_CD */ | |
111 | GPIO105_GPIO, /* SPITZ_GPIO_CF_IRQ */ | |
112 | GPIO106_GPIO, /* SPITZ_GPIO_CF2_IRQ */ | |
113 | ||
6f584cfa EM |
114 | /* I2C */ |
115 | GPIO117_I2C_SCL, | |
116 | GPIO118_I2C_SDA, | |
117 | ||
5e96adec EM |
118 | GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, |
119 | }; | |
120 | ||
0dd28f1d RP |
121 | /* |
122 | * Spitz SCOOP Device #1 | |
123 | */ | |
124 | static struct resource spitz_scoop_resources[] = { | |
125 | [0] = { | |
126 | .start = 0x10800000, | |
127 | .end = 0x10800fff, | |
128 | .flags = IORESOURCE_MEM, | |
129 | }, | |
130 | }; | |
131 | ||
132 | static struct scoop_config spitz_scoop_setup = { | |
fff14720 | 133 | .io_dir = SPITZ_SCP_IO_DIR, |
0dd28f1d | 134 | .io_out = SPITZ_SCP_IO_OUT, |
fff14720 EM |
135 | .suspend_clr = SPITZ_SCP_SUS_CLR, |
136 | .suspend_set = SPITZ_SCP_SUS_SET, | |
137 | .gpio_base = SPITZ_SCP_GPIO_BASE, | |
0dd28f1d RP |
138 | }; |
139 | ||
140 | struct platform_device spitzscoop_device = { | |
141 | .name = "sharp-scoop", | |
142 | .id = 0, | |
143 | .dev = { | |
144 | .platform_data = &spitz_scoop_setup, | |
145 | }, | |
146 | .num_resources = ARRAY_SIZE(spitz_scoop_resources), | |
147 | .resource = spitz_scoop_resources, | |
148 | }; | |
149 | ||
150 | /* | |
151 | * Spitz SCOOP Device #2 | |
152 | */ | |
153 | static struct resource spitz_scoop2_resources[] = { | |
154 | [0] = { | |
155 | .start = 0x08800040, | |
156 | .end = 0x08800fff, | |
157 | .flags = IORESOURCE_MEM, | |
158 | }, | |
159 | }; | |
160 | ||
161 | static struct scoop_config spitz_scoop2_setup = { | |
fff14720 | 162 | .io_dir = SPITZ_SCP2_IO_DIR, |
0dd28f1d | 163 | .io_out = SPITZ_SCP2_IO_OUT, |
fff14720 EM |
164 | .suspend_clr = SPITZ_SCP2_SUS_CLR, |
165 | .suspend_set = SPITZ_SCP2_SUS_SET, | |
166 | .gpio_base = SPITZ_SCP2_GPIO_BASE, | |
0dd28f1d RP |
167 | }; |
168 | ||
169 | struct platform_device spitzscoop2_device = { | |
170 | .name = "sharp-scoop", | |
171 | .id = 1, | |
172 | .dev = { | |
173 | .platform_data = &spitz_scoop2_setup, | |
174 | }, | |
175 | .num_resources = ARRAY_SIZE(spitz_scoop2_resources), | |
176 | .resource = spitz_scoop2_resources, | |
177 | }; | |
178 | ||
a63ae442 RP |
179 | #define SPITZ_PWR_SD 0x01 |
180 | #define SPITZ_PWR_CF 0x02 | |
181 | ||
182 | /* Power control is shared with between one of the CF slots and SD */ | |
183 | static void spitz_card_pwr_ctrl(int device, unsigned short new_cpr) | |
184 | { | |
185 | unsigned short cpr = read_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR); | |
186 | ||
187 | if (new_cpr & 0x0007) { | |
fff14720 | 188 | gpio_set_value(SPITZ_GPIO_CF_POWER, 1); |
a63ae442 RP |
189 | if (!(cpr & 0x0002) && !(cpr & 0x0004)) |
190 | mdelay(5); | |
191 | if (device == SPITZ_PWR_CF) | |
192 | cpr |= 0x0002; | |
193 | if (device == SPITZ_PWR_SD) | |
194 | cpr |= 0x0004; | |
195 | write_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR, cpr | new_cpr); | |
196 | } else { | |
197 | if (device == SPITZ_PWR_CF) | |
198 | cpr &= ~0x0002; | |
199 | if (device == SPITZ_PWR_SD) | |
200 | cpr &= ~0x0004; | |
a63ae442 | 201 | if (!(cpr & 0x0002) && !(cpr & 0x0004)) { |
945b9579 | 202 | write_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR, 0x0000); |
a63ae442 | 203 | mdelay(1); |
fff14720 | 204 | gpio_set_value(SPITZ_GPIO_CF_POWER, 0); |
945b9579 RP |
205 | } else { |
206 | write_scoop_reg(&spitzscoop_device.dev, SCOOP_CPR, cpr | new_cpr); | |
a63ae442 RP |
207 | } |
208 | } | |
209 | } | |
210 | ||
a63ae442 RP |
211 | static void spitz_pcmcia_pwr(struct device *scoop, unsigned short cpr, int nr) |
212 | { | |
213 | /* Only need to override behaviour for slot 0 */ | |
214 | if (nr == 0) | |
215 | spitz_card_pwr_ctrl(SPITZ_PWR_CF, cpr); | |
216 | else | |
217 | write_scoop_reg(scoop, SCOOP_CPR, cpr); | |
218 | } | |
219 | ||
0dd28f1d RP |
220 | static struct scoop_pcmcia_dev spitz_pcmcia_scoop[] = { |
221 | { | |
222 | .dev = &spitzscoop_device.dev, | |
223 | .irq = SPITZ_IRQ_GPIO_CF_IRQ, | |
224 | .cd_irq = SPITZ_IRQ_GPIO_CF_CD, | |
225 | .cd_irq_str = "PCMCIA0 CD", | |
226 | },{ | |
227 | .dev = &spitzscoop2_device.dev, | |
228 | .irq = SPITZ_IRQ_GPIO_CF2_IRQ, | |
229 | .cd_irq = -1, | |
230 | }, | |
231 | }; | |
232 | ||
a63ae442 RP |
233 | static struct scoop_pcmcia_config spitz_pcmcia_config = { |
234 | .devs = &spitz_pcmcia_scoop[0], | |
235 | .num_devs = 2, | |
a63ae442 RP |
236 | .power_ctrl = spitz_pcmcia_pwr, |
237 | }; | |
238 | ||
239 | EXPORT_SYMBOL(spitzscoop_device); | |
240 | EXPORT_SYMBOL(spitzscoop2_device); | |
241 | ||
0dd28f1d | 242 | /* |
0dd28f1d | 243 | * Spitz Keyboard Device |
0dd28f1d | 244 | */ |
0dd28f1d RP |
245 | static struct platform_device spitzkbd_device = { |
246 | .name = "spitz-keyboard", | |
0dd28f1d RP |
247 | .id = -1, |
248 | }; | |
249 | ||
0dd28f1d RP |
250 | |
251 | /* | |
3179108d | 252 | * Spitz LEDs |
0dd28f1d | 253 | */ |
4fe3224f EM |
254 | static struct gpio_led spitz_gpio_leds[] = { |
255 | { | |
256 | .name = "spitz:amber:charge", | |
257 | .default_trigger = "sharpsl-charge", | |
258 | .gpio = SPITZ_GPIO_LED_ORANGE, | |
259 | }, | |
260 | { | |
261 | .name = "spitz:green:hddactivity", | |
262 | .default_trigger = "ide-disk", | |
263 | .gpio = SPITZ_GPIO_LED_GREEN, | |
0dd28f1d | 264 | }, |
0dd28f1d RP |
265 | }; |
266 | ||
4fe3224f EM |
267 | static struct gpio_led_platform_data spitz_gpio_leds_info = { |
268 | .leds = spitz_gpio_leds, | |
269 | .num_leds = ARRAY_SIZE(spitz_gpio_leds), | |
0dd28f1d RP |
270 | }; |
271 | ||
3179108d | 272 | static struct platform_device spitzled_device = { |
4fe3224f | 273 | .name = "leds-gpio", |
3179108d | 274 | .id = -1, |
4fe3224f EM |
275 | .dev = { |
276 | .platform_data = &spitz_gpio_leds_info, | |
277 | }, | |
3179108d RP |
278 | }; |
279 | ||
859b7963 EM |
280 | #if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MODULE) |
281 | static struct pxa2xx_spi_master spitz_spi_info = { | |
282 | .num_chipselect = 3, | |
283 | }; | |
ca4d6cfc | 284 | |
3e36c0de EM |
285 | static void spitz_wait_for_hsync(void) |
286 | { | |
287 | while (gpio_get_value(SPITZ_GPIO_HSYNC)) | |
288 | cpu_relax(); | |
289 | ||
290 | while (!gpio_get_value(SPITZ_GPIO_HSYNC)) | |
291 | cpu_relax(); | |
292 | } | |
293 | ||
859b7963 EM |
294 | static struct ads7846_platform_data spitz_ads7846_info = { |
295 | .model = 7846, | |
296 | .vref_delay_usecs = 100, | |
297 | .x_plate_ohms = 419, | |
298 | .y_plate_ohms = 486, | |
299 | .gpio_pendown = SPITZ_GPIO_TP_INT, | |
3e36c0de | 300 | .wait_for_sync = spitz_wait_for_hsync, |
859b7963 | 301 | }; |
ca4d6cfc | 302 | |
859b7963 | 303 | static struct pxa2xx_spi_chip spitz_ads7846_chip = { |
46580c03 | 304 | .gpio_cs = SPITZ_GPIO_ADS7846_CS, |
859b7963 | 305 | }; |
ca4d6cfc | 306 | |
859b7963 | 307 | static void spitz_bl_kick_battery(void) |
ca4d6cfc | 308 | { |
859b7963 | 309 | void (*kick_batt)(void); |
ca4d6cfc | 310 | |
859b7963 EM |
311 | kick_batt = symbol_get(sharpsl_battery_kick); |
312 | if (kick_batt) { | |
313 | kick_batt(); | |
314 | symbol_put(sharpsl_battery_kick); | |
ca4d6cfc | 315 | } |
ca4d6cfc RP |
316 | } |
317 | ||
859b7963 EM |
318 | static struct corgi_lcd_platform_data spitz_lcdcon_info = { |
319 | .init_mode = CORGI_LCD_MODE_VGA, | |
320 | .max_intensity = 0x2f, | |
321 | .default_intensity = 0x1f, | |
322 | .limit_mask = 0x0b, | |
ff7a4c71 EM |
323 | .gpio_backlight_cont = SPITZ_GPIO_BACKLIGHT_CONT, |
324 | .gpio_backlight_on = SPITZ_GPIO_BACKLIGHT_ON, | |
859b7963 EM |
325 | .kick_battery = spitz_bl_kick_battery, |
326 | }; | |
ca4d6cfc | 327 | |
859b7963 | 328 | static struct pxa2xx_spi_chip spitz_lcdcon_chip = { |
46580c03 | 329 | .gpio_cs = SPITZ_GPIO_LCDCON_CS, |
0dd28f1d RP |
330 | }; |
331 | ||
859b7963 | 332 | static struct pxa2xx_spi_chip spitz_max1111_chip = { |
46580c03 | 333 | .gpio_cs = SPITZ_GPIO_MAX1111_CS, |
0dd28f1d RP |
334 | }; |
335 | ||
859b7963 EM |
336 | static struct spi_board_info spitz_spi_devices[] = { |
337 | { | |
338 | .modalias = "ads7846", | |
339 | .max_speed_hz = 1200000, | |
340 | .bus_num = 2, | |
341 | .chip_select = 0, | |
342 | .platform_data = &spitz_ads7846_info, | |
343 | .controller_data= &spitz_ads7846_chip, | |
344 | .irq = gpio_to_irq(SPITZ_GPIO_TP_INT), | |
345 | }, { | |
346 | .modalias = "corgi-lcd", | |
347 | .max_speed_hz = 50000, | |
348 | .bus_num = 2, | |
349 | .chip_select = 1, | |
350 | .platform_data = &spitz_lcdcon_info, | |
351 | .controller_data= &spitz_lcdcon_chip, | |
352 | }, { | |
353 | .modalias = "max1111", | |
354 | .max_speed_hz = 450000, | |
355 | .bus_num = 2, | |
356 | .chip_select = 2, | |
357 | .controller_data= &spitz_max1111_chip, | |
0dd28f1d | 358 | }, |
0dd28f1d RP |
359 | }; |
360 | ||
859b7963 EM |
361 | static void __init spitz_init_spi(void) |
362 | { | |
ff7a4c71 EM |
363 | if (machine_is_akita()) { |
364 | spitz_lcdcon_info.gpio_backlight_cont = AKITA_GPIO_BACKLIGHT_CONT; | |
365 | spitz_lcdcon_info.gpio_backlight_on = AKITA_GPIO_BACKLIGHT_ON; | |
366 | } | |
367 | ||
859b7963 EM |
368 | pxa2xx_set_spi_info(2, &spitz_spi_info); |
369 | spi_register_board_info(ARRAY_AND_SIZE(spitz_spi_devices)); | |
859b7963 EM |
370 | } |
371 | #else | |
372 | static inline void spitz_init_spi(void) {} | |
373 | #endif | |
0dd28f1d RP |
374 | |
375 | /* | |
376 | * MMC/SD Device | |
377 | * | |
378 | * The card detect interrupt isn't debounced so we delay it by 250ms | |
379 | * to give the card a chance to fully insert/eject. | |
380 | */ | |
381 | ||
382 | static struct pxamci_platform_data spitz_mci_platform_data; | |
383 | ||
40220c1a | 384 | static int spitz_mci_init(struct device *dev, irq_handler_t spitz_detect_int, void *data) |
0dd28f1d RP |
385 | { |
386 | int err; | |
387 | ||
dd5980d6 EM |
388 | err = gpio_request(SPITZ_GPIO_nSD_DETECT, "nSD_DETECT"); |
389 | if (err) | |
390 | goto err_out; | |
391 | ||
392 | err = gpio_request(SPITZ_GPIO_nSD_WP, "nSD_WP"); | |
393 | if (err) | |
394 | goto err_free_1; | |
395 | ||
396 | gpio_direction_input(SPITZ_GPIO_nSD_DETECT); | |
397 | gpio_direction_input(SPITZ_GPIO_nSD_WP); | |
0dd28f1d RP |
398 | |
399 | spitz_mci_platform_data.detect_delay = msecs_to_jiffies(250); | |
400 | ||
9ded96f2 | 401 | err = request_irq(SPITZ_IRQ_GPIO_nSD_DETECT, spitz_detect_int, |
dd5980d6 EM |
402 | IRQF_DISABLED | IRQF_TRIGGER_RISING | |
403 | IRQF_TRIGGER_FALLING, | |
9ded96f2 | 404 | "MMC card detect", data); |
dd5980d6 EM |
405 | if (err) { |
406 | pr_err("%s: MMC/SD: can't request MMC card detect IRQ\n", | |
407 | __func__); | |
408 | goto err_free_2; | |
409 | } | |
410 | return 0; | |
0dd28f1d | 411 | |
dd5980d6 EM |
412 | err_free_2: |
413 | gpio_free(SPITZ_GPIO_nSD_WP); | |
414 | err_free_1: | |
415 | gpio_free(SPITZ_GPIO_nSD_DETECT); | |
416 | err_out: | |
2687bd38 | 417 | return err; |
0dd28f1d RP |
418 | } |
419 | ||
0dd28f1d RP |
420 | static void spitz_mci_setpower(struct device *dev, unsigned int vdd) |
421 | { | |
422 | struct pxamci_platform_data* p_d = dev->platform_data; | |
423 | ||
a63ae442 RP |
424 | if (( 1 << vdd) & p_d->ocr_mask) |
425 | spitz_card_pwr_ctrl(SPITZ_PWR_SD, 0x0004); | |
426 | else | |
427 | spitz_card_pwr_ctrl(SPITZ_PWR_SD, 0x0000); | |
0dd28f1d RP |
428 | } |
429 | ||
430 | static int spitz_mci_get_ro(struct device *dev) | |
431 | { | |
dd5980d6 | 432 | return gpio_get_value(SPITZ_GPIO_nSD_WP); |
0dd28f1d RP |
433 | } |
434 | ||
435 | static void spitz_mci_exit(struct device *dev, void *data) | |
436 | { | |
437 | free_irq(SPITZ_IRQ_GPIO_nSD_DETECT, data); | |
dd5980d6 EM |
438 | gpio_free(SPITZ_GPIO_nSD_WP); |
439 | gpio_free(SPITZ_GPIO_nSD_DETECT); | |
0dd28f1d RP |
440 | } |
441 | ||
442 | static struct pxamci_platform_data spitz_mci_platform_data = { | |
443 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, | |
444 | .init = spitz_mci_init, | |
445 | .get_ro = spitz_mci_get_ro, | |
446 | .setpower = spitz_mci_setpower, | |
447 | .exit = spitz_mci_exit, | |
448 | }; | |
449 | ||
450 | ||
3125c68d RP |
451 | /* |
452 | * USB Host (OHCI) | |
453 | */ | |
454 | static int spitz_ohci_init(struct device *dev) | |
455 | { | |
dd5980d6 | 456 | int err; |
3125c68d | 457 | |
dd5980d6 EM |
458 | err = gpio_request(SPITZ_GPIO_USB_HOST, "USB_HOST"); |
459 | if (err) | |
460 | return err; | |
3125c68d | 461 | |
5e96adec EM |
462 | /* Only Port 2 is connected |
463 | * Setup USB Port 2 Output Control Register | |
464 | */ | |
3125c68d | 465 | UP2OCR = UP2OCR_HXS | UP2OCR_HXOE | UP2OCR_DPPDE | UP2OCR_DMPDE; |
3125c68d | 466 | |
097b5334 | 467 | return gpio_direction_output(SPITZ_GPIO_USB_HOST, 1); |
3125c68d RP |
468 | } |
469 | ||
a81b3868 DES |
470 | static void spitz_ohci_exit(struct device *dev) |
471 | { | |
472 | gpio_free(SPITZ_GPIO_USB_HOST); | |
473 | } | |
474 | ||
3125c68d RP |
475 | static struct pxaohci_platform_data spitz_ohci_platform_data = { |
476 | .port_mode = PMM_NPS_MODE, | |
477 | .init = spitz_ohci_init, | |
a81b3868 | 478 | .exit = spitz_ohci_exit, |
097b5334 | 479 | .flags = ENABLE_PORT_ALL | NO_OC_PROTECTION, |
0c27c5d5 | 480 | .power_budget = 150, |
3125c68d RP |
481 | }; |
482 | ||
483 | ||
dc07845d RP |
484 | /* |
485 | * Irda | |
486 | */ | |
fff14720 EM |
487 | static int spitz_irda_startup(struct device *dev) |
488 | { | |
489 | int rc; | |
490 | ||
491 | rc = gpio_request(SPITZ_GPIO_IR_ON, "IrDA on"); | |
492 | if (rc) | |
493 | goto err; | |
494 | ||
495 | rc = gpio_direction_output(SPITZ_GPIO_IR_ON, 1); | |
496 | if (rc) | |
497 | goto err_dir; | |
498 | ||
499 | return 0; | |
500 | ||
501 | err_dir: | |
502 | gpio_free(SPITZ_GPIO_IR_ON); | |
503 | err: | |
504 | return rc; | |
505 | } | |
506 | ||
507 | static void spitz_irda_shutdown(struct device *dev) | |
508 | { | |
509 | gpio_free(SPITZ_GPIO_IR_ON); | |
510 | } | |
511 | ||
dc07845d RP |
512 | static void spitz_irda_transceiver_mode(struct device *dev, int mode) |
513 | { | |
fff14720 | 514 | gpio_set_value(SPITZ_GPIO_IR_ON, mode & IR_OFF); |
0fc3ff31 | 515 | pxa2xx_transceiver_mode(dev, mode); |
dc07845d RP |
516 | } |
517 | ||
94cabd00 RP |
518 | #ifdef CONFIG_MACH_AKITA |
519 | static void akita_irda_transceiver_mode(struct device *dev, int mode) | |
520 | { | |
f72de663 | 521 | gpio_set_value(AKITA_GPIO_IR_ON, mode & IR_OFF); |
0fc3ff31 | 522 | pxa2xx_transceiver_mode(dev, mode); |
94cabd00 RP |
523 | } |
524 | #endif | |
525 | ||
dc07845d | 526 | static struct pxaficp_platform_data spitz_ficp_platform_data = { |
fff14720 EM |
527 | .transceiver_cap = IR_SIRMODE | IR_OFF, |
528 | .transceiver_mode = spitz_irda_transceiver_mode, | |
529 | .startup = spitz_irda_startup, | |
530 | .shutdown = spitz_irda_shutdown, | |
dc07845d RP |
531 | }; |
532 | ||
533 | ||
0dd28f1d RP |
534 | /* |
535 | * Spitz PXA Framebuffer | |
536 | */ | |
d14b272b RP |
537 | |
538 | static struct pxafb_mode_info spitz_pxafb_modes[] = { | |
539 | { | |
540 | .pixclock = 19231, | |
541 | .xres = 480, | |
542 | .yres = 640, | |
543 | .bpp = 16, | |
544 | .hsync_len = 40, | |
545 | .left_margin = 46, | |
546 | .right_margin = 125, | |
547 | .vsync_len = 3, | |
548 | .upper_margin = 1, | |
549 | .lower_margin = 0, | |
550 | .sync = 0, | |
551 | },{ | |
552 | .pixclock = 134617, | |
553 | .xres = 240, | |
554 | .yres = 320, | |
555 | .bpp = 16, | |
556 | .hsync_len = 20, | |
557 | .left_margin = 20, | |
558 | .right_margin = 46, | |
559 | .vsync_len = 2, | |
560 | .upper_margin = 1, | |
561 | .lower_margin = 0, | |
562 | .sync = 0, | |
563 | }, | |
564 | }; | |
565 | ||
566 | static struct pxafb_mach_info spitz_pxafb_info = { | |
567 | .modes = &spitz_pxafb_modes[0], | |
568 | .num_modes = 2, | |
569 | .fixed_modes = 1, | |
79009a06 | 570 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_ALTERNATE_MAPPING, |
0dd28f1d RP |
571 | }; |
572 | ||
6af7a8eb DB |
573 | static struct mtd_partition sharpsl_nand_partitions[] = { |
574 | { | |
575 | .name = "System Area", | |
576 | .offset = 0, | |
577 | .size = 7 * 1024 * 1024, | |
578 | }, | |
579 | { | |
580 | .name = "Root Filesystem", | |
581 | .offset = 7 * 1024 * 1024, | |
582 | }, | |
583 | { | |
584 | .name = "Home Filesystem", | |
585 | .offset = MTDPART_OFS_APPEND, | |
586 | .size = MTDPART_SIZ_FULL, | |
587 | }, | |
588 | }; | |
589 | ||
590 | static uint8_t scan_ff_pattern[] = { 0xff, 0xff }; | |
591 | ||
592 | static struct nand_bbt_descr sharpsl_bbt = { | |
593 | .options = 0, | |
594 | .offs = 4, | |
595 | .len = 2, | |
596 | .pattern = scan_ff_pattern | |
597 | }; | |
598 | ||
599 | static struct sharpsl_nand_platform_data sharpsl_nand_platform_data = { | |
600 | .badblock_pattern = &sharpsl_bbt, | |
601 | .partitions = sharpsl_nand_partitions, | |
602 | .nr_partitions = ARRAY_SIZE(sharpsl_nand_partitions), | |
603 | }; | |
604 | ||
605 | static struct resource sharpsl_nand_resources[] = { | |
606 | { | |
607 | .start = 0x0C000000, | |
608 | .end = 0x0C000FFF, | |
609 | .flags = IORESOURCE_MEM, | |
610 | }, | |
611 | }; | |
612 | ||
613 | static struct platform_device sharpsl_nand_device = { | |
614 | .name = "sharpsl-nand", | |
615 | .id = -1, | |
616 | .resource = sharpsl_nand_resources, | |
617 | .num_resources = ARRAY_SIZE(sharpsl_nand_resources), | |
618 | .dev.platform_data = &sharpsl_nand_platform_data, | |
619 | }; | |
620 | ||
0dd28f1d | 621 | |
e5d3bf3c DB |
622 | static struct mtd_partition sharpsl_rom_parts[] = { |
623 | { | |
624 | .name ="Boot PROM Filesystem", | |
625 | .offset = 0x00140000, | |
626 | .size = MTDPART_SIZ_FULL, | |
627 | }, | |
628 | }; | |
629 | ||
630 | static struct physmap_flash_data sharpsl_rom_data = { | |
631 | .width = 2, | |
632 | .nr_parts = ARRAY_SIZE(sharpsl_rom_parts), | |
633 | .parts = sharpsl_rom_parts, | |
634 | }; | |
635 | ||
636 | static struct resource sharpsl_rom_resources[] = { | |
637 | { | |
638 | .start = 0x00000000, | |
639 | .end = 0x007fffff, | |
640 | .flags = IORESOURCE_MEM, | |
641 | }, | |
642 | }; | |
643 | ||
644 | static struct platform_device sharpsl_rom_device = { | |
645 | .name = "physmap-flash", | |
646 | .id = -1, | |
647 | .resource = sharpsl_rom_resources, | |
648 | .num_resources = ARRAY_SIZE(sharpsl_rom_resources), | |
649 | .dev.platform_data = &sharpsl_rom_data, | |
650 | }; | |
651 | ||
0dd28f1d RP |
652 | static struct platform_device *devices[] __initdata = { |
653 | &spitzscoop_device, | |
0dd28f1d | 654 | &spitzkbd_device, |
3179108d | 655 | &spitzled_device, |
6af7a8eb | 656 | &sharpsl_nand_device, |
e5d3bf3c | 657 | &sharpsl_rom_device, |
0dd28f1d RP |
658 | }; |
659 | ||
74617fb6 RP |
660 | static void spitz_poweroff(void) |
661 | { | |
be093beb | 662 | arm_machine_restart('g', NULL); |
74617fb6 RP |
663 | } |
664 | ||
be093beb | 665 | static void spitz_restart(char mode, const char *cmd) |
74617fb6 RP |
666 | { |
667 | /* Bootloader magic for a reboot */ | |
668 | if((MSC0 & 0xffff0000) == 0x7ff00000) | |
669 | MSC0 = (MSC0 & 0xffff) | 0x7ee00000; | |
670 | ||
671 | spitz_poweroff(); | |
672 | } | |
673 | ||
0dd28f1d RP |
674 | static void __init common_init(void) |
675 | { | |
216e3b7a | 676 | init_gpio_reset(SPITZ_GPIO_ON_RESET, 1, 0); |
74617fb6 RP |
677 | pm_power_off = spitz_poweroff; |
678 | arm_pm_restart = spitz_restart; | |
679 | ||
6af7a8eb DB |
680 | if (machine_is_spitz()) { |
681 | sharpsl_nand_partitions[1].size = 5 * 1024 * 1024; | |
682 | } else if (machine_is_akita()) { | |
683 | sharpsl_nand_partitions[1].size = 58 * 1024 * 1024; | |
684 | } else if (machine_is_borzoi()) { | |
685 | sharpsl_nand_partitions[1].size = 32 * 1024 * 1024; | |
686 | } | |
687 | ||
0dd28f1d RP |
688 | PMCR = 0x00; |
689 | ||
0dd28f1d RP |
690 | /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */ |
691 | PCFR |= PCFR_OPDE; | |
692 | ||
5e96adec | 693 | pxa2xx_mfp_config(ARRAY_AND_SIZE(spitz_pin_config)); |
0dd28f1d | 694 | |
859b7963 | 695 | spitz_init_spi(); |
0dd28f1d RP |
696 | |
697 | platform_add_devices(devices, ARRAY_SIZE(devices)); | |
698 | pxa_set_mci_info(&spitz_mci_platform_data); | |
3125c68d | 699 | pxa_set_ohci_info(&spitz_ohci_platform_data); |
dc07845d | 700 | pxa_set_ficp_info(&spitz_ficp_platform_data); |
0dd28f1d | 701 | set_pxa_fb_info(&spitz_pxafb_info); |
f8787fdc | 702 | pxa_set_i2c_info(NULL); |
0dd28f1d RP |
703 | } |
704 | ||
ca4d6cfc | 705 | #if defined(CONFIG_MACH_SPITZ) || defined(CONFIG_MACH_BORZOI) |
0dd28f1d RP |
706 | static void __init spitz_init(void) |
707 | { | |
a63ae442 RP |
708 | platform_scoop_config = &spitz_pcmcia_config; |
709 | ||
0dd28f1d RP |
710 | common_init(); |
711 | ||
712 | platform_device_register(&spitzscoop2_device); | |
713 | } | |
ca4d6cfc | 714 | #endif |
0dd28f1d | 715 | |
94cabd00 RP |
716 | #ifdef CONFIG_MACH_AKITA |
717 | /* | |
718 | * Akita IO Expander | |
719 | */ | |
f72de663 EM |
720 | static struct pca953x_platform_data akita_ioexp = { |
721 | .gpio_base = AKITA_IOEXP_GPIO_BASE, | |
94cabd00 RP |
722 | }; |
723 | ||
f72de663 EM |
724 | static struct i2c_board_info akita_i2c_board_info[] = { |
725 | { | |
726 | .type = "max7310", | |
727 | .addr = 0x18, | |
728 | .platform_data = &akita_ioexp, | |
729 | }, | |
730 | }; | |
ca4d6cfc | 731 | |
6af7a8eb DB |
732 | static struct nand_bbt_descr sharpsl_akita_bbt = { |
733 | .options = 0, | |
734 | .offs = 4, | |
735 | .len = 1, | |
736 | .pattern = scan_ff_pattern | |
737 | }; | |
738 | ||
739 | static struct nand_ecclayout akita_oobinfo = { | |
740 | .eccbytes = 24, | |
741 | .eccpos = { | |
742 | 0x5, 0x1, 0x2, 0x3, 0x6, 0x7, 0x15, 0x11, | |
743 | 0x12, 0x13, 0x16, 0x17, 0x25, 0x21, 0x22, 0x23, | |
744 | 0x26, 0x27, 0x35, 0x31, 0x32, 0x33, 0x36, 0x37}, | |
745 | .oobfree = {{0x08, 0x09}} | |
746 | }; | |
747 | ||
94cabd00 RP |
748 | static void __init akita_init(void) |
749 | { | |
750 | spitz_ficp_platform_data.transceiver_mode = akita_irda_transceiver_mode; | |
751 | ||
6af7a8eb DB |
752 | sharpsl_nand_platform_data.badblock_pattern = &sharpsl_akita_bbt; |
753 | sharpsl_nand_platform_data.ecc_layout = &akita_oobinfo; | |
754 | ||
94cabd00 RP |
755 | /* We just pretend the second element of the array doesn't exist */ |
756 | spitz_pcmcia_config.num_devs = 1; | |
757 | platform_scoop_config = &spitz_pcmcia_config; | |
94cabd00 | 758 | |
f72de663 | 759 | i2c_register_board_info(0, ARRAY_AND_SIZE(akita_i2c_board_info)); |
94cabd00 | 760 | |
94cabd00 RP |
761 | common_init(); |
762 | } | |
763 | #endif | |
764 | ||
0dd28f1d RP |
765 | static void __init fixup_spitz(struct machine_desc *desc, |
766 | struct tag *tags, char **cmdline, struct meminfo *mi) | |
767 | { | |
768 | sharpsl_save_param(); | |
769 | mi->nr_banks = 1; | |
770 | mi->bank[0].start = 0xa0000000; | |
771 | mi->bank[0].node = 0; | |
772 | mi->bank[0].size = (64*1024*1024); | |
773 | } | |
774 | ||
775 | #ifdef CONFIG_MACH_SPITZ | |
776 | MACHINE_START(SPITZ, "SHARP Spitz") | |
0dd28f1d RP |
777 | .phys_io = 0x40000000, |
778 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | |
779 | .fixup = fixup_spitz, | |
780 | .map_io = pxa_map_io, | |
cd49104d | 781 | .init_irq = pxa27x_init_irq, |
0dd28f1d RP |
782 | .init_machine = spitz_init, |
783 | .timer = &pxa_timer, | |
784 | MACHINE_END | |
785 | #endif | |
786 | ||
787 | #ifdef CONFIG_MACH_BORZOI | |
788 | MACHINE_START(BORZOI, "SHARP Borzoi") | |
0dd28f1d RP |
789 | .phys_io = 0x40000000, |
790 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | |
791 | .fixup = fixup_spitz, | |
792 | .map_io = pxa_map_io, | |
cd49104d | 793 | .init_irq = pxa27x_init_irq, |
0dd28f1d RP |
794 | .init_machine = spitz_init, |
795 | .timer = &pxa_timer, | |
796 | MACHINE_END | |
797 | #endif | |
94cabd00 RP |
798 | |
799 | #ifdef CONFIG_MACH_AKITA | |
800 | MACHINE_START(AKITA, "SHARP Akita") | |
94cabd00 RP |
801 | .phys_io = 0x40000000, |
802 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | |
803 | .fixup = fixup_spitz, | |
804 | .map_io = pxa_map_io, | |
cd49104d | 805 | .init_irq = pxa27x_init_irq, |
94cabd00 RP |
806 | .init_machine = akita_init, |
807 | .timer = &pxa_timer, | |
808 | MACHINE_END | |
809 | #endif |