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8ad68bbf CM |
1 | /* |
2 | * linux/arch/arm/mach-realview/core.c | |
3 | * | |
4 | * Copyright (C) 1999 - 2003 ARM Limited | |
5 | * Copyright (C) 2000 Deep Blue Solutions Ltd | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
20 | */ | |
8ad68bbf | 21 | #include <linux/init.h> |
1be7228d | 22 | #include <linux/platform_device.h> |
8ad68bbf | 23 | #include <linux/dma-mapping.h> |
edbaa603 | 24 | #include <linux/device.h> |
8ad68bbf | 25 | #include <linux/interrupt.h> |
a62c80e5 RK |
26 | #include <linux/amba/bus.h> |
27 | #include <linux/amba/clcd.h> | |
11c32d7b | 28 | #include <linux/platform_data/video-clcd-versatile.h> |
fced80c7 | 29 | #include <linux/io.h> |
c5142e84 | 30 | #include <linux/smsc911x.h> |
b70661c7 | 31 | #include <linux/smc91x.h> |
6be62ba2 | 32 | #include <linux/ata_platform.h> |
6ef297f8 | 33 | #include <linux/amba/mmci.h> |
5a0e3ad6 | 34 | #include <linux/gfp.h> |
b8b87aef | 35 | #include <linux/mtd/physmap.h> |
1c2f87c2 | 36 | #include <linux/memblock.h> |
8ad68bbf | 37 | |
a09e64fb | 38 | #include <mach/hardware.h> |
8ad68bbf | 39 | #include <asm/irq.h> |
68c3d935 | 40 | #include <asm/mach-types.h> |
c5a0adb5 | 41 | #include <asm/hardware/icst.h> |
8ad68bbf CM |
42 | |
43 | #include <asm/mach/arch.h> | |
8ad68bbf | 44 | #include <asm/mach/irq.h> |
8ad68bbf | 45 | #include <asm/mach/map.h> |
8ad68bbf | 46 | |
8ad68bbf | 47 | |
ee8c9571 CM |
48 | #include <mach/platform.h> |
49 | #include <mach/irqs.h> | |
8a9618f5 | 50 | #include <asm/hardware/timer-sp.h> |
ee8c9571 | 51 | |
1da0c89c RK |
52 | #include <plat/sched_clock.h> |
53 | ||
8ad68bbf | 54 | #include "core.h" |
8ad68bbf | 55 | |
8ad68bbf CM |
56 | #define REALVIEW_FLASHCTRL (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_FLASH_OFFSET) |
57 | ||
667f390b | 58 | static void realview_flash_set_vpp(struct platform_device *pdev, int on) |
8ad68bbf CM |
59 | { |
60 | u32 val; | |
61 | ||
62 | val = __raw_readl(REALVIEW_FLASHCTRL); | |
63 | if (on) | |
64 | val |= REALVIEW_FLASHPROG_FLVPPEN; | |
65 | else | |
66 | val &= ~REALVIEW_FLASHPROG_FLVPPEN; | |
67 | __raw_writel(val, REALVIEW_FLASHCTRL); | |
68 | } | |
69 | ||
b8b87aef | 70 | static struct physmap_flash_data realview_flash_data = { |
8ad68bbf | 71 | .width = 4, |
8ad68bbf CM |
72 | .set_vpp = realview_flash_set_vpp, |
73 | }; | |
74 | ||
8ad68bbf | 75 | struct platform_device realview_flash_device = { |
b8b87aef | 76 | .name = "physmap-flash", |
8ad68bbf CM |
77 | .id = 0, |
78 | .dev = { | |
79 | .platform_data = &realview_flash_data, | |
80 | }, | |
8ad68bbf CM |
81 | }; |
82 | ||
a44ddfd5 CM |
83 | int realview_flash_register(struct resource *res, u32 num) |
84 | { | |
85 | realview_flash_device.resource = res; | |
86 | realview_flash_device.num_resources = num; | |
87 | return platform_device_register(&realview_flash_device); | |
88 | } | |
89 | ||
c5142e84 SG |
90 | static struct smsc911x_platform_config smsc911x_config = { |
91 | .flags = SMSC911X_USE_32BIT, | |
92 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH, | |
93 | .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, | |
94 | .phy_interface = PHY_INTERFACE_MODE_MII, | |
0a5b2f6b CM |
95 | }; |
96 | ||
b70661c7 AB |
97 | static struct smc91x_platdata smc91x_platdata = { |
98 | .flags = SMC91X_USE_32BIT | SMC91X_NOWAIT, | |
99 | }; | |
100 | ||
0a381330 | 101 | static struct platform_device realview_eth_device = { |
c5142e84 | 102 | .name = "smsc911x", |
0a381330 CM |
103 | .id = 0, |
104 | .num_resources = 2, | |
105 | }; | |
106 | ||
107 | int realview_eth_register(const char *name, struct resource *res) | |
108 | { | |
109 | if (name) | |
110 | realview_eth_device.name = name; | |
111 | realview_eth_device.resource = res; | |
c5142e84 SG |
112 | if (strcmp(realview_eth_device.name, "smsc911x") == 0) |
113 | realview_eth_device.dev.platform_data = &smsc911x_config; | |
b70661c7 AB |
114 | else |
115 | realview_eth_device.dev.platform_data = &smc91x_platdata; | |
0a381330 CM |
116 | |
117 | return platform_device_register(&realview_eth_device); | |
7db21712 CM |
118 | } |
119 | ||
120 | struct platform_device realview_usb_device = { | |
121 | .name = "isp1760", | |
122 | .num_resources = 2, | |
123 | }; | |
124 | ||
125 | int realview_usb_register(struct resource *res) | |
126 | { | |
127 | realview_usb_device.resource = res; | |
128 | return platform_device_register(&realview_usb_device); | |
0a381330 CM |
129 | } |
130 | ||
6be62ba2 CM |
131 | static struct pata_platform_info pata_platform_data = { |
132 | .ioport_shift = 1, | |
133 | }; | |
134 | ||
135 | static struct resource pata_resources[] = { | |
136 | [0] = { | |
137 | .start = REALVIEW_CF_BASE, | |
138 | .end = REALVIEW_CF_BASE + 0xff, | |
139 | .flags = IORESOURCE_MEM, | |
140 | }, | |
141 | [1] = { | |
142 | .start = REALVIEW_CF_BASE + 0x100, | |
143 | .end = REALVIEW_CF_BASE + SZ_4K - 1, | |
144 | .flags = IORESOURCE_MEM, | |
145 | }, | |
146 | }; | |
147 | ||
148 | struct platform_device realview_cf_device = { | |
149 | .name = "pata_platform", | |
150 | .id = -1, | |
151 | .num_resources = ARRAY_SIZE(pata_resources), | |
152 | .resource = pata_resources, | |
153 | .dev = { | |
154 | .platform_data = &pata_platform_data, | |
155 | }, | |
156 | }; | |
157 | ||
e4ecf2bd LW |
158 | static struct resource realview_leds_resources[] = { |
159 | { | |
160 | .start = REALVIEW_SYS_BASE + REALVIEW_SYS_LED_OFFSET, | |
161 | .end = REALVIEW_SYS_BASE + REALVIEW_SYS_LED_OFFSET + 4, | |
162 | .flags = IORESOURCE_MEM, | |
163 | }, | |
164 | }; | |
165 | ||
166 | struct platform_device realview_leds_device = { | |
167 | .name = "versatile-leds", | |
168 | .id = -1, | |
169 | .num_resources = ARRAY_SIZE(realview_leds_resources), | |
170 | .resource = realview_leds_resources, | |
171 | }; | |
172 | ||
6b65cd74 RK |
173 | static struct resource realview_i2c_resource = { |
174 | .start = REALVIEW_I2C_BASE, | |
175 | .end = REALVIEW_I2C_BASE + SZ_4K - 1, | |
176 | .flags = IORESOURCE_MEM, | |
177 | }; | |
178 | ||
179 | struct platform_device realview_i2c_device = { | |
180 | .name = "versatile-i2c", | |
533ad5e6 | 181 | .id = 0, |
6b65cd74 RK |
182 | .num_resources = 1, |
183 | .resource = &realview_i2c_resource, | |
184 | }; | |
185 | ||
533ad5e6 CM |
186 | static struct i2c_board_info realview_i2c_board_info[] = { |
187 | { | |
64e8be6e | 188 | I2C_BOARD_INFO("ds1338", 0xd0 >> 1), |
533ad5e6 CM |
189 | }, |
190 | }; | |
191 | ||
192 | static int __init realview_i2c_init(void) | |
193 | { | |
194 | return i2c_register_board_info(0, realview_i2c_board_info, | |
195 | ARRAY_SIZE(realview_i2c_board_info)); | |
196 | } | |
197 | arch_initcall(realview_i2c_init); | |
198 | ||
8ad68bbf CM |
199 | #define REALVIEW_SYSMCI (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_MCI_OFFSET) |
200 | ||
98b0979f RK |
201 | /* |
202 | * This is only used if GPIOLIB support is disabled | |
203 | */ | |
8ad68bbf CM |
204 | static unsigned int realview_mmc_status(struct device *dev) |
205 | { | |
206 | struct amba_device *adev = container_of(dev, struct amba_device, dev); | |
207 | u32 mask; | |
208 | ||
48f1d5a3 LW |
209 | if (machine_is_realview_pb1176()) { |
210 | static bool inserted = false; | |
211 | ||
212 | /* | |
213 | * The PB1176 does not have the status register, | |
214 | * assume it is inserted at startup, then invert | |
215 | * for each call so card insertion/removal will | |
216 | * be detected anyway. This will not be called if | |
217 | * GPIO on PL061 is active, which is the proper | |
218 | * way to do this on the PB1176. | |
219 | */ | |
220 | inserted = !inserted; | |
221 | return inserted ? 0 : 1; | |
222 | } | |
223 | ||
8ad68bbf CM |
224 | if (adev->res.start == REALVIEW_MMCI0_BASE) |
225 | mask = 1; | |
226 | else | |
227 | mask = 2; | |
228 | ||
74bc8093 | 229 | return readl(REALVIEW_SYSMCI) & mask; |
8ad68bbf CM |
230 | } |
231 | ||
6ef297f8 | 232 | struct mmci_platform_data realview_mmc0_plat_data = { |
8ad68bbf CM |
233 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, |
234 | .status = realview_mmc_status, | |
98b0979f RK |
235 | .gpio_wp = 17, |
236 | .gpio_cd = 16, | |
29719445 | 237 | .cd_invert = true, |
8ad68bbf CM |
238 | }; |
239 | ||
6ef297f8 | 240 | struct mmci_platform_data realview_mmc1_plat_data = { |
8ad68bbf CM |
241 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, |
242 | .status = realview_mmc_status, | |
98b0979f RK |
243 | .gpio_wp = 19, |
244 | .gpio_cd = 18, | |
29719445 | 245 | .cd_invert = true, |
8ad68bbf CM |
246 | }; |
247 | ||
631e55f9 | 248 | void __init realview_init_early(void) |
cf30fb4a | 249 | { |
631e55f9 RK |
250 | void __iomem *sys = __io_address(REALVIEW_SYS_BASE); |
251 | ||
631e55f9 | 252 | versatile_sched_clock_init(sys + REALVIEW_SYS_24MHz_OFFSET, 24000000); |
cf30fb4a | 253 | } |
cf30fb4a | 254 | |
8ad68bbf CM |
255 | /* |
256 | * CLCD support. | |
257 | */ | |
8ad68bbf CM |
258 | #define SYS_CLCD_NLCDIOON (1 << 2) |
259 | #define SYS_CLCD_VDDPOSSWITCH (1 << 3) | |
260 | #define SYS_CLCD_PWR3V5SWITCH (1 << 4) | |
261 | #define SYS_CLCD_ID_MASK (0x1f << 8) | |
262 | #define SYS_CLCD_ID_SANYO_3_8 (0x00 << 8) | |
263 | #define SYS_CLCD_ID_UNKNOWN_8_4 (0x01 << 8) | |
264 | #define SYS_CLCD_ID_EPSON_2_2 (0x02 << 8) | |
265 | #define SYS_CLCD_ID_SANYO_2_5 (0x07 << 8) | |
266 | #define SYS_CLCD_ID_VGA (0x1f << 8) | |
267 | ||
8ad68bbf CM |
268 | /* |
269 | * Disable all display connectors on the interface module. | |
270 | */ | |
271 | static void realview_clcd_disable(struct clcd_fb *fb) | |
272 | { | |
273 | void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET; | |
274 | u32 val; | |
275 | ||
276 | val = readl(sys_clcd); | |
277 | val &= ~SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH; | |
278 | writel(val, sys_clcd); | |
279 | } | |
280 | ||
281 | /* | |
282 | * Enable the relevant connector on the interface module. | |
283 | */ | |
284 | static void realview_clcd_enable(struct clcd_fb *fb) | |
285 | { | |
286 | void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET; | |
287 | u32 val; | |
288 | ||
8ad68bbf | 289 | /* |
9e7714d0 | 290 | * Enable the PSUs |
8ad68bbf | 291 | */ |
9e7714d0 | 292 | val = readl(sys_clcd); |
8ad68bbf CM |
293 | val |= SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH; |
294 | writel(val, sys_clcd); | |
295 | } | |
296 | ||
3cb5ee49 RK |
297 | /* |
298 | * Detect which LCD panel is connected, and return the appropriate | |
299 | * clcd_panel structure. Note: we do not have any information on | |
300 | * the required timings for the 8.4in panel, so we presently assume | |
301 | * VGA timings. | |
302 | */ | |
8ad68bbf CM |
303 | static int realview_clcd_setup(struct clcd_fb *fb) |
304 | { | |
3cb5ee49 RK |
305 | void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET; |
306 | const char *panel_name, *vga_panel_name; | |
c34a1025 | 307 | unsigned long framesize; |
3cb5ee49 | 308 | u32 val; |
8ad68bbf | 309 | |
3cb5ee49 | 310 | if (machine_is_realview_eb()) { |
c34a1025 CT |
311 | /* VGA, 16bpp */ |
312 | framesize = 640 * 480 * 2; | |
3cb5ee49 RK |
313 | vga_panel_name = "VGA"; |
314 | } else { | |
c34a1025 CT |
315 | /* XVGA, 16bpp */ |
316 | framesize = 1024 * 768 * 2; | |
3cb5ee49 | 317 | vga_panel_name = "XVGA"; |
8ad68bbf CM |
318 | } |
319 | ||
3cb5ee49 RK |
320 | val = readl(sys_clcd) & SYS_CLCD_ID_MASK; |
321 | if (val == SYS_CLCD_ID_SANYO_3_8) | |
322 | panel_name = "Sanyo TM38QV67A02A"; | |
323 | else if (val == SYS_CLCD_ID_SANYO_2_5) | |
324 | panel_name = "Sanyo QVGA Portrait"; | |
325 | else if (val == SYS_CLCD_ID_EPSON_2_2) | |
326 | panel_name = "Epson L2F50113T00"; | |
327 | else if (val == SYS_CLCD_ID_VGA) | |
328 | panel_name = vga_panel_name; | |
329 | else { | |
330 | pr_err("CLCD: unknown LCD panel ID 0x%08x, using VGA\n", val); | |
331 | panel_name = vga_panel_name; | |
332 | } | |
8ad68bbf | 333 | |
3cb5ee49 RK |
334 | fb->panel = versatile_clcd_get_panel(panel_name); |
335 | if (!fb->panel) | |
336 | return -EINVAL; | |
8ad68bbf | 337 | |
3cb5ee49 | 338 | return versatile_clcd_setup_dma(fb, framesize); |
8ad68bbf CM |
339 | } |
340 | ||
341 | struct clcd_board clcd_plat_data = { | |
342 | .name = "RealView", | |
3cb5ee49 | 343 | .caps = CLCD_CAP_ALL, |
8ad68bbf CM |
344 | .check = clcdfb_check, |
345 | .decode = clcdfb_decode, | |
346 | .disable = realview_clcd_disable, | |
347 | .enable = realview_clcd_enable, | |
348 | .setup = realview_clcd_setup, | |
3cb5ee49 RK |
349 | .mmap = versatile_clcd_mmap_dma, |
350 | .remove = versatile_clcd_remove_dma, | |
8ad68bbf CM |
351 | }; |
352 | ||
8ad68bbf CM |
353 | /* |
354 | * Where is the timer (VA)? | |
355 | */ | |
80192735 CM |
356 | void __iomem *timer0_va_base; |
357 | void __iomem *timer1_va_base; | |
358 | void __iomem *timer2_va_base; | |
359 | void __iomem *timer3_va_base; | |
8ad68bbf | 360 | |
8ad68bbf | 361 | /* |
a8655e83 | 362 | * Set up the clock source and clock events devices |
8ad68bbf | 363 | */ |
8cc4c548 | 364 | void __init realview_timer_init(unsigned int timer_irq) |
8ad68bbf CM |
365 | { |
366 | u32 val; | |
367 | ||
368 | /* | |
369 | * set clock frequency: | |
370 | * REALVIEW_REFCLK is 32KHz | |
371 | * REALVIEW_TIMCLK is 1MHz | |
372 | */ | |
373 | val = readl(__io_address(REALVIEW_SCTL_BASE)); | |
374 | writel((REALVIEW_TIMCLK << REALVIEW_TIMER1_EnSel) | | |
375 | (REALVIEW_TIMCLK << REALVIEW_TIMER2_EnSel) | | |
376 | (REALVIEW_TIMCLK << REALVIEW_TIMER3_EnSel) | | |
377 | (REALVIEW_TIMCLK << REALVIEW_TIMER4_EnSel) | val, | |
378 | __io_address(REALVIEW_SCTL_BASE)); | |
379 | ||
380 | /* | |
381 | * Initialise to a known state (all timers off) | |
382 | */ | |
1e5f0519 SH |
383 | sp804_timer_disable(timer0_va_base); |
384 | sp804_timer_disable(timer1_va_base); | |
385 | sp804_timer_disable(timer2_va_base); | |
386 | sp804_timer_disable(timer3_va_base); | |
8ad68bbf | 387 | |
fb593cf3 | 388 | sp804_clocksource_init(timer3_va_base, "timer3"); |
57cc4f7d | 389 | sp804_clockevents_init(timer0_va_base, timer_irq, "timer0"); |
8ad68bbf | 390 | } |
5b39d154 CM |
391 | |
392 | /* | |
393 | * Setup the memory banks. | |
394 | */ | |
1c2f87c2 | 395 | void realview_fixup(struct tag *tags, char **from) |
5b39d154 CM |
396 | { |
397 | /* | |
398 | * Most RealView platforms have 512MB contiguous RAM at 0x70000000. | |
399 | * Half of this is mirrored at 0. | |
400 | */ | |
401 | #ifdef CONFIG_REALVIEW_HIGH_PHYS_OFFSET | |
1c2f87c2 | 402 | memblock_add(0x70000000, SZ_512M); |
5b39d154 | 403 | #else |
1c2f87c2 | 404 | memblock_add(0, SZ_256M); |
5b39d154 CM |
405 | #endif |
406 | } |