ARM: plat-versatile: convert LEDs to platform device
[deliverable/linux.git] / arch / arm / mach-realview / core.c
CommitLineData
8ad68bbf
CM
1/*
2 * linux/arch/arm/mach-realview/core.c
3 *
4 * Copyright (C) 1999 - 2003 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
8ad68bbf 21#include <linux/init.h>
1be7228d 22#include <linux/platform_device.h>
8ad68bbf 23#include <linux/dma-mapping.h>
edbaa603 24#include <linux/device.h>
8ad68bbf 25#include <linux/interrupt.h>
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26#include <linux/amba/bus.h>
27#include <linux/amba/clcd.h>
fced80c7 28#include <linux/io.h>
c5142e84 29#include <linux/smsc911x.h>
6be62ba2 30#include <linux/ata_platform.h>
6ef297f8 31#include <linux/amba/mmci.h>
5a0e3ad6 32#include <linux/gfp.h>
b8b87aef 33#include <linux/mtd/physmap.h>
8ad68bbf 34
a09e64fb 35#include <mach/hardware.h>
8ad68bbf 36#include <asm/irq.h>
68c3d935 37#include <asm/mach-types.h>
8ad68bbf 38#include <asm/hardware/arm_timer.h>
c5a0adb5 39#include <asm/hardware/icst.h>
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40
41#include <asm/mach/arch.h>
8ad68bbf 42#include <asm/mach/irq.h>
8ad68bbf 43#include <asm/mach/map.h>
8ad68bbf 44
8ad68bbf 45
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CM
46#include <mach/platform.h>
47#include <mach/irqs.h>
8a9618f5 48#include <asm/hardware/timer-sp.h>
ee8c9571 49
3cb5ee49 50#include <plat/clcd.h>
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51#include <plat/sched_clock.h>
52
8ad68bbf 53#include "core.h"
8ad68bbf 54
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55#define REALVIEW_FLASHCTRL (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_FLASH_OFFSET)
56
667f390b 57static void realview_flash_set_vpp(struct platform_device *pdev, int on)
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CM
58{
59 u32 val;
60
61 val = __raw_readl(REALVIEW_FLASHCTRL);
62 if (on)
63 val |= REALVIEW_FLASHPROG_FLVPPEN;
64 else
65 val &= ~REALVIEW_FLASHPROG_FLVPPEN;
66 __raw_writel(val, REALVIEW_FLASHCTRL);
67}
68
b8b87aef 69static struct physmap_flash_data realview_flash_data = {
8ad68bbf 70 .width = 4,
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71 .set_vpp = realview_flash_set_vpp,
72};
73
8ad68bbf 74struct platform_device realview_flash_device = {
b8b87aef 75 .name = "physmap-flash",
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76 .id = 0,
77 .dev = {
78 .platform_data = &realview_flash_data,
79 },
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80};
81
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82int realview_flash_register(struct resource *res, u32 num)
83{
84 realview_flash_device.resource = res;
85 realview_flash_device.num_resources = num;
86 return platform_device_register(&realview_flash_device);
87}
88
c5142e84
SG
89static struct smsc911x_platform_config smsc911x_config = {
90 .flags = SMSC911X_USE_32BIT,
91 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
92 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
93 .phy_interface = PHY_INTERFACE_MODE_MII,
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94};
95
0a381330 96static struct platform_device realview_eth_device = {
c5142e84 97 .name = "smsc911x",
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98 .id = 0,
99 .num_resources = 2,
100};
101
102int realview_eth_register(const char *name, struct resource *res)
103{
104 if (name)
105 realview_eth_device.name = name;
106 realview_eth_device.resource = res;
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107 if (strcmp(realview_eth_device.name, "smsc911x") == 0)
108 realview_eth_device.dev.platform_data = &smsc911x_config;
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109
110 return platform_device_register(&realview_eth_device);
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111}
112
113struct platform_device realview_usb_device = {
114 .name = "isp1760",
115 .num_resources = 2,
116};
117
118int realview_usb_register(struct resource *res)
119{
120 realview_usb_device.resource = res;
121 return platform_device_register(&realview_usb_device);
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122}
123
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124static struct pata_platform_info pata_platform_data = {
125 .ioport_shift = 1,
126};
127
128static struct resource pata_resources[] = {
129 [0] = {
130 .start = REALVIEW_CF_BASE,
131 .end = REALVIEW_CF_BASE + 0xff,
132 .flags = IORESOURCE_MEM,
133 },
134 [1] = {
135 .start = REALVIEW_CF_BASE + 0x100,
136 .end = REALVIEW_CF_BASE + SZ_4K - 1,
137 .flags = IORESOURCE_MEM,
138 },
139};
140
141struct platform_device realview_cf_device = {
142 .name = "pata_platform",
143 .id = -1,
144 .num_resources = ARRAY_SIZE(pata_resources),
145 .resource = pata_resources,
146 .dev = {
147 .platform_data = &pata_platform_data,
148 },
149};
150
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LW
151static struct resource realview_leds_resources[] = {
152 {
153 .start = REALVIEW_SYS_BASE + REALVIEW_SYS_LED_OFFSET,
154 .end = REALVIEW_SYS_BASE + REALVIEW_SYS_LED_OFFSET + 4,
155 .flags = IORESOURCE_MEM,
156 },
157};
158
159struct platform_device realview_leds_device = {
160 .name = "versatile-leds",
161 .id = -1,
162 .num_resources = ARRAY_SIZE(realview_leds_resources),
163 .resource = realview_leds_resources,
164};
165
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RK
166static struct resource realview_i2c_resource = {
167 .start = REALVIEW_I2C_BASE,
168 .end = REALVIEW_I2C_BASE + SZ_4K - 1,
169 .flags = IORESOURCE_MEM,
170};
171
172struct platform_device realview_i2c_device = {
173 .name = "versatile-i2c",
533ad5e6 174 .id = 0,
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175 .num_resources = 1,
176 .resource = &realview_i2c_resource,
177};
178
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179static struct i2c_board_info realview_i2c_board_info[] = {
180 {
64e8be6e 181 I2C_BOARD_INFO("ds1338", 0xd0 >> 1),
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182 },
183};
184
185static int __init realview_i2c_init(void)
186{
187 return i2c_register_board_info(0, realview_i2c_board_info,
188 ARRAY_SIZE(realview_i2c_board_info));
189}
190arch_initcall(realview_i2c_init);
191
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192#define REALVIEW_SYSMCI (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_MCI_OFFSET)
193
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194/*
195 * This is only used if GPIOLIB support is disabled
196 */
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197static unsigned int realview_mmc_status(struct device *dev)
198{
199 struct amba_device *adev = container_of(dev, struct amba_device, dev);
200 u32 mask;
201
48f1d5a3
LW
202 if (machine_is_realview_pb1176()) {
203 static bool inserted = false;
204
205 /*
206 * The PB1176 does not have the status register,
207 * assume it is inserted at startup, then invert
208 * for each call so card insertion/removal will
209 * be detected anyway. This will not be called if
210 * GPIO on PL061 is active, which is the proper
211 * way to do this on the PB1176.
212 */
213 inserted = !inserted;
214 return inserted ? 0 : 1;
215 }
216
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CM
217 if (adev->res.start == REALVIEW_MMCI0_BASE)
218 mask = 1;
219 else
220 mask = 2;
221
74bc8093 222 return readl(REALVIEW_SYSMCI) & mask;
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223}
224
6ef297f8 225struct mmci_platform_data realview_mmc0_plat_data = {
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226 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
227 .status = realview_mmc_status,
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228 .gpio_wp = 17,
229 .gpio_cd = 16,
29719445 230 .cd_invert = true,
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231};
232
6ef297f8 233struct mmci_platform_data realview_mmc1_plat_data = {
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234 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
235 .status = realview_mmc_status,
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236 .gpio_wp = 19,
237 .gpio_cd = 18,
29719445 238 .cd_invert = true,
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239};
240
631e55f9 241void __init realview_init_early(void)
cf30fb4a 242{
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RK
243 void __iomem *sys = __io_address(REALVIEW_SYS_BASE);
244
631e55f9 245 versatile_sched_clock_init(sys + REALVIEW_SYS_24MHz_OFFSET, 24000000);
cf30fb4a 246}
cf30fb4a 247
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248/*
249 * CLCD support.
250 */
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251#define SYS_CLCD_NLCDIOON (1 << 2)
252#define SYS_CLCD_VDDPOSSWITCH (1 << 3)
253#define SYS_CLCD_PWR3V5SWITCH (1 << 4)
254#define SYS_CLCD_ID_MASK (0x1f << 8)
255#define SYS_CLCD_ID_SANYO_3_8 (0x00 << 8)
256#define SYS_CLCD_ID_UNKNOWN_8_4 (0x01 << 8)
257#define SYS_CLCD_ID_EPSON_2_2 (0x02 << 8)
258#define SYS_CLCD_ID_SANYO_2_5 (0x07 << 8)
259#define SYS_CLCD_ID_VGA (0x1f << 8)
260
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CM
261/*
262 * Disable all display connectors on the interface module.
263 */
264static void realview_clcd_disable(struct clcd_fb *fb)
265{
266 void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
267 u32 val;
268
269 val = readl(sys_clcd);
270 val &= ~SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH;
271 writel(val, sys_clcd);
272}
273
274/*
275 * Enable the relevant connector on the interface module.
276 */
277static void realview_clcd_enable(struct clcd_fb *fb)
278{
279 void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
280 u32 val;
281
8ad68bbf 282 /*
9e7714d0 283 * Enable the PSUs
8ad68bbf 284 */
9e7714d0 285 val = readl(sys_clcd);
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CM
286 val |= SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH;
287 writel(val, sys_clcd);
288}
289
3cb5ee49
RK
290/*
291 * Detect which LCD panel is connected, and return the appropriate
292 * clcd_panel structure. Note: we do not have any information on
293 * the required timings for the 8.4in panel, so we presently assume
294 * VGA timings.
295 */
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CM
296static int realview_clcd_setup(struct clcd_fb *fb)
297{
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RK
298 void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
299 const char *panel_name, *vga_panel_name;
c34a1025 300 unsigned long framesize;
3cb5ee49 301 u32 val;
8ad68bbf 302
3cb5ee49 303 if (machine_is_realview_eb()) {
c34a1025
CT
304 /* VGA, 16bpp */
305 framesize = 640 * 480 * 2;
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RK
306 vga_panel_name = "VGA";
307 } else {
c34a1025
CT
308 /* XVGA, 16bpp */
309 framesize = 1024 * 768 * 2;
3cb5ee49 310 vga_panel_name = "XVGA";
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CM
311 }
312
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RK
313 val = readl(sys_clcd) & SYS_CLCD_ID_MASK;
314 if (val == SYS_CLCD_ID_SANYO_3_8)
315 panel_name = "Sanyo TM38QV67A02A";
316 else if (val == SYS_CLCD_ID_SANYO_2_5)
317 panel_name = "Sanyo QVGA Portrait";
318 else if (val == SYS_CLCD_ID_EPSON_2_2)
319 panel_name = "Epson L2F50113T00";
320 else if (val == SYS_CLCD_ID_VGA)
321 panel_name = vga_panel_name;
322 else {
323 pr_err("CLCD: unknown LCD panel ID 0x%08x, using VGA\n", val);
324 panel_name = vga_panel_name;
325 }
8ad68bbf 326
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RK
327 fb->panel = versatile_clcd_get_panel(panel_name);
328 if (!fb->panel)
329 return -EINVAL;
8ad68bbf 330
3cb5ee49 331 return versatile_clcd_setup_dma(fb, framesize);
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CM
332}
333
334struct clcd_board clcd_plat_data = {
335 .name = "RealView",
3cb5ee49 336 .caps = CLCD_CAP_ALL,
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337 .check = clcdfb_check,
338 .decode = clcdfb_decode,
339 .disable = realview_clcd_disable,
340 .enable = realview_clcd_enable,
341 .setup = realview_clcd_setup,
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RK
342 .mmap = versatile_clcd_mmap_dma,
343 .remove = versatile_clcd_remove_dma,
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CM
344};
345
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346/*
347 * Where is the timer (VA)?
348 */
80192735
CM
349void __iomem *timer0_va_base;
350void __iomem *timer1_va_base;
351void __iomem *timer2_va_base;
352void __iomem *timer3_va_base;
8ad68bbf 353
8ad68bbf 354/*
a8655e83 355 * Set up the clock source and clock events devices
8ad68bbf 356 */
8cc4c548 357void __init realview_timer_init(unsigned int timer_irq)
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CM
358{
359 u32 val;
360
361 /*
362 * set clock frequency:
363 * REALVIEW_REFCLK is 32KHz
364 * REALVIEW_TIMCLK is 1MHz
365 */
366 val = readl(__io_address(REALVIEW_SCTL_BASE));
367 writel((REALVIEW_TIMCLK << REALVIEW_TIMER1_EnSel) |
368 (REALVIEW_TIMCLK << REALVIEW_TIMER2_EnSel) |
369 (REALVIEW_TIMCLK << REALVIEW_TIMER3_EnSel) |
370 (REALVIEW_TIMCLK << REALVIEW_TIMER4_EnSel) | val,
371 __io_address(REALVIEW_SCTL_BASE));
372
373 /*
374 * Initialise to a known state (all timers off)
375 */
80192735
CM
376 writel(0, timer0_va_base + TIMER_CTRL);
377 writel(0, timer1_va_base + TIMER_CTRL);
378 writel(0, timer2_va_base + TIMER_CTRL);
379 writel(0, timer3_va_base + TIMER_CTRL);
8ad68bbf 380
fb593cf3 381 sp804_clocksource_init(timer3_va_base, "timer3");
57cc4f7d 382 sp804_clockevents_init(timer0_va_base, timer_irq, "timer0");
8ad68bbf 383}
5b39d154
CM
384
385/*
386 * Setup the memory banks.
387 */
0744a3ee 388void realview_fixup(struct tag *tags, char **from, struct meminfo *meminfo)
5b39d154
CM
389{
390 /*
391 * Most RealView platforms have 512MB contiguous RAM at 0x70000000.
392 * Half of this is mirrored at 0.
393 */
394#ifdef CONFIG_REALVIEW_HIGH_PHYS_OFFSET
395 meminfo->bank[0].start = 0x70000000;
396 meminfo->bank[0].size = SZ_512M;
397 meminfo->nr_banks = 1;
398#else
399 meminfo->bank[0].start = 0;
400 meminfo->bank[0].size = SZ_256M;
401 meminfo->nr_banks = 1;
402#endif
403}
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