[ARM] 3239/1: Add ARM optimised swab32
[deliverable/linux.git] / arch / arm / mach-realview / core.h
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1/*
2 * linux/arch/arm/mach-realview/core.h
3 *
4 * Copyright (C) 2004 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#ifndef __ASM_ARCH_REALVIEW_H
23#define __ASM_ARCH_REALVIEW_H
24
25#include <asm/hardware/amba.h>
01bbaf0b 26#include <asm/leds.h>
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27#include <asm/io.h>
28
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29extern struct sys_timer realview_timer;
30
31#define AMBA_DEVICE(name,busid,base,plat) \
32static struct amba_device name##_device = { \
33 .dev = { \
34 .coherent_dma_mask = ~0, \
35 .bus_id = busid, \
36 .platform_data = plat, \
37 }, \
38 .res = { \
39 .start = REALVIEW_##base##_BASE, \
40 .end = (REALVIEW_##base##_BASE) + SZ_4K - 1,\
41 .flags = IORESOURCE_MEM, \
42 }, \
43 .dma_mask = ~0, \
44 .irq = base##_IRQ, \
45 /* .dma = base##_DMA,*/ \
46}
47
48/*
49 * These devices are connected via the core APB bridge
50 */
51#define GPIO2_IRQ { IRQ_GPIOINT2, NO_IRQ }
52#define GPIO2_DMA { 0, 0 }
53#define GPIO3_IRQ { IRQ_GPIOINT3, NO_IRQ }
54#define GPIO3_DMA { 0, 0 }
55
56#define AACI_IRQ { IRQ_AACI, NO_IRQ }
57#define AACI_DMA { 0x80, 0x81 }
58#define MMCI0_IRQ { IRQ_MMCI0A,IRQ_MMCI0B }
59#define MMCI0_DMA { 0x84, 0 }
60#define KMI0_IRQ { IRQ_KMI0, NO_IRQ }
61#define KMI0_DMA { 0, 0 }
62#define KMI1_IRQ { IRQ_KMI1, NO_IRQ }
63#define KMI1_DMA { 0, 0 }
64
65/*
66 * These devices are connected directly to the multi-layer AHB switch
67 */
68#define SMC_IRQ { NO_IRQ, NO_IRQ }
69#define SMC_DMA { 0, 0 }
70#define MPMC_IRQ { NO_IRQ, NO_IRQ }
71#define MPMC_DMA { 0, 0 }
72#define CLCD_IRQ { IRQ_CLCDINT, NO_IRQ }
73#define CLCD_DMA { 0, 0 }
74#define DMAC_IRQ { IRQ_DMAINT, NO_IRQ }
75#define DMAC_DMA { 0, 0 }
76
77/*
78 * These devices are connected via the core APB bridge
79 */
80#define SCTL_IRQ { NO_IRQ, NO_IRQ }
81#define SCTL_DMA { 0, 0 }
82#define WATCHDOG_IRQ { IRQ_WDOGINT, NO_IRQ }
83#define WATCHDOG_DMA { 0, 0 }
84#define GPIO0_IRQ { IRQ_GPIOINT0, NO_IRQ }
85#define GPIO0_DMA { 0, 0 }
86#define GPIO1_IRQ { IRQ_GPIOINT1, NO_IRQ }
87#define GPIO1_DMA { 0, 0 }
88#define RTC_IRQ { IRQ_RTCINT, NO_IRQ }
89#define RTC_DMA { 0, 0 }
90
91/*
92 * These devices are connected via the DMA APB bridge
93 */
94#define SCI_IRQ { IRQ_SCIINT, NO_IRQ }
95#define SCI_DMA { 7, 6 }
96#define UART0_IRQ { IRQ_UARTINT0, NO_IRQ }
97#define UART0_DMA { 15, 14 }
98#define UART1_IRQ { IRQ_UARTINT1, NO_IRQ }
99#define UART1_DMA { 13, 12 }
100#define UART2_IRQ { IRQ_UARTINT2, NO_IRQ }
101#define UART2_DMA { 11, 10 }
102#define UART3_IRQ { IRQ_UART3, NO_IRQ }
103#define UART3_DMA { 0x86, 0x87 }
104#define SSP_IRQ { IRQ_SSPINT, NO_IRQ }
105#define SSP_DMA { 9, 8 }
106
107
108extern struct platform_device realview_flash_device;
109extern struct platform_device realview_smc91x_device;
110extern struct mmc_platform_data realview_mmc0_plat_data;
111extern struct mmc_platform_data realview_mmc1_plat_data;
112extern struct clk realview_clcd_clk;
113extern struct clcd_board clcd_plat_data;
114
115extern void realview_leds_event(led_event_t ledevt);
116
117#endif
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