Commit | Line | Data |
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356cb470 | 1 | /* |
a09e64fb | 2 | * arch/arm/mach-realview/include/mach/board-eb.h |
356cb470 CM |
3 | * |
4 | * Copyright (C) 2007 ARM Limited | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this program; if not, write to the Free Software | |
17 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, | |
18 | * MA 02110-1301, USA. | |
19 | */ | |
20 | ||
21 | #ifndef __ASM_ARCH_BOARD_EB_H | |
22 | #define __ASM_ARCH_BOARD_EB_H | |
23 | ||
a09e64fb | 24 | #include <mach/platform.h> |
356cb470 CM |
25 | |
26 | /* | |
27 | * RealView EB + ARM11MPCore peripheral addresses | |
28 | */ | |
9a386f06 CM |
29 | #define REALVIEW_EB_UART0_BASE 0x10009000 /* UART 0 */ |
30 | #define REALVIEW_EB_UART1_BASE 0x1000A000 /* UART 1 */ | |
31 | #define REALVIEW_EB_UART2_BASE 0x1000B000 /* UART 2 */ | |
32 | #define REALVIEW_EB_UART3_BASE 0x1000C000 /* UART 3 */ | |
393538e6 CM |
33 | #define REALVIEW_EB_SSP_BASE 0x1000D000 /* Synchronous Serial Port */ |
34 | #define REALVIEW_EB_WATCHDOG_BASE 0x10010000 /* watchdog interface */ | |
80192735 CM |
35 | #define REALVIEW_EB_TIMER0_1_BASE 0x10011000 /* Timer 0 and 1 */ |
36 | #define REALVIEW_EB_TIMER2_3_BASE 0x10012000 /* Timer 2 and 3 */ | |
393538e6 CM |
37 | #define REALVIEW_EB_GPIO0_BASE 0x10013000 /* GPIO port 0 */ |
38 | #define REALVIEW_EB_RTC_BASE 0x10017000 /* Real Time Clock */ | |
39 | #define REALVIEW_EB_CLCD_BASE 0x10020000 /* CLCD */ | |
073b6ff3 CM |
40 | #define REALVIEW_EB_GIC_CPU_BASE 0x10040000 /* Generic interrupt controller CPU interface */ |
41 | #define REALVIEW_EB_GIC_DIST_BASE 0x10041000 /* Generic interrupt controller distributor */ | |
393538e6 | 42 | #define REALVIEW_EB_SMC_BASE 0x10080000 /* Static memory controller */ |
073b6ff3 | 43 | |
a44ddfd5 CM |
44 | #define REALVIEW_EB_FLASH_BASE 0x40000000 |
45 | #define REALVIEW_EB_FLASH_SIZE SZ_64M | |
393538e6 CM |
46 | #define REALVIEW_EB_ETH_BASE 0x4E000000 /* Ethernet */ |
47 | #define REALVIEW_EB_USB_BASE 0x4F000000 /* USB */ | |
a44ddfd5 | 48 | |
41579f49 | 49 | #ifdef CONFIG_REALVIEW_EB_ARM11MP_REVB |
34ae6c96 | 50 | #define REALVIEW_EB11MP_PRIV_MEM_BASE 0x1F000000 |
356cb470 CM |
51 | #define REALVIEW_EB11MP_L220_BASE 0x10102000 /* L220 registers */ |
52 | #define REALVIEW_EB11MP_SYS_PLD_CTRL1 0xD8 /* Register offset for MPCore sysctl */ | |
53 | #else | |
34ae6c96 | 54 | #define REALVIEW_EB11MP_PRIV_MEM_BASE 0x1F000000 |
356cb470 CM |
55 | #define REALVIEW_EB11MP_L220_BASE 0x1F002000 /* L220 registers */ |
56 | #define REALVIEW_EB11MP_SYS_PLD_CTRL1 0x74 /* Register offset for MPCore sysctl */ | |
57 | #endif | |
58 | ||
34ae6c96 MZ |
59 | #define REALVIEW_EB11MP_PRIV_MEM_SIZE SZ_8K |
60 | #define REALVIEW_EB11MP_PRIV_MEM_OFF(x) (REALVIEW_EB11MP_PRIV_MEM_BASE + (x)) | |
61 | ||
62 | #define REALVIEW_EB11MP_SCU_BASE REALVIEW_EB11MP_PRIV_MEM_OFF(0) /* SCU registers */ | |
63 | #define REALVIEW_EB11MP_GIC_CPU_BASE REALVIEW_EB11MP_PRIV_MEM_OFF(0x0100) /* Generic interrupt controller CPU interface */ | |
64 | #define REALVIEW_EB11MP_TWD_BASE REALVIEW_EB11MP_PRIV_MEM_OFF(0x0600) | |
65 | #define REALVIEW_EB11MP_GIC_DIST_BASE REALVIEW_EB11MP_PRIV_MEM_OFF(0x1000) /* Generic interrupt controller distributor */ | |
66 | ||
7dd19e75 CM |
67 | /* |
68 | * Core tile identification (REALVIEW_SYS_PROCID) | |
69 | */ | |
70 | #define REALVIEW_EB_PROC_MASK 0xFF000000 | |
71 | #define REALVIEW_EB_PROC_ARM7TDMI 0x00000000 | |
72 | #define REALVIEW_EB_PROC_ARM9 0x02000000 | |
73 | #define REALVIEW_EB_PROC_ARM11 0x04000000 | |
74 | #define REALVIEW_EB_PROC_ARM11MP 0x06000000 | |
4c3ea371 | 75 | #define REALVIEW_EB_PROC_A9MP 0x0C000000 |
7dd19e75 CM |
76 | |
77 | #define check_eb_proc(proc_type) \ | |
78 | ((readl(__io_address(REALVIEW_SYS_PROCID)) & REALVIEW_EB_PROC_MASK) \ | |
79 | == proc_type) | |
80 | ||
41579f49 | 81 | #ifdef CONFIG_REALVIEW_EB_ARM11MP |
7dd19e75 CM |
82 | #define core_tile_eb11mp() check_eb_proc(REALVIEW_EB_PROC_ARM11MP) |
83 | #else | |
84 | #define core_tile_eb11mp() 0 | |
85 | #endif | |
86 | ||
4c3ea371 JC |
87 | #ifdef CONFIG_REALVIEW_EB_A9MP |
88 | #define core_tile_a9mp() check_eb_proc(REALVIEW_EB_PROC_A9MP) | |
89 | #else | |
90 | #define core_tile_a9mp() 0 | |
91 | #endif | |
92 | ||
1bbdf637 CM |
93 | #define machine_is_realview_eb_mp() \ |
94 | (machine_is_realview_eb() && (core_tile_eb11mp() || core_tile_a9mp())) | |
95 | ||
356cb470 | 96 | #endif /* __ASM_ARCH_BOARD_EB_H */ |