Commit | Line | Data |
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862184fe RK |
1 | /* |
2 | * linux/arch/arm/mach-realview/platsmp.c | |
3 | * | |
4 | * Copyright (C) 2002 ARM Ltd. | |
5 | * All Rights Reserved | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | #include <linux/init.h> | |
12 | #include <linux/errno.h> | |
862184fe | 13 | #include <linux/smp.h> |
fced80c7 | 14 | #include <linux/io.h> |
862184fe | 15 | |
a09e64fb | 16 | #include <mach/hardware.h> |
0f7b332f | 17 | #include <asm/hardware/gic.h> |
7dd19e75 | 18 | #include <asm/mach-types.h> |
0462b447 | 19 | #include <asm/smp_scu.h> |
dff2ab16 | 20 | #include <asm/unified.h> |
862184fe | 21 | |
a09e64fb RK |
22 | #include <mach/board-eb.h> |
23 | #include <mach/board-pb11mp.h> | |
1b504bbe | 24 | #include <mach/board-pbx.h> |
b7b0ba94 | 25 | |
1bbdf637 CM |
26 | #include "core.h" |
27 | ||
0462b447 | 28 | extern void versatile_secondary_startup(void); |
3705ff6d | 29 | |
1bbdf637 CM |
30 | static void __iomem *scu_base_addr(void) |
31 | { | |
32 | if (machine_is_realview_eb_mp()) | |
33 | return __io_address(REALVIEW_EB11MP_SCU_BASE); | |
34 | else if (machine_is_realview_pb11mp()) | |
35 | return __io_address(REALVIEW_TC11MP_SCU_BASE); | |
1b504bbe CT |
36 | else if (machine_is_realview_pbx() && |
37 | (core_tile_pbx11mp() || core_tile_pbxa9mp())) | |
38 | return __io_address(REALVIEW_PBX_TILE_SCU_BASE); | |
1bbdf637 CM |
39 | else |
40 | return (void __iomem *)0; | |
41 | } | |
42 | ||
7bbb7940 RK |
43 | /* |
44 | * Initialise the CPU possible map early - this describes the CPUs | |
45 | * which may be present or become present in the system. | |
46 | */ | |
47 | void __init smp_init_cpus(void) | |
48 | { | |
fd778f0a RK |
49 | void __iomem *scu_base = scu_base_addr(); |
50 | unsigned int i, ncores; | |
7bbb7940 | 51 | |
fd778f0a | 52 | ncores = scu_base ? scu_get_core_count(scu_base) : 1; |
862184fe RK |
53 | |
54 | /* sanity check */ | |
a06f916b RK |
55 | if (ncores > nr_cpu_ids) { |
56 | pr_warn("SMP: %u cores greater than maximum (%u), clipping\n", | |
57 | ncores, nr_cpu_ids); | |
58 | ncores = nr_cpu_ids; | |
862184fe RK |
59 | } |
60 | ||
bbc3d14e RK |
61 | for (i = 0; i < ncores; i++) |
62 | set_cpu_possible(i, true); | |
0f7b332f RK |
63 | |
64 | set_smp_cross_call(gic_raise_softirq); | |
bbc3d14e | 65 | } |
862184fe | 66 | |
05c74a6c | 67 | void __init platform_smp_prepare_cpus(unsigned int max_cpus) |
bbc3d14e | 68 | { |
862184fe | 69 | |
05c74a6c RK |
70 | scu_enable(scu_base_addr()); |
71 | ||
862184fe | 72 | /* |
05c74a6c RK |
73 | * Write the address of secondary startup into the |
74 | * system-wide flags register. The BootMonitor waits | |
75 | * until it receives a soft interrupt, and then the | |
76 | * secondary CPU branches to this address. | |
862184fe | 77 | */ |
0462b447 | 78 | __raw_writel(BSYM(virt_to_phys(versatile_secondary_startup)), |
05c74a6c | 79 | __io_address(REALVIEW_SYS_FLAGSSET)); |
862184fe | 80 | } |