projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 862184fe RK |
1 | /* |
| 2 | * linux/arch/arm/mach-realview/platsmp.c | |
| 3 | * | |
| 4 | * Copyright (C) 2002 ARM Ltd. | |
| 5 | * All Rights Reserved | |
| 6 | * | |
| 7 | * This program is free software; you can redistribute it and/or modify | |
| 8 | * it under the terms of the GNU General Public License version 2 as | |
| 9 | * published by the Free Software Foundation. | |
| 10 | */ | |
| 11 | #include <linux/init.h> | |
| 12 | #include <linux/errno.h> | |
| 862184fe | 13 | #include <linux/smp.h> |
| fced80c7 | 14 | #include <linux/io.h> |
| 862184fe | 15 | |
| a09e64fb | 16 | #include <mach/hardware.h> |
| 0f7b332f | 17 | #include <asm/hardware/gic.h> |
| 7dd19e75 | 18 | #include <asm/mach-types.h> |
| 0462b447 | 19 | #include <asm/smp_scu.h> |
| 862184fe | 20 | |
| a09e64fb RK |
21 | #include <mach/board-eb.h> |
| 22 | #include <mach/board-pb11mp.h> | |
| 1b504bbe | 23 | #include <mach/board-pbx.h> |
| b7b0ba94 | 24 | |
| 1bbdf637 CM |
25 | #include "core.h" |
| 26 | ||
| 0462b447 | 27 | extern void versatile_secondary_startup(void); |
| 3705ff6d | 28 | |
| 1bbdf637 CM |
29 | static void __iomem *scu_base_addr(void) |
| 30 | { | |
| 31 | if (machine_is_realview_eb_mp()) | |
| 32 | return __io_address(REALVIEW_EB11MP_SCU_BASE); | |
| 33 | else if (machine_is_realview_pb11mp()) | |
| 34 | return __io_address(REALVIEW_TC11MP_SCU_BASE); | |
| 1b504bbe CT |
35 | else if (machine_is_realview_pbx() && |
| 36 | (core_tile_pbx11mp() || core_tile_pbxa9mp())) | |
| 37 | return __io_address(REALVIEW_PBX_TILE_SCU_BASE); | |
| 1bbdf637 CM |
38 | else |
| 39 | return (void __iomem *)0; | |
| 40 | } | |
| 41 | ||
| 7bbb7940 RK |
42 | /* |
| 43 | * Initialise the CPU possible map early - this describes the CPUs | |
| 44 | * which may be present or become present in the system. | |
| 45 | */ | |
| 46 | void __init smp_init_cpus(void) | |
| 47 | { | |
| fd778f0a RK |
48 | void __iomem *scu_base = scu_base_addr(); |
| 49 | unsigned int i, ncores; | |
| 7bbb7940 | 50 | |
| fd778f0a | 51 | ncores = scu_base ? scu_get_core_count(scu_base) : 1; |
| 862184fe RK |
52 | |
| 53 | /* sanity check */ | |
| a06f916b RK |
54 | if (ncores > nr_cpu_ids) { |
| 55 | pr_warn("SMP: %u cores greater than maximum (%u), clipping\n", | |
| 56 | ncores, nr_cpu_ids); | |
| 57 | ncores = nr_cpu_ids; | |
| 862184fe RK |
58 | } |
| 59 | ||
| bbc3d14e RK |
60 | for (i = 0; i < ncores; i++) |
| 61 | set_cpu_possible(i, true); | |
| 0f7b332f RK |
62 | |
| 63 | set_smp_cross_call(gic_raise_softirq); | |
| bbc3d14e | 64 | } |
| 862184fe | 65 | |
| 05c74a6c | 66 | void __init platform_smp_prepare_cpus(unsigned int max_cpus) |
| bbc3d14e | 67 | { |
| 862184fe | 68 | |
| 05c74a6c RK |
69 | scu_enable(scu_base_addr()); |
| 70 | ||
| 862184fe | 71 | /* |
| 05c74a6c RK |
72 | * Write the address of secondary startup into the |
| 73 | * system-wide flags register. The BootMonitor waits | |
| 74 | * until it receives a soft interrupt, and then the | |
| 75 | * secondary CPU branches to this address. | |
| 862184fe | 76 | */ |
| 764a579f | 77 | __raw_writel(virt_to_phys(versatile_secondary_startup), |
| 05c74a6c | 78 | __io_address(REALVIEW_SYS_FLAGSSET)); |
| 862184fe | 79 | } |