ARM: 6516/1: Allow SMP_ON_UP to work with Thumb-2 kernels.
[deliverable/linux.git] / arch / arm / mach-realview / platsmp.c
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1/*
2 * linux/arch/arm/mach-realview/platsmp.c
3 *
4 * Copyright (C) 2002 ARM Ltd.
5 * All Rights Reserved
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#include <linux/init.h>
12#include <linux/errno.h>
13#include <linux/delay.h>
14#include <linux/device.h>
934848da 15#include <linux/jiffies.h>
862184fe 16#include <linux/smp.h>
fced80c7 17#include <linux/io.h>
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18
19#include <asm/cacheflush.h>
a09e64fb 20#include <mach/hardware.h>
7dd19e75 21#include <asm/mach-types.h>
dff2ab16 22#include <asm/unified.h>
862184fe 23
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24#include <mach/board-eb.h>
25#include <mach/board-pb11mp.h>
1b504bbe 26#include <mach/board-pbx.h>
49613d4d 27#include <asm/smp_scu.h>
b7b0ba94 28
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29#include "core.h"
30
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31extern void realview_secondary_startup(void);
32
33/*
34 * control for which core is the next to come out of the secondary
35 * boot "holding pen"
36 */
37volatile int __cpuinitdata pen_release = -1;
38
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39static void __iomem *scu_base_addr(void)
40{
41 if (machine_is_realview_eb_mp())
42 return __io_address(REALVIEW_EB11MP_SCU_BASE);
43 else if (machine_is_realview_pb11mp())
44 return __io_address(REALVIEW_TC11MP_SCU_BASE);
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45 else if (machine_is_realview_pbx() &&
46 (core_tile_pbx11mp() || core_tile_pbxa9mp()))
47 return __io_address(REALVIEW_PBX_TILE_SCU_BASE);
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48 else
49 return (void __iomem *)0;
50}
51
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52static DEFINE_SPINLOCK(boot_lock);
53
54void __cpuinit platform_secondary_init(unsigned int cpu)
55{
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56 /*
57 * if any interrupts are already enabled for the primary
58 * core (e.g. timer irq), then they will not have been enabled
59 * for us: do so
60 */
1bbdf637 61 gic_cpu_init(0, gic_cpu_base_addr);
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62
63 /*
64 * let the primary processor know we're out of the
65 * pen, then head off into the C entry point
66 */
67 pen_release = -1;
0e0ba769 68 smp_wmb();
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69
70 /*
71 * Synchronise with the boot thread.
72 */
73 spin_lock(&boot_lock);
74 spin_unlock(&boot_lock);
75}
76
77int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
78{
79 unsigned long timeout;
80
81 /*
82 * set synchronisation state between this boot processor
83 * and the secondary one
84 */
85 spin_lock(&boot_lock);
86
87 /*
88 * The secondary processor is waiting to be released from
89 * the holding pen - release it, then wait for it to flag
90 * that it has been released by resetting pen_release.
91 *
92 * Note that "pen_release" is the hardware CPU ID, whereas
93 * "cpu" is Linux's internal ID.
94 */
95 pen_release = cpu;
96 flush_cache_all();
97
98 /*
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99 * Send the secondary CPU a soft interrupt, thereby causing
100 * the boot monitor to read the system wide flags register,
101 * and branch to the address found there.
862184fe 102 */
ad3b6993 103 smp_cross_call(cpumask_of(cpu), 1);
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104
105 timeout = jiffies + (1 * HZ);
106 while (time_before(jiffies, timeout)) {
0e0ba769 107 smp_rmb();
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108 if (pen_release == -1)
109 break;
110
111 udelay(10);
112 }
113
114 /*
115 * now the secondary core is starting up let it run its
116 * calibrations, then wait for it to finish
117 */
118 spin_unlock(&boot_lock);
119
120 return pen_release != -1 ? -ENOSYS : 0;
121}
122
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123/*
124 * Initialise the CPU possible map early - this describes the CPUs
125 * which may be present or become present in the system.
126 */
127void __init smp_init_cpus(void)
128{
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129 void __iomem *scu_base = scu_base_addr();
130 unsigned int i, ncores;
131
132 ncores = scu_base ? scu_get_core_count(scu_base) : 1;
7bbb7940 133
862184fe 134 /* sanity check */
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135 if (ncores > NR_CPUS) {
136 printk(KERN_WARNING
137 "Realview: no. of cores (%d) greater than configured "
138 "maximum of %d - clipping\n",
139 ncores, NR_CPUS);
140 ncores = NR_CPUS;
141 }
142
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143 for (i = 0; i < ncores; i++)
144 set_cpu_possible(i, true);
145}
146
05c74a6c 147void __init platform_smp_prepare_cpus(unsigned int max_cpus)
bbc3d14e 148{
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149 int i;
150
862184fe 151 /*
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152 * Initialise the present map, which describes the set of CPUs
153 * actually populated at the present time.
862184fe 154 */
7bbb7940 155 for (i = 0; i < max_cpus; i++)
e03cdade 156 set_cpu_present(i, true);
862184fe 157
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158 scu_enable(scu_base_addr());
159
160 /*
161 * Write the address of secondary startup into the
162 * system-wide flags register. The BootMonitor waits
163 * until it receives a soft interrupt, and then the
164 * secondary CPU branches to this address.
165 */
166 __raw_writel(BSYM(virt_to_phys(realview_secondary_startup)),
167 __io_address(REALVIEW_SYS_FLAGSSET));
862184fe 168}
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