projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
RealView: Move the EB GIC definitions to the board file
[deliverable/linux.git] / arch / arm / mach-realview / realview_eb.c
CommitLineData
8ad68bbf
CM		 1/*
2 * linux/arch/arm/mach-realview/realview_eb.c
3 *
4 * Copyright (C) 2004 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
8ad68bbf 22#include <linux/init.h>
1be7228d 23#include <linux/platform_device.h>
8ad68bbf 24#include <linux/sysdev.h>
a62c80e5 25#include <linux/amba/bus.h>
8ad68bbf
CM		 26
27#include <asm/hardware.h>
28#include <asm/io.h>
29#include <asm/irq.h>
30#include <asm/leds.h>
31#include <asm/mach-types.h>
32#include <asm/hardware/gic.h>
8ad68bbf 33#include <asm/hardware/icst307.h>
7770bddb 34#include <asm/hardware/cache-l2x0.h>
8ad68bbf
CM		 35
36#include <asm/mach/arch.h>
37#include <asm/mach/map.h>
38#include <asm/mach/mmc.h>
8cc4c548 39#include <asm/mach/time.h>
8ad68bbf 40
356cb470 41#include <asm/arch/board-eb.h>
8ad68bbf
CM		 42#include <asm/arch/irqs.h>
43
44#include "core.h"
45#include "clock.h"
46
47static struct map_desc realview_eb_io_desc[] __initdata = {
1ffedce7
RK		 48 {
49 .virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
50 .pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
51 .length = SZ_4K,
52 .type = MT_DEVICE,
53 }, {
073b6ff3
CM		 54 .virtual = IO_ADDRESS(REALVIEW_EB_GIC_CPU_BASE),
55 .pfn = __phys_to_pfn(REALVIEW_EB_GIC_CPU_BASE),
1ffedce7
RK		 56 .length = SZ_4K,
57 .type = MT_DEVICE,
58 }, {
073b6ff3
CM		 59 .virtual = IO_ADDRESS(REALVIEW_EB_GIC_DIST_BASE),
60 .pfn = __phys_to_pfn(REALVIEW_EB_GIC_DIST_BASE),
1ffedce7
RK		 61 .length = SZ_4K,
62 .type = MT_DEVICE,
63 }, {
64 .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
65 .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
66 .length = SZ_4K,
67 .type = MT_DEVICE,
68 }, {
69 .virtual = IO_ADDRESS(REALVIEW_TIMER0_1_BASE),
70 .pfn = __phys_to_pfn(REALVIEW_TIMER0_1_BASE),
71 .length = SZ_4K,
72 .type = MT_DEVICE,
73 }, {
74 .virtual = IO_ADDRESS(REALVIEW_TIMER2_3_BASE),
75 .pfn = __phys_to_pfn(REALVIEW_TIMER2_3_BASE),
76 .length = SZ_4K,
77 .type = MT_DEVICE,
78 },
8ad68bbf 79#ifdef CONFIG_DEBUG_LL
1ffedce7
RK		 80 {
81 .virtual = IO_ADDRESS(REALVIEW_UART0_BASE),
82 .pfn = __phys_to_pfn(REALVIEW_UART0_BASE),
83 .length = SZ_4K,
84 .type = MT_DEVICE,
85 }
8ad68bbf
CM		 86#endif
87};
88
7dd19e75
CM		 89static struct map_desc realview_eb11mp_io_desc[] __initdata = {
90 {
91 .virtual = IO_ADDRESS(REALVIEW_EB11MP_GIC_CPU_BASE),
92 .pfn = __phys_to_pfn(REALVIEW_EB11MP_GIC_CPU_BASE),
93 .length = SZ_4K,
94 .type = MT_DEVICE,
95 }, {
96 .virtual = IO_ADDRESS(REALVIEW_EB11MP_GIC_DIST_BASE),
97 .pfn = __phys_to_pfn(REALVIEW_EB11MP_GIC_DIST_BASE),
98 .length = SZ_4K,
99 .type = MT_DEVICE,
100 }, {
101 .virtual = IO_ADDRESS(REALVIEW_EB11MP_L220_BASE),
102 .pfn = __phys_to_pfn(REALVIEW_EB11MP_L220_BASE),
103 .length = SZ_8K,
104 .type = MT_DEVICE,
105 }
106};
107
8ad68bbf
CM		 108static void __init realview_eb_map_io(void)
109{
110 iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc));
7dd19e75
CM		 111 if (core_tile_eb11mp())
112 iotable_init(realview_eb11mp_io_desc, ARRAY_SIZE(realview_eb11mp_io_desc));
8ad68bbf
CM		 113}
114
0fc2a161
CM		 115/*
116 * RealView EB AMBA devices
117 */
118
119/*
120 * These devices are connected via the core APB bridge
121 */
122#define GPIO2_IRQ { IRQ_EB_GPIO2, NO_IRQ }
123#define GPIO2_DMA { 0, 0 }
124#define GPIO3_IRQ { IRQ_EB_GPIO3, NO_IRQ }
125#define GPIO3_DMA { 0, 0 }
126
127#define AACI_IRQ { IRQ_EB_AACI, NO_IRQ }
128#define AACI_DMA { 0x80, 0x81 }
129#define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B }
130#define MMCI0_DMA { 0x84, 0 }
131#define KMI0_IRQ { IRQ_EB_KMI0, NO_IRQ }
132#define KMI0_DMA { 0, 0 }
133#define KMI1_IRQ { IRQ_EB_KMI1, NO_IRQ }
134#define KMI1_DMA { 0, 0 }
135
136/*
137 * These devices are connected directly to the multi-layer AHB switch
138 */
139#define SMC_IRQ { NO_IRQ, NO_IRQ }
140#define SMC_DMA { 0, 0 }
141#define MPMC_IRQ { NO_IRQ, NO_IRQ }
142#define MPMC_DMA { 0, 0 }
143#define CLCD_IRQ { IRQ_EB_CLCD, NO_IRQ }
144#define CLCD_DMA { 0, 0 }
145#define DMAC_IRQ { IRQ_EB_DMA, NO_IRQ }
146#define DMAC_DMA { 0, 0 }
147
148/*
149 * These devices are connected via the core APB bridge
150 */
151#define SCTL_IRQ { NO_IRQ, NO_IRQ }
152#define SCTL_DMA { 0, 0 }
153#define WATCHDOG_IRQ { IRQ_EB_WDOG, NO_IRQ }
154#define WATCHDOG_DMA { 0, 0 }
155#define GPIO0_IRQ { IRQ_EB_GPIO0, NO_IRQ }
156#define GPIO0_DMA { 0, 0 }
157#define GPIO1_IRQ { IRQ_EB_GPIO1, NO_IRQ }
158#define GPIO1_DMA { 0, 0 }
159#define RTC_IRQ { IRQ_EB_RTC, NO_IRQ }
160#define RTC_DMA { 0, 0 }
161
162/*
163 * These devices are connected via the DMA APB bridge
164 */
165#define SCI_IRQ { IRQ_EB_SCI, NO_IRQ }
166#define SCI_DMA { 7, 6 }
167#define UART0_IRQ { IRQ_EB_UART0, NO_IRQ }
168#define UART0_DMA { 15, 14 }
169#define UART1_IRQ { IRQ_EB_UART1, NO_IRQ }
170#define UART1_DMA { 13, 12 }
171#define UART2_IRQ { IRQ_EB_UART2, NO_IRQ }
172#define UART2_DMA { 11, 10 }
173#define UART3_IRQ { IRQ_EB_UART3, NO_IRQ }
174#define UART3_DMA { 0x86, 0x87 }
175#define SSP_IRQ { IRQ_EB_SSP, NO_IRQ }
176#define SSP_DMA { 9, 8 }
177
8ad68bbf
CM		 178/* FPGA Primecells */
179AMBA_DEVICE(aaci, "fpga:04", AACI, NULL);
180AMBA_DEVICE(mmc0, "fpga:05", MMCI0, &realview_mmc0_plat_data);
181AMBA_DEVICE(kmi0, "fpga:06", KMI0, NULL);
182AMBA_DEVICE(kmi1, "fpga:07", KMI1, NULL);
183AMBA_DEVICE(uart3, "fpga:09", UART3, NULL);
184
185/* DevChip Primecells */
186AMBA_DEVICE(smc, "dev:00", SMC, NULL);
187AMBA_DEVICE(clcd, "dev:20", CLCD, &clcd_plat_data);
188AMBA_DEVICE(dmac, "dev:30", DMAC, NULL);
189AMBA_DEVICE(sctl, "dev:e0", SCTL, NULL);
190AMBA_DEVICE(wdog, "dev:e1", WATCHDOG, NULL);
191AMBA_DEVICE(gpio0, "dev:e4", GPIO0, NULL);
192AMBA_DEVICE(gpio1, "dev:e5", GPIO1, NULL);
193AMBA_DEVICE(gpio2, "dev:e6", GPIO2, NULL);
194AMBA_DEVICE(rtc, "dev:e8", RTC, NULL);
195AMBA_DEVICE(sci0, "dev:f0", SCI, NULL);
196AMBA_DEVICE(uart0, "dev:f1", UART0, NULL);
197AMBA_DEVICE(uart1, "dev:f2", UART1, NULL);
198AMBA_DEVICE(uart2, "dev:f3", UART2, NULL);
199AMBA_DEVICE(ssp0, "dev:f4", SSP, NULL);
200
201static struct amba_device *amba_devs[] __initdata = {
202 &dmac_device,
203 &uart0_device,
204 &uart1_device,
205 &uart2_device,
206 &uart3_device,
207 &smc_device,
208 &clcd_device,
209 &sctl_device,
210 &wdog_device,
211 &gpio0_device,
212 &gpio1_device,
213 &gpio2_device,
214 &rtc_device,
215 &sci0_device,
216 &ssp0_device,
217 &aaci_device,
218 &mmc0_device,
219 &kmi0_device,
220 &kmi1_device,
221};
222
0fc2a161
CM		 223/*
224 * RealView EB platform devices
225 */
226
be4f3c86 227static struct resource realview_eb_eth_resources[] = {
0fc2a161
CM		 228 [0] = {
229 .start = REALVIEW_ETH_BASE,
230 .end = REALVIEW_ETH_BASE + SZ_64K - 1,
231 .flags = IORESOURCE_MEM,
232 },
233 [1] = {
234 .start = IRQ_EB_ETH,
235 .end = IRQ_EB_ETH,
236 .flags = IORESOURCE_IRQ,
237 },
238};
239
be4f3c86 240static struct platform_device realview_eb_eth_device = {
0fc2a161 241 .id = 0,
be4f3c86
CM		 242 .num_resources = ARRAY_SIZE(realview_eb_eth_resources),
243 .resource = realview_eb_eth_resources,
0fc2a161
CM		 244};
245
be4f3c86
CM		 246/*
247 * Detect and register the correct Ethernet device. RealView/EB rev D
248 * platforms use the newer SMSC LAN9118 Ethernet chip
249 */
250static int eth_device_register(void)
251{
252 void __iomem *eth_addr = ioremap(REALVIEW_ETH_BASE, SZ_4K);
253 u32 idrev;
254
255 if (!eth_addr)
256 return -ENOMEM;
257
258 idrev = readl(eth_addr + 0x50);
259 if ((idrev & 0xFFFF0000) == 0x01180000)
260 /* SMSC LAN9118 chip present */
261 realview_eb_eth_device.name = "smc911x";
262 else
263 /* SMSC 91C111 chip present */
264 realview_eb_eth_device.name = "smc91x";
265
266 iounmap(eth_addr);
267 return platform_device_register(&realview_eb_eth_device);
268}
269
8ad68bbf
CM		 270static void __init gic_init_irq(void)
271{
7dd19e75
CM		 272 if (core_tile_eb11mp()) {
273 unsigned int pldctrl;
274
275 /* new irq mode */
276 writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
277 pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
278 pldctrl |= 0x00800000;
279 writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
280 writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
281
282 /* core tile GIC, primary */
c4057f52 283 gic_cpu_base_addr = __io_address(REALVIEW_EB11MP_GIC_CPU_BASE);
7dd19e75 284 gic_dist_init(0, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE), 29);
c4057f52 285 gic_cpu_init(0, gic_cpu_base_addr);
7dd19e75 286
41579f49 287#ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB
7dd19e75 288 /* board GIC, secondary */
073b6ff3
CM		 289 gic_dist_init(1, __io_address(REALVIEW_EB_GIC_DIST_BASE), 64);
290 gic_cpu_init(1, __io_address(REALVIEW_EB_GIC_CPU_BASE));
7dd19e75 291 gic_cascade_irq(1, IRQ_EB11MP_EB_IRQ1);
3edf22ab 292#endif
7dd19e75
CM		 293 } else {
294 /* board GIC, primary */
073b6ff3
CM		 295 gic_cpu_base_addr = __io_address(REALVIEW_EB_GIC_CPU_BASE);
296 gic_dist_init(0, __io_address(REALVIEW_EB_GIC_DIST_BASE), 29);
c4057f52 297 gic_cpu_init(0, gic_cpu_base_addr);
7dd19e75 298 }
8ad68bbf
CM		 299}
300
0fc2a161
CM		 301/*
302 * Fix up the IRQ numbers for the RealView EB/ARM11MPCore tile
303 */
304static void realview_eb11mp_fixup(void)
305{
306 /* AMBA devices */
307 dmac_device.irq[0] = IRQ_EB11MP_DMA;
308 uart0_device.irq[0] = IRQ_EB11MP_UART0;
309 uart1_device.irq[0] = IRQ_EB11MP_UART1;
310 uart2_device.irq[0] = IRQ_EB11MP_UART2;
311 uart3_device.irq[0] = IRQ_EB11MP_UART3;
312 clcd_device.irq[0] = IRQ_EB11MP_CLCD;
313 wdog_device.irq[0] = IRQ_EB11MP_WDOG;
314 gpio0_device.irq[0] = IRQ_EB11MP_GPIO0;
315 gpio1_device.irq[0] = IRQ_EB11MP_GPIO1;
316 gpio2_device.irq[0] = IRQ_EB11MP_GPIO2;
317 rtc_device.irq[0] = IRQ_EB11MP_RTC;
318 sci0_device.irq[0] = IRQ_EB11MP_SCI;
319 ssp0_device.irq[0] = IRQ_EB11MP_SSP;
320 aaci_device.irq[0] = IRQ_EB11MP_AACI;
321 mmc0_device.irq[0] = IRQ_EB11MP_MMCI0A;
322 mmc0_device.irq[1] = IRQ_EB11MP_MMCI0B;
323 kmi0_device.irq[0] = IRQ_EB11MP_KMI0;
324 kmi1_device.irq[0] = IRQ_EB11MP_KMI1;
325
326 /* platform devices */
be4f3c86
CM		 327 realview_eb_eth_resources[1].start = IRQ_EB11MP_ETH;
328 realview_eb_eth_resources[1].end = IRQ_EB11MP_ETH;
0fc2a161 329}
0fc2a161 330
8cc4c548
CM		 331static void __init realview_eb_timer_init(void)
332{
333 unsigned int timer_irq;
334
39e823e3
CM		 335 if (core_tile_eb11mp()) {
336#ifdef CONFIG_LOCAL_TIMERS
337 twd_base_addr = __io_address(REALVIEW_EB11MP_TWD_BASE);
338 twd_size = REALVIEW_EB11MP_TWD_SIZE;
339#endif
8cc4c548 340 timer_irq = IRQ_EB11MP_TIMER0_1;
39e823e3 341 } else
8cc4c548
CM		 342 timer_irq = IRQ_EB_TIMER0_1;
343
344 realview_timer_init(timer_irq);
345}
346
347static struct sys_timer realview_eb_timer = {
348 .init = realview_eb_timer_init,
349};
350
8ad68bbf
CM		 351static void __init realview_eb_init(void)
352{
353 int i;
354
7dd19e75
CM		 355 if (core_tile_eb11mp()) {
356 realview_eb11mp_fixup();
357
358 /* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
359 * Bits: .... ...0 0111 1001 0000 .... .... .... */
360 l2x0_init(__io_address(REALVIEW_EB11MP_L220_BASE), 0x00790000, 0xfe000fff);
361 }
0fc2a161 362
8ad68bbf
CM		 363 clk_register(&realview_clcd_clk);
364
365 platform_device_register(&realview_flash_device);
6b65cd74 366 platform_device_register(&realview_i2c_device);
be4f3c86 367 eth_device_register();
8ad68bbf
CM		 368
369 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
370 struct amba_device *d = amba_devs[i];
371 amba_device_register(d, &iomem_resource);
372 }
373
374#ifdef CONFIG_LEDS
375 leds_event = realview_leds_event;
376#endif
377}
378
379MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
380 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
8ad68bbf
CM		 381 .phys_io = REALVIEW_UART0_BASE,
382 .io_pg_offst = (IO_ADDRESS(REALVIEW_UART0_BASE) >> 18) & 0xfffc,
383 .boot_params = 0x00000100,
384 .map_io = realview_eb_map_io,
385 .init_irq = gic_init_irq,
8cc4c548 386 .timer = &realview_eb_timer,
8ad68bbf
CM		 387 .init_machine = realview_eb_init,
388MACHINE_END
Linux kernel - Deliverables
This page took 0.278776 seconds and 5 git commands to generate.