Commit | Line | Data |
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8ad68bbf CM |
1 | /* |
2 | * linux/arch/arm/mach-realview/realview_eb.c | |
3 | * | |
4 | * Copyright (C) 2004 ARM Limited | |
5 | * Copyright (C) 2000 Deep Blue Solutions Ltd | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
20 | */ | |
21 | ||
8ad68bbf | 22 | #include <linux/init.h> |
1be7228d | 23 | #include <linux/platform_device.h> |
edbaa603 | 24 | #include <linux/device.h> |
a62c80e5 | 25 | #include <linux/amba/bus.h> |
eb7fffa3 | 26 | #include <linux/amba/pl061.h> |
6ef297f8 | 27 | #include <linux/amba/mmci.h> |
d6ada860 | 28 | #include <linux/amba/pl022.h> |
fced80c7 | 29 | #include <linux/io.h> |
520f7bd7 | 30 | #include <linux/irqchip/arm-gic.h> |
f9a6aa43 | 31 | #include <linux/platform_data/clk-realview.h> |
8ad68bbf | 32 | |
a09e64fb | 33 | #include <mach/hardware.h> |
8ad68bbf | 34 | #include <asm/irq.h> |
8ad68bbf | 35 | #include <asm/mach-types.h> |
cc9897df | 36 | #include <asm/pgtable.h> |
7770bddb | 37 | #include <asm/hardware/cache-l2x0.h> |
7c380f27 | 38 | #include <asm/smp_twd.h> |
8ad68bbf CM |
39 | |
40 | #include <asm/mach/arch.h> | |
41 | #include <asm/mach/map.h> | |
8cc4c548 | 42 | #include <asm/mach/time.h> |
8ad68bbf | 43 | |
a09e64fb RK |
44 | #include <mach/board-eb.h> |
45 | #include <mach/irqs.h> | |
8ad68bbf CM |
46 | |
47 | #include "core.h" | |
8ad68bbf CM |
48 | |
49 | static struct map_desc realview_eb_io_desc[] __initdata = { | |
1ffedce7 RK |
50 | { |
51 | .virtual = IO_ADDRESS(REALVIEW_SYS_BASE), | |
52 | .pfn = __phys_to_pfn(REALVIEW_SYS_BASE), | |
53 | .length = SZ_4K, | |
54 | .type = MT_DEVICE, | |
55 | }, { | |
073b6ff3 CM |
56 | .virtual = IO_ADDRESS(REALVIEW_EB_GIC_CPU_BASE), |
57 | .pfn = __phys_to_pfn(REALVIEW_EB_GIC_CPU_BASE), | |
1ffedce7 RK |
58 | .length = SZ_4K, |
59 | .type = MT_DEVICE, | |
60 | }, { | |
073b6ff3 CM |
61 | .virtual = IO_ADDRESS(REALVIEW_EB_GIC_DIST_BASE), |
62 | .pfn = __phys_to_pfn(REALVIEW_EB_GIC_DIST_BASE), | |
1ffedce7 RK |
63 | .length = SZ_4K, |
64 | .type = MT_DEVICE, | |
65 | }, { | |
66 | .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE), | |
67 | .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE), | |
68 | .length = SZ_4K, | |
69 | .type = MT_DEVICE, | |
70 | }, { | |
80192735 CM |
71 | .virtual = IO_ADDRESS(REALVIEW_EB_TIMER0_1_BASE), |
72 | .pfn = __phys_to_pfn(REALVIEW_EB_TIMER0_1_BASE), | |
1ffedce7 RK |
73 | .length = SZ_4K, |
74 | .type = MT_DEVICE, | |
75 | }, { | |
80192735 CM |
76 | .virtual = IO_ADDRESS(REALVIEW_EB_TIMER2_3_BASE), |
77 | .pfn = __phys_to_pfn(REALVIEW_EB_TIMER2_3_BASE), | |
1ffedce7 RK |
78 | .length = SZ_4K, |
79 | .type = MT_DEVICE, | |
80 | }, | |
8ad68bbf | 81 | #ifdef CONFIG_DEBUG_LL |
1ffedce7 | 82 | { |
9a386f06 CM |
83 | .virtual = IO_ADDRESS(REALVIEW_EB_UART0_BASE), |
84 | .pfn = __phys_to_pfn(REALVIEW_EB_UART0_BASE), | |
1ffedce7 RK |
85 | .length = SZ_4K, |
86 | .type = MT_DEVICE, | |
87 | } | |
8ad68bbf CM |
88 | #endif |
89 | }; | |
90 | ||
7dd19e75 CM |
91 | static struct map_desc realview_eb11mp_io_desc[] __initdata = { |
92 | { | |
34ae6c96 MZ |
93 | .virtual = IO_ADDRESS(REALVIEW_EB11MP_PRIV_MEM_BASE), |
94 | .pfn = __phys_to_pfn(REALVIEW_EB11MP_PRIV_MEM_BASE), | |
95 | .length = REALVIEW_EB11MP_PRIV_MEM_SIZE, | |
7dd19e75 CM |
96 | .type = MT_DEVICE, |
97 | }, { | |
98 | .virtual = IO_ADDRESS(REALVIEW_EB11MP_L220_BASE), | |
99 | .pfn = __phys_to_pfn(REALVIEW_EB11MP_L220_BASE), | |
100 | .length = SZ_8K, | |
101 | .type = MT_DEVICE, | |
102 | } | |
103 | }; | |
104 | ||
8ad68bbf CM |
105 | static void __init realview_eb_map_io(void) |
106 | { | |
107 | iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc)); | |
4c3ea371 | 108 | if (core_tile_eb11mp() || core_tile_a9mp()) |
7dd19e75 | 109 | iotable_init(realview_eb11mp_io_desc, ARRAY_SIZE(realview_eb11mp_io_desc)); |
8ad68bbf CM |
110 | } |
111 | ||
eb7fffa3 RK |
112 | static struct pl061_platform_data gpio0_plat_data = { |
113 | .gpio_base = 0, | |
eb7fffa3 RK |
114 | }; |
115 | ||
116 | static struct pl061_platform_data gpio1_plat_data = { | |
117 | .gpio_base = 8, | |
eb7fffa3 RK |
118 | }; |
119 | ||
120 | static struct pl061_platform_data gpio2_plat_data = { | |
121 | .gpio_base = 16, | |
eb7fffa3 RK |
122 | }; |
123 | ||
d6ada860 LW |
124 | static struct pl022_ssp_controller ssp0_plat_data = { |
125 | .bus_id = 0, | |
126 | .enable_dma = 0, | |
127 | .num_chipselect = 1, | |
128 | }; | |
129 | ||
0fc2a161 CM |
130 | /* |
131 | * RealView EB AMBA devices | |
132 | */ | |
133 | ||
134 | /* | |
135 | * These devices are connected via the core APB bridge | |
136 | */ | |
0dada61a RK |
137 | #define GPIO2_IRQ { IRQ_EB_GPIO2 } |
138 | #define GPIO3_IRQ { IRQ_EB_GPIO3 } | |
0fc2a161 | 139 | |
0dada61a | 140 | #define AACI_IRQ { IRQ_EB_AACI } |
0fc2a161 | 141 | #define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B } |
0dada61a RK |
142 | #define KMI0_IRQ { IRQ_EB_KMI0 } |
143 | #define KMI1_IRQ { IRQ_EB_KMI1 } | |
0fc2a161 CM |
144 | |
145 | /* | |
146 | * These devices are connected directly to the multi-layer AHB switch | |
147 | */ | |
0dada61a RK |
148 | #define EB_SMC_IRQ { } |
149 | #define MPMC_IRQ { } | |
150 | #define EB_CLCD_IRQ { IRQ_EB_CLCD } | |
151 | #define DMAC_IRQ { IRQ_EB_DMA } | |
0fc2a161 CM |
152 | |
153 | /* | |
154 | * These devices are connected via the core APB bridge | |
155 | */ | |
0dada61a RK |
156 | #define SCTL_IRQ { } |
157 | #define EB_WATCHDOG_IRQ { IRQ_EB_WDOG } | |
158 | #define EB_GPIO0_IRQ { IRQ_EB_GPIO0 } | |
159 | #define GPIO1_IRQ { IRQ_EB_GPIO1 } | |
160 | #define EB_RTC_IRQ { IRQ_EB_RTC } | |
0fc2a161 CM |
161 | |
162 | /* | |
163 | * These devices are connected via the DMA APB bridge | |
164 | */ | |
0dada61a RK |
165 | #define SCI_IRQ { IRQ_EB_SCI } |
166 | #define EB_UART0_IRQ { IRQ_EB_UART0 } | |
167 | #define EB_UART1_IRQ { IRQ_EB_UART1 } | |
168 | #define EB_UART2_IRQ { IRQ_EB_UART2 } | |
169 | #define EB_UART3_IRQ { IRQ_EB_UART3 } | |
170 | #define EB_SSP_IRQ { IRQ_EB_SSP } | |
0fc2a161 | 171 | |
8ad68bbf | 172 | /* FPGA Primecells */ |
9199340b RK |
173 | APB_DEVICE(aaci, "fpga:aaci", AACI, NULL); |
174 | APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); | |
175 | APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); | |
176 | APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); | |
177 | APB_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL); | |
8ad68bbf CM |
178 | |
179 | /* DevChip Primecells */ | |
9199340b RK |
180 | AHB_DEVICE(smc, "dev:smc", EB_SMC, NULL); |
181 | AHB_DEVICE(clcd, "dev:clcd", EB_CLCD, &clcd_plat_data); | |
182 | AHB_DEVICE(dmac, "dev:dmac", DMAC, NULL); | |
183 | AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL); | |
184 | APB_DEVICE(wdog, "dev:wdog", EB_WATCHDOG, NULL); | |
185 | APB_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data); | |
186 | APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); | |
187 | APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); | |
188 | APB_DEVICE(rtc, "dev:rtc", EB_RTC, NULL); | |
189 | APB_DEVICE(sci0, "dev:sci0", SCI, NULL); | |
190 | APB_DEVICE(uart0, "dev:uart0", EB_UART0, NULL); | |
191 | APB_DEVICE(uart1, "dev:uart1", EB_UART1, NULL); | |
192 | APB_DEVICE(uart2, "dev:uart2", EB_UART2, NULL); | |
193 | APB_DEVICE(ssp0, "dev:ssp0", EB_SSP, &ssp0_plat_data); | |
8ad68bbf CM |
194 | |
195 | static struct amba_device *amba_devs[] __initdata = { | |
196 | &dmac_device, | |
197 | &uart0_device, | |
198 | &uart1_device, | |
199 | &uart2_device, | |
200 | &uart3_device, | |
201 | &smc_device, | |
202 | &clcd_device, | |
203 | &sctl_device, | |
204 | &wdog_device, | |
205 | &gpio0_device, | |
206 | &gpio1_device, | |
207 | &gpio2_device, | |
208 | &rtc_device, | |
209 | &sci0_device, | |
210 | &ssp0_device, | |
211 | &aaci_device, | |
212 | &mmc0_device, | |
213 | &kmi0_device, | |
214 | &kmi1_device, | |
215 | }; | |
216 | ||
0fc2a161 CM |
217 | /* |
218 | * RealView EB platform devices | |
219 | */ | |
a44ddfd5 CM |
220 | static struct resource realview_eb_flash_resource = { |
221 | .start = REALVIEW_EB_FLASH_BASE, | |
222 | .end = REALVIEW_EB_FLASH_BASE + REALVIEW_EB_FLASH_SIZE - 1, | |
223 | .flags = IORESOURCE_MEM, | |
224 | }; | |
0fc2a161 | 225 | |
be4f3c86 | 226 | static struct resource realview_eb_eth_resources[] = { |
0fc2a161 | 227 | [0] = { |
393538e6 CM |
228 | .start = REALVIEW_EB_ETH_BASE, |
229 | .end = REALVIEW_EB_ETH_BASE + SZ_64K - 1, | |
0fc2a161 CM |
230 | .flags = IORESOURCE_MEM, |
231 | }, | |
232 | [1] = { | |
233 | .start = IRQ_EB_ETH, | |
234 | .end = IRQ_EB_ETH, | |
235 | .flags = IORESOURCE_IRQ, | |
236 | }, | |
237 | }; | |
238 | ||
be4f3c86 CM |
239 | /* |
240 | * Detect and register the correct Ethernet device. RealView/EB rev D | |
241 | * platforms use the newer SMSC LAN9118 Ethernet chip | |
242 | */ | |
243 | static int eth_device_register(void) | |
244 | { | |
393538e6 | 245 | void __iomem *eth_addr = ioremap(REALVIEW_EB_ETH_BASE, SZ_4K); |
0a381330 | 246 | const char *name = NULL; |
be4f3c86 CM |
247 | u32 idrev; |
248 | ||
249 | if (!eth_addr) | |
250 | return -ENOMEM; | |
251 | ||
252 | idrev = readl(eth_addr + 0x50); | |
0a381330 CM |
253 | if ((idrev & 0xFFFF0000) != 0x01180000) |
254 | /* SMSC LAN9118 not present, use LAN91C111 instead */ | |
255 | name = "smc91x"; | |
be4f3c86 CM |
256 | |
257 | iounmap(eth_addr); | |
0a381330 | 258 | return realview_eth_register(name, realview_eb_eth_resources); |
be4f3c86 CM |
259 | } |
260 | ||
7db21712 CM |
261 | static struct resource realview_eb_isp1761_resources[] = { |
262 | [0] = { | |
263 | .start = REALVIEW_EB_USB_BASE, | |
264 | .end = REALVIEW_EB_USB_BASE + SZ_128K - 1, | |
265 | .flags = IORESOURCE_MEM, | |
266 | }, | |
267 | [1] = { | |
268 | .start = IRQ_EB_USB, | |
269 | .end = IRQ_EB_USB, | |
270 | .flags = IORESOURCE_IRQ, | |
271 | }, | |
272 | }; | |
273 | ||
f417cbad WD |
274 | static struct resource pmu_resources[] = { |
275 | [0] = { | |
276 | .start = IRQ_EB11MP_PMU_CPU0, | |
277 | .end = IRQ_EB11MP_PMU_CPU0, | |
278 | .flags = IORESOURCE_IRQ, | |
279 | }, | |
280 | [1] = { | |
281 | .start = IRQ_EB11MP_PMU_CPU1, | |
282 | .end = IRQ_EB11MP_PMU_CPU1, | |
283 | .flags = IORESOURCE_IRQ, | |
284 | }, | |
285 | [2] = { | |
286 | .start = IRQ_EB11MP_PMU_CPU2, | |
287 | .end = IRQ_EB11MP_PMU_CPU2, | |
288 | .flags = IORESOURCE_IRQ, | |
289 | }, | |
290 | [3] = { | |
291 | .start = IRQ_EB11MP_PMU_CPU3, | |
292 | .end = IRQ_EB11MP_PMU_CPU3, | |
293 | .flags = IORESOURCE_IRQ, | |
294 | }, | |
295 | }; | |
296 | ||
297 | static struct platform_device pmu_device = { | |
298 | .name = "arm-pmu", | |
df3d17e0 | 299 | .id = -1, |
f417cbad WD |
300 | .num_resources = ARRAY_SIZE(pmu_resources), |
301 | .resource = pmu_resources, | |
302 | }; | |
303 | ||
d161edfb LW |
304 | static struct resource char_lcd_resources[] = { |
305 | { | |
306 | .start = REALVIEW_CHAR_LCD_BASE, | |
307 | .end = (REALVIEW_CHAR_LCD_BASE + SZ_4K - 1), | |
308 | .flags = IORESOURCE_MEM, | |
309 | }, | |
310 | { | |
311 | .start = IRQ_EB_CHARLCD, | |
312 | .end = IRQ_EB_CHARLCD, | |
313 | .flags = IORESOURCE_IRQ, | |
314 | }, | |
315 | }; | |
316 | ||
317 | static struct platform_device char_lcd_device = { | |
318 | .name = "arm-charlcd", | |
319 | .id = -1, | |
320 | .num_resources = ARRAY_SIZE(char_lcd_resources), | |
321 | .resource = char_lcd_resources, | |
322 | }; | |
323 | ||
8ad68bbf CM |
324 | static void __init gic_init_irq(void) |
325 | { | |
4c3ea371 | 326 | if (core_tile_eb11mp() || core_tile_a9mp()) { |
7dd19e75 CM |
327 | unsigned int pldctrl; |
328 | ||
329 | /* new irq mode */ | |
330 | writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK)); | |
331 | pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1); | |
332 | pldctrl |= 0x00800000; | |
333 | writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1); | |
334 | writel(0x00000000, __io_address(REALVIEW_SYS_LOCK)); | |
335 | ||
336 | /* core tile GIC, primary */ | |
b580b899 | 337 | gic_init(0, 29, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE), |
ff2e27ae | 338 | __io_address(REALVIEW_EB11MP_GIC_CPU_BASE)); |
7dd19e75 | 339 | |
41579f49 | 340 | #ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB |
7dd19e75 | 341 | /* board GIC, secondary */ |
0efc48ec | 342 | gic_init(1, 96, __io_address(REALVIEW_EB_GIC_DIST_BASE), |
b580b899 | 343 | __io_address(REALVIEW_EB_GIC_CPU_BASE)); |
7dd19e75 | 344 | gic_cascade_irq(1, IRQ_EB11MP_EB_IRQ1); |
3edf22ab | 345 | #endif |
7dd19e75 CM |
346 | } else { |
347 | /* board GIC, primary */ | |
b580b899 | 348 | gic_init(0, 29, __io_address(REALVIEW_EB_GIC_DIST_BASE), |
ff2e27ae | 349 | __io_address(REALVIEW_EB_GIC_CPU_BASE)); |
7dd19e75 | 350 | } |
8ad68bbf CM |
351 | } |
352 | ||
0fc2a161 CM |
353 | /* |
354 | * Fix up the IRQ numbers for the RealView EB/ARM11MPCore tile | |
355 | */ | |
356 | static void realview_eb11mp_fixup(void) | |
357 | { | |
358 | /* AMBA devices */ | |
359 | dmac_device.irq[0] = IRQ_EB11MP_DMA; | |
360 | uart0_device.irq[0] = IRQ_EB11MP_UART0; | |
361 | uart1_device.irq[0] = IRQ_EB11MP_UART1; | |
362 | uart2_device.irq[0] = IRQ_EB11MP_UART2; | |
363 | uart3_device.irq[0] = IRQ_EB11MP_UART3; | |
364 | clcd_device.irq[0] = IRQ_EB11MP_CLCD; | |
365 | wdog_device.irq[0] = IRQ_EB11MP_WDOG; | |
366 | gpio0_device.irq[0] = IRQ_EB11MP_GPIO0; | |
367 | gpio1_device.irq[0] = IRQ_EB11MP_GPIO1; | |
368 | gpio2_device.irq[0] = IRQ_EB11MP_GPIO2; | |
369 | rtc_device.irq[0] = IRQ_EB11MP_RTC; | |
370 | sci0_device.irq[0] = IRQ_EB11MP_SCI; | |
371 | ssp0_device.irq[0] = IRQ_EB11MP_SSP; | |
372 | aaci_device.irq[0] = IRQ_EB11MP_AACI; | |
373 | mmc0_device.irq[0] = IRQ_EB11MP_MMCI0A; | |
374 | mmc0_device.irq[1] = IRQ_EB11MP_MMCI0B; | |
375 | kmi0_device.irq[0] = IRQ_EB11MP_KMI0; | |
376 | kmi1_device.irq[0] = IRQ_EB11MP_KMI1; | |
377 | ||
378 | /* platform devices */ | |
be4f3c86 CM |
379 | realview_eb_eth_resources[1].start = IRQ_EB11MP_ETH; |
380 | realview_eb_eth_resources[1].end = IRQ_EB11MP_ETH; | |
7db21712 CM |
381 | realview_eb_isp1761_resources[1].start = IRQ_EB11MP_USB; |
382 | realview_eb_isp1761_resources[1].end = IRQ_EB11MP_USB; | |
0fc2a161 | 383 | } |
0fc2a161 | 384 | |
7c380f27 MZ |
385 | #ifdef CONFIG_HAVE_ARM_TWD |
386 | static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, | |
387 | REALVIEW_EB11MP_TWD_BASE, | |
388 | IRQ_LOCALTIMER); | |
389 | ||
390 | static void __init realview_eb_twd_init(void) | |
391 | { | |
392 | if (core_tile_eb11mp() || core_tile_a9mp()) { | |
393 | int err = twd_local_timer_register(&twd_local_timer); | |
394 | if (err) | |
395 | pr_err("twd_local_timer_register failed %d\n", err); | |
396 | } | |
397 | } | |
398 | #else | |
399 | #define realview_eb_twd_init() do { } while(0) | |
400 | #endif | |
401 | ||
8cc4c548 CM |
402 | static void __init realview_eb_timer_init(void) |
403 | { | |
404 | unsigned int timer_irq; | |
405 | ||
80192735 CM |
406 | timer0_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE); |
407 | timer1_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE) + 0x20; | |
408 | timer2_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE); | |
409 | timer3_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE) + 0x20; | |
410 | ||
7c380f27 | 411 | if (core_tile_eb11mp() || core_tile_a9mp()) |
8cc4c548 | 412 | timer_irq = IRQ_EB11MP_TIMER0_1; |
7c380f27 | 413 | else |
8cc4c548 CM |
414 | timer_irq = IRQ_EB_TIMER0_1; |
415 | ||
f9a6aa43 | 416 | realview_clk_init(__io_address(REALVIEW_SYS_BASE), false); |
8cc4c548 | 417 | realview_timer_init(timer_irq); |
7c380f27 | 418 | realview_eb_twd_init(); |
8cc4c548 CM |
419 | } |
420 | ||
47cacdd4 | 421 | static void realview_eb_restart(char mode, const char *cmd) |
4c9f8be7 CT |
422 | { |
423 | void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); | |
424 | void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK); | |
425 | ||
426 | /* | |
427 | * To reset, we hit the on-board reset register | |
428 | * in the system FPGA | |
429 | */ | |
430 | __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl); | |
431 | if (core_tile_eb11mp()) | |
432 | __raw_writel(0x0008, reset_ctrl); | |
47cacdd4 | 433 | dsb(); |
4c9f8be7 CT |
434 | } |
435 | ||
8ad68bbf CM |
436 | static void __init realview_eb_init(void) |
437 | { | |
438 | int i; | |
439 | ||
4c3ea371 | 440 | if (core_tile_eb11mp() || core_tile_a9mp()) { |
7dd19e75 CM |
441 | realview_eb11mp_fixup(); |
442 | ||
ba927951 | 443 | #ifdef CONFIG_CACHE_L2X0 |
7dd19e75 CM |
444 | /* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled |
445 | * Bits: .... ...0 0111 1001 0000 .... .... .... */ | |
446 | l2x0_init(__io_address(REALVIEW_EB11MP_L220_BASE), 0x00790000, 0xfe000fff); | |
ba927951 | 447 | #endif |
f417cbad | 448 | platform_device_register(&pmu_device); |
7dd19e75 | 449 | } |
0fc2a161 | 450 | |
a44ddfd5 | 451 | realview_flash_register(&realview_eb_flash_resource, 1); |
6b65cd74 | 452 | platform_device_register(&realview_i2c_device); |
d161edfb | 453 | platform_device_register(&char_lcd_device); |
be4f3c86 | 454 | eth_device_register(); |
7db21712 | 455 | realview_usb_register(realview_eb_isp1761_resources); |
8ad68bbf CM |
456 | |
457 | for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { | |
458 | struct amba_device *d = amba_devs[i]; | |
459 | amba_device_register(d, &iomem_resource); | |
460 | } | |
8ad68bbf CM |
461 | } |
462 | ||
463 | MACHINE_START(REALVIEW_EB, "ARM-RealView EB") | |
464 | /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ | |
9ddea57e | 465 | .atag_offset = 0x100, |
810883f0 | 466 | .smp = smp_ops(realview_smp_ops), |
5b39d154 | 467 | .fixup = realview_fixup, |
8ad68bbf | 468 | .map_io = realview_eb_map_io, |
631e55f9 | 469 | .init_early = realview_init_early, |
8ad68bbf | 470 | .init_irq = gic_init_irq, |
6bb27d73 | 471 | .init_time = realview_eb_timer_init, |
8ad68bbf | 472 | .init_machine = realview_eb_init, |
00e9125e NP |
473 | #ifdef CONFIG_ZONE_DMA |
474 | .dma_zone_size = SZ_256M, | |
475 | #endif | |
47cacdd4 | 476 | .restart = realview_eb_restart, |
8ad68bbf | 477 | MACHINE_END |