[deliverable/linux.git] / arch / arm / mach-realview / realview_eb.c

/*
 *  linux/arch/arm/mach-realview/realview_eb.c
 *
 *  Copyright (C) 2004 ARM Limited
 *  Copyright (C) 2000 Deep Blue Solutions Ltd
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */

#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/device.h>
#include <linux/amba/bus.h>
#include <linux/amba/pl061.h>
#include <linux/amba/mmci.h>
#include <linux/amba/pl022.h>
#include <linux/io.h>

#include <mach/hardware.h>
#include <asm/irq.h>
#include <asm/leds.h>
#include <asm/mach-types.h>
#include <asm/pmu.h>
#include <asm/pgtable.h>
#include <asm/hardware/gic.h>
#include <asm/hardware/cache-l2x0.h>
#include <asm/localtimer.h>

#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/time.h>

#include <mach/board-eb.h>
#include <mach/irqs.h>

#include "core.h"

static struct map_desc realview_eb_io_desc[] __initdata = {
	{
		.virtual	= IO_ADDRESS(REALVIEW_SYS_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_SYS_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= IO_ADDRESS(REALVIEW_EB_GIC_CPU_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_EB_GIC_CPU_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= IO_ADDRESS(REALVIEW_EB_GIC_DIST_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_EB_GIC_DIST_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= IO_ADDRESS(REALVIEW_SCTL_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_SCTL_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= IO_ADDRESS(REALVIEW_EB_TIMER0_1_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_EB_TIMER0_1_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= IO_ADDRESS(REALVIEW_EB_TIMER2_3_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_EB_TIMER2_3_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	},
#ifdef CONFIG_DEBUG_LL
	{
		.virtual	= IO_ADDRESS(REALVIEW_EB_UART0_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_EB_UART0_BASE),
		.length		= SZ_4K,
		.type		= MT_DEVICE,
	}
#endif
};

static struct map_desc realview_eb11mp_io_desc[] __initdata = {
	{
		.virtual	= IO_ADDRESS(REALVIEW_EB11MP_PRIV_MEM_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_EB11MP_PRIV_MEM_BASE),
		.length		= REALVIEW_EB11MP_PRIV_MEM_SIZE,
		.type		= MT_DEVICE,
	}, {
		.virtual	= IO_ADDRESS(REALVIEW_EB11MP_L220_BASE),
		.pfn		= __phys_to_pfn(REALVIEW_EB11MP_L220_BASE),
		.length		= SZ_8K,
		.type		= MT_DEVICE,
	}
};

static void __init realview_eb_map_io(void)
{
	iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc));
	if (core_tile_eb11mp() || core_tile_a9mp())
		iotable_init(realview_eb11mp_io_desc, ARRAY_SIZE(realview_eb11mp_io_desc));
}

static struct pl061_platform_data gpio0_plat_data = {
	.gpio_base	= 0,
};

static struct pl061_platform_data gpio1_plat_data = {
	.gpio_base	= 8,
};

static struct pl061_platform_data gpio2_plat_data = {
	.gpio_base	= 16,
};

static struct pl022_ssp_controller ssp0_plat_data = {
	.bus_id = 0,
	.enable_dma = 0,
	.num_chipselect = 1,
};

/*
 * RealView EB AMBA devices
 */

/*
 * These devices are connected via the core APB bridge
 */
#define GPIO2_IRQ	{ IRQ_EB_GPIO2, NO_IRQ }
#define GPIO3_IRQ	{ IRQ_EB_GPIO3, NO_IRQ }

#define AACI_IRQ	{ IRQ_EB_AACI, NO_IRQ }
#define MMCI0_IRQ	{ IRQ_EB_MMCI0A, IRQ_EB_MMCI0B }
#define KMI0_IRQ	{ IRQ_EB_KMI0, NO_IRQ }
#define KMI1_IRQ	{ IRQ_EB_KMI1, NO_IRQ }

/*
 * These devices are connected directly to the multi-layer AHB switch
 */
#define EB_SMC_IRQ	{ NO_IRQ, NO_IRQ }
#define MPMC_IRQ	{ NO_IRQ, NO_IRQ }
#define EB_CLCD_IRQ	{ IRQ_EB_CLCD, NO_IRQ }
#define DMAC_IRQ	{ IRQ_EB_DMA, NO_IRQ }

/*
 * These devices are connected via the core APB bridge
 */
#define SCTL_IRQ	{ NO_IRQ, NO_IRQ }
#define EB_WATCHDOG_IRQ	{ IRQ_EB_WDOG, NO_IRQ }
#define EB_GPIO0_IRQ	{ IRQ_EB_GPIO0, NO_IRQ }
#define GPIO1_IRQ	{ IRQ_EB_GPIO1, NO_IRQ }
#define EB_RTC_IRQ	{ IRQ_EB_RTC, NO_IRQ }

/*
 * These devices are connected via the DMA APB bridge
 */
#define SCI_IRQ		{ IRQ_EB_SCI, NO_IRQ }
#define EB_UART0_IRQ	{ IRQ_EB_UART0, NO_IRQ }
#define EB_UART1_IRQ	{ IRQ_EB_UART1, NO_IRQ }
#define EB_UART2_IRQ	{ IRQ_EB_UART2, NO_IRQ }
#define EB_UART3_IRQ	{ IRQ_EB_UART3, NO_IRQ }
#define EB_SSP_IRQ	{ IRQ_EB_SSP, NO_IRQ }

/* FPGA Primecells */
AMBA_DEVICE(aaci,  "fpga:aaci",  AACI,     NULL);
AMBA_DEVICE(mmc0,  "fpga:mmc0",  MMCI0,    &realview_mmc0_plat_data);
AMBA_DEVICE(kmi0,  "fpga:kmi0",  KMI0,     NULL);
AMBA_DEVICE(kmi1,  "fpga:kmi1",  KMI1,     NULL);
AMBA_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL);

/* DevChip Primecells */
AMBA_DEVICE(smc,   "dev:smc",   EB_SMC,   NULL);
AMBA_DEVICE(clcd,  "dev:clcd",  EB_CLCD,  &clcd_plat_data);
AMBA_DEVICE(dmac,  "dev:dmac",  DMAC,     NULL);
AMBA_DEVICE(sctl,  "dev:sctl",  SCTL,     NULL);
AMBA_DEVICE(wdog,  "dev:wdog",  EB_WATCHDOG, NULL);
AMBA_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data);
AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1,    &gpio1_plat_data);
AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2,    &gpio2_plat_data);
AMBA_DEVICE(rtc,   "dev:rtc",   EB_RTC,   NULL);
AMBA_DEVICE(sci0,  "dev:sci0",  SCI,      NULL);
AMBA_DEVICE(uart0, "dev:uart0", EB_UART0, NULL);
AMBA_DEVICE(uart1, "dev:uart1", EB_UART1, NULL);
AMBA_DEVICE(uart2, "dev:uart2", EB_UART2, NULL);
AMBA_DEVICE(ssp0,  "dev:ssp0",  EB_SSP,   &ssp0_plat_data);

static struct amba_device *amba_devs[] __initdata = {
	&dmac_device,
	&uart0_device,
	&uart1_device,
	&uart2_device,
	&uart3_device,
	&smc_device,
	&clcd_device,
	&sctl_device,
	&wdog_device,
	&gpio0_device,
	&gpio1_device,
	&gpio2_device,
	&rtc_device,
	&sci0_device,
	&ssp0_device,
	&aaci_device,
	&mmc0_device,
	&kmi0_device,
	&kmi1_device,
};

/*
 * RealView EB platform devices
 */
static struct resource realview_eb_flash_resource = {
	.start			= REALVIEW_EB_FLASH_BASE,
	.end			= REALVIEW_EB_FLASH_BASE + REALVIEW_EB_FLASH_SIZE - 1,
	.flags			= IORESOURCE_MEM,
};

static struct resource realview_eb_eth_resources[] = {
	[0] = {
		.start		= REALVIEW_EB_ETH_BASE,
		.end		= REALVIEW_EB_ETH_BASE + SZ_64K - 1,
		.flags		= IORESOURCE_MEM,
	},
	[1] = {
		.start		= IRQ_EB_ETH,
		.end		= IRQ_EB_ETH,
		.flags		= IORESOURCE_IRQ,
	},
};

/*
 * Detect and register the correct Ethernet device. RealView/EB rev D
 * platforms use the newer SMSC LAN9118 Ethernet chip
 */
static int eth_device_register(void)
{
	void __iomem *eth_addr = ioremap(REALVIEW_EB_ETH_BASE, SZ_4K);
	const char *name = NULL;
	u32 idrev;

	if (!eth_addr)
		return -ENOMEM;

	idrev = readl(eth_addr + 0x50);
	if ((idrev & 0xFFFF0000) != 0x01180000)
		/* SMSC LAN9118 not present, use LAN91C111 instead */
		name = "smc91x";

	iounmap(eth_addr);
	return realview_eth_register(name, realview_eb_eth_resources);
}

static struct resource realview_eb_isp1761_resources[] = {
	[0] = {
		.start		= REALVIEW_EB_USB_BASE,
		.end		= REALVIEW_EB_USB_BASE + SZ_128K - 1,
		.flags		= IORESOURCE_MEM,
	},
	[1] = {
		.start		= IRQ_EB_USB,
		.end		= IRQ_EB_USB,
		.flags		= IORESOURCE_IRQ,
	},
};

static struct resource pmu_resources[] = {
	[0] = {
		.start		= IRQ_EB11MP_PMU_CPU0,
		.end		= IRQ_EB11MP_PMU_CPU0,
		.flags		= IORESOURCE_IRQ,
	},
	[1] = {
		.start		= IRQ_EB11MP_PMU_CPU1,
		.end		= IRQ_EB11MP_PMU_CPU1,
		.flags		= IORESOURCE_IRQ,
	},
	[2] = {
		.start		= IRQ_EB11MP_PMU_CPU2,
		.end		= IRQ_EB11MP_PMU_CPU2,
		.flags		= IORESOURCE_IRQ,
	},
	[3] = {
		.start		= IRQ_EB11MP_PMU_CPU3,
		.end		= IRQ_EB11MP_PMU_CPU3,
		.flags		= IORESOURCE_IRQ,
	},
};

static struct platform_device pmu_device = {
	.name			= "arm-pmu",
	.id			= ARM_PMU_DEVICE_CPU,
	.num_resources		= ARRAY_SIZE(pmu_resources),
	.resource		= pmu_resources,
};

static struct resource char_lcd_resources[] = {
	{
		.start = REALVIEW_CHAR_LCD_BASE,
		.end   = (REALVIEW_CHAR_LCD_BASE + SZ_4K - 1),
		.flags = IORESOURCE_MEM,
	},
	{
		.start	= IRQ_EB_CHARLCD,
		.end	= IRQ_EB_CHARLCD,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct platform_device char_lcd_device = {
	.name		=	"arm-charlcd",
	.id		=	-1,
	.num_resources	=	ARRAY_SIZE(char_lcd_resources),
	.resource	=	char_lcd_resources,
};

static void __init gic_init_irq(void)
{
	if (core_tile_eb11mp() || core_tile_a9mp()) {
		unsigned int pldctrl;

		/* new irq mode */
		writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
		pldctrl = readl(__io_address(REALVIEW_SYS_BASE)	+ REALVIEW_EB11MP_SYS_PLD_CTRL1);
		pldctrl |= 0x00800000;
		writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
		writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));

		/* core tile GIC, primary */
		gic_init(0, 29, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE),
			 __io_address(REALVIEW_EB11MP_GIC_CPU_BASE));

#ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB
		/* board GIC, secondary */
		gic_init(1, 96, __io_address(REALVIEW_EB_GIC_DIST_BASE),
			 __io_address(REALVIEW_EB_GIC_CPU_BASE));
		gic_cascade_irq(1, IRQ_EB11MP_EB_IRQ1);
#endif
	} else {
		/* board GIC, primary */
		gic_init(0, 29, __io_address(REALVIEW_EB_GIC_DIST_BASE),
			 __io_address(REALVIEW_EB_GIC_CPU_BASE));
	}
}

/*
 * Fix up the IRQ numbers for the RealView EB/ARM11MPCore tile
 */
static void realview_eb11mp_fixup(void)
{
	/* AMBA devices */
	dmac_device.irq[0]	= IRQ_EB11MP_DMA;
	uart0_device.irq[0]	= IRQ_EB11MP_UART0;
	uart1_device.irq[0]	= IRQ_EB11MP_UART1;
	uart2_device.irq[0]	= IRQ_EB11MP_UART2;
	uart3_device.irq[0]	= IRQ_EB11MP_UART3;
	clcd_device.irq[0]	= IRQ_EB11MP_CLCD;
	wdog_device.irq[0]	= IRQ_EB11MP_WDOG;
	gpio0_device.irq[0]	= IRQ_EB11MP_GPIO0;
	gpio1_device.irq[0]	= IRQ_EB11MP_GPIO1;
	gpio2_device.irq[0]	= IRQ_EB11MP_GPIO2;
	rtc_device.irq[0]	= IRQ_EB11MP_RTC;
	sci0_device.irq[0]	= IRQ_EB11MP_SCI;
	ssp0_device.irq[0]	= IRQ_EB11MP_SSP;
	aaci_device.irq[0]	= IRQ_EB11MP_AACI;
	mmc0_device.irq[0]	= IRQ_EB11MP_MMCI0A;
	mmc0_device.irq[1]	= IRQ_EB11MP_MMCI0B;
	kmi0_device.irq[0]	= IRQ_EB11MP_KMI0;
	kmi1_device.irq[0]	= IRQ_EB11MP_KMI1;

	/* platform devices */
	realview_eb_eth_resources[1].start	= IRQ_EB11MP_ETH;
	realview_eb_eth_resources[1].end	= IRQ_EB11MP_ETH;
	realview_eb_isp1761_resources[1].start	= IRQ_EB11MP_USB;
	realview_eb_isp1761_resources[1].end	= IRQ_EB11MP_USB;
}

static void __init realview_eb_timer_init(void)
{
	unsigned int timer_irq;

	timer0_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE);
	timer1_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE) + 0x20;
	timer2_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE);
	timer3_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE) + 0x20;

	if (core_tile_eb11mp() || core_tile_a9mp()) {
#ifdef CONFIG_LOCAL_TIMERS
		twd_base = __io_address(REALVIEW_EB11MP_TWD_BASE);
#endif
		timer_irq = IRQ_EB11MP_TIMER0_1;
	} else
		timer_irq = IRQ_EB_TIMER0_1;

	realview_timer_init(timer_irq);
}

static struct sys_timer realview_eb_timer = {
	.init		= realview_eb_timer_init,
};

static void realview_eb_restart(char mode, const char *cmd)
{
	void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
	void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);

	/*
	 * To reset, we hit the on-board reset register
	 * in the system FPGA
	 */
	__raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
	if (core_tile_eb11mp())
		__raw_writel(0x0008, reset_ctrl);
	dsb();
}

static void __init realview_eb_init(void)
{
	int i;

	if (core_tile_eb11mp() || core_tile_a9mp()) {
		realview_eb11mp_fixup();

#ifdef CONFIG_CACHE_L2X0
		/* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
		 * Bits:  .... ...0 0111 1001 0000 .... .... .... */
		l2x0_init(__io_address(REALVIEW_EB11MP_L220_BASE), 0x00790000, 0xfe000fff);
#endif
		platform_device_register(&pmu_device);
	}

	realview_flash_register(&realview_eb_flash_resource, 1);
	platform_device_register(&realview_i2c_device);
	platform_device_register(&char_lcd_device);
	eth_device_register();
	realview_usb_register(realview_eb_isp1761_resources);

	for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
		struct amba_device *d = amba_devs[i];
		amba_device_register(d, &iomem_resource);
	}

#ifdef CONFIG_LEDS
	leds_event = realview_leds_event;
#endif
}

MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
	/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
	.atag_offset	= 0x100,
	.fixup		= realview_fixup,
	.map_io		= realview_eb_map_io,
	.init_early	= realview_init_early,
	.init_irq	= gic_init_irq,
	.timer		= &realview_eb_timer,
	.handle_irq	= gic_handle_irq,
	.init_machine	= realview_eb_init,
#ifdef CONFIG_ZONE_DMA
	.dma_zone_size	= SZ_256M,
#endif
	.restart	= realview_eb_restart,
MACHINE_END
Commit	Line	Data
8ad68bbf CM	1	/*
	2	* linux/arch/arm/mach-realview/realview_eb.c
	3	*
	4	* Copyright (C) 2004 ARM Limited
	5	* Copyright (C) 2000 Deep Blue Solutions Ltd
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation; either version 2 of the License, or
	10	* (at your option) any later version.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	20	*/
	21
8ad68bbf	22	#include <linux/init.h>
1be7228d	23	#include <linux/platform_device.h>
edbaa603	24	#include <linux/device.h>
a62c80e5	25	#include <linux/amba/bus.h>
eb7fffa3	26	#include <linux/amba/pl061.h>
6ef297f8	27	#include <linux/amba/mmci.h>
d6ada860	28	#include <linux/amba/pl022.h>
fced80c7	29	#include <linux/io.h>
8ad68bbf	30
a09e64fb	31	#include <mach/hardware.h>
8ad68bbf CM	32	#include <asm/irq.h>
	33	#include <asm/leds.h>
	34	#include <asm/mach-types.h>
f417cbad	35	#include <asm/pmu.h>
cc9897df	36	#include <asm/pgtable.h>
8ad68bbf	37	#include <asm/hardware/gic.h>
7770bddb	38	#include <asm/hardware/cache-l2x0.h>
f32f4ce2	39	#include <asm/localtimer.h>
8ad68bbf CM	40
	41	#include <asm/mach/arch.h>
	42	#include <asm/mach/map.h>
8cc4c548	43	#include <asm/mach/time.h>
8ad68bbf	44
a09e64fb RK	45	#include <mach/board-eb.h>
a09e64fb RK	46	#include <mach/irqs.h>
8ad68bbf CM	47
8ad68bbf CM	48	#include "core.h"
8ad68bbf CM	49
8ad68bbf CM	50	static struct map_desc realview_eb_io_desc[] __initdata = {
1ffedce7 RK	51	{
	52	.virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
	53	.pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
	54	.length = SZ_4K,
	55	.type = MT_DEVICE,
	56	}, {
073b6ff3 CM	57	.virtual = IO_ADDRESS(REALVIEW_EB_GIC_CPU_BASE),
073b6ff3 CM	58	.pfn = __phys_to_pfn(REALVIEW_EB_GIC_CPU_BASE),
1ffedce7 RK	59	.length = SZ_4K,
	60	.type = MT_DEVICE,
	61	}, {
073b6ff3 CM	62	.virtual = IO_ADDRESS(REALVIEW_EB_GIC_DIST_BASE),
073b6ff3 CM	63	.pfn = __phys_to_pfn(REALVIEW_EB_GIC_DIST_BASE),
1ffedce7 RK	64	.length = SZ_4K,
	65	.type = MT_DEVICE,
	66	}, {
	67	.virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
	68	.pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
	69	.length = SZ_4K,
	70	.type = MT_DEVICE,
	71	}, {
80192735 CM	72	.virtual = IO_ADDRESS(REALVIEW_EB_TIMER0_1_BASE),
80192735 CM	73	.pfn = __phys_to_pfn(REALVIEW_EB_TIMER0_1_BASE),
1ffedce7 RK	74	.length = SZ_4K,
	75	.type = MT_DEVICE,
	76	}, {
80192735 CM	77	.virtual = IO_ADDRESS(REALVIEW_EB_TIMER2_3_BASE),
80192735 CM	78	.pfn = __phys_to_pfn(REALVIEW_EB_TIMER2_3_BASE),
1ffedce7 RK	79	.length = SZ_4K,
	80	.type = MT_DEVICE,
	81	},
8ad68bbf	82	#ifdef CONFIG_DEBUG_LL
1ffedce7	83	{
9a386f06 CM	84	.virtual = IO_ADDRESS(REALVIEW_EB_UART0_BASE),
9a386f06 CM	85	.pfn = __phys_to_pfn(REALVIEW_EB_UART0_BASE),
1ffedce7 RK	86	.length = SZ_4K,
	87	.type = MT_DEVICE,
	88	}
8ad68bbf CM	89	#endif
	90	};
	91
7dd19e75 CM	92	static struct map_desc realview_eb11mp_io_desc[] __initdata = {
7dd19e75 CM	93	{
34ae6c96 MZ	94	.virtual = IO_ADDRESS(REALVIEW_EB11MP_PRIV_MEM_BASE),
	95	.pfn = __phys_to_pfn(REALVIEW_EB11MP_PRIV_MEM_BASE),
	96	.length = REALVIEW_EB11MP_PRIV_MEM_SIZE,
7dd19e75 CM	97	.type = MT_DEVICE,
	98	}, {
	99	.virtual = IO_ADDRESS(REALVIEW_EB11MP_L220_BASE),
	100	.pfn = __phys_to_pfn(REALVIEW_EB11MP_L220_BASE),
	101	.length = SZ_8K,
	102	.type = MT_DEVICE,
	103	}
	104	};
	105
8ad68bbf CM	106	static void __init realview_eb_map_io(void)
	107	{
	108	iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc));
4c3ea371	109	if (core_tile_eb11mp() \|\| core_tile_a9mp())
7dd19e75	110	iotable_init(realview_eb11mp_io_desc, ARRAY_SIZE(realview_eb11mp_io_desc));
8ad68bbf CM	111	}
8ad68bbf CM	112
eb7fffa3 RK	113	static struct pl061_platform_data gpio0_plat_data = {
eb7fffa3 RK	114	.gpio_base = 0,
eb7fffa3 RK	115	};
	116
	117	static struct pl061_platform_data gpio1_plat_data = {
	118	.gpio_base = 8,
eb7fffa3 RK	119	};
	120
	121	static struct pl061_platform_data gpio2_plat_data = {
	122	.gpio_base = 16,
eb7fffa3 RK	123	};
eb7fffa3 RK	124
d6ada860 LW	125	static struct pl022_ssp_controller ssp0_plat_data = {
	126	.bus_id = 0,
	127	.enable_dma = 0,
	128	.num_chipselect = 1,
	129	};
	130
0fc2a161 CM	131	/*
	132	* RealView EB AMBA devices
	133	*/
	134
	135	/*
	136	* These devices are connected via the core APB bridge
	137	*/
	138	#define GPIO2_IRQ { IRQ_EB_GPIO2, NO_IRQ }
0fc2a161	139	#define GPIO3_IRQ { IRQ_EB_GPIO3, NO_IRQ }
0fc2a161 CM	140
0fc2a161 CM	141	#define AACI_IRQ { IRQ_EB_AACI, NO_IRQ }
0fc2a161	142	#define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B }
0fc2a161	143	#define KMI0_IRQ { IRQ_EB_KMI0, NO_IRQ }
0fc2a161	144	#define KMI1_IRQ { IRQ_EB_KMI1, NO_IRQ }
0fc2a161 CM	145
	146	/*
	147	* These devices are connected directly to the multi-layer AHB switch
	148	*/
393538e6	149	#define EB_SMC_IRQ { NO_IRQ, NO_IRQ }
0fc2a161	150	#define MPMC_IRQ { NO_IRQ, NO_IRQ }
393538e6	151	#define EB_CLCD_IRQ { IRQ_EB_CLCD, NO_IRQ }
0fc2a161	152	#define DMAC_IRQ { IRQ_EB_DMA, NO_IRQ }
0fc2a161 CM	153
	154	/*
	155	* These devices are connected via the core APB bridge
	156	*/
	157	#define SCTL_IRQ { NO_IRQ, NO_IRQ }
393538e6	158	#define EB_WATCHDOG_IRQ { IRQ_EB_WDOG, NO_IRQ }
393538e6	159	#define EB_GPIO0_IRQ { IRQ_EB_GPIO0, NO_IRQ }
0fc2a161	160	#define GPIO1_IRQ { IRQ_EB_GPIO1, NO_IRQ }
393538e6	161	#define EB_RTC_IRQ { IRQ_EB_RTC, NO_IRQ }
0fc2a161 CM	162
	163	/*
	164	* These devices are connected via the DMA APB bridge
	165	*/
	166	#define SCI_IRQ { IRQ_EB_SCI, NO_IRQ }
9a386f06	167	#define EB_UART0_IRQ { IRQ_EB_UART0, NO_IRQ }
9a386f06	168	#define EB_UART1_IRQ { IRQ_EB_UART1, NO_IRQ }
9a386f06	169	#define EB_UART2_IRQ { IRQ_EB_UART2, NO_IRQ }
9a386f06	170	#define EB_UART3_IRQ { IRQ_EB_UART3, NO_IRQ }
393538e6	171	#define EB_SSP_IRQ { IRQ_EB_SSP, NO_IRQ }
0fc2a161	172
8ad68bbf	173	/* FPGA Primecells */
4321532c LW	174	AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL);
	175	AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
	176	AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
	177	AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
	178	AMBA_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL);
8ad68bbf CM	179
8ad68bbf CM	180	/* DevChip Primecells */
4321532c LW	181	AMBA_DEVICE(smc, "dev:smc", EB_SMC, NULL);
	182	AMBA_DEVICE(clcd, "dev:clcd", EB_CLCD, &clcd_plat_data);
	183	AMBA_DEVICE(dmac, "dev:dmac", DMAC, NULL);
	184	AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL);
	185	AMBA_DEVICE(wdog, "dev:wdog", EB_WATCHDOG, NULL);
	186	AMBA_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data);
	187	AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
	188	AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
	189	AMBA_DEVICE(rtc, "dev:rtc", EB_RTC, NULL);
	190	AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL);
	191	AMBA_DEVICE(uart0, "dev:uart0", EB_UART0, NULL);
	192	AMBA_DEVICE(uart1, "dev:uart1", EB_UART1, NULL);
	193	AMBA_DEVICE(uart2, "dev:uart2", EB_UART2, NULL);
d6ada860	194	AMBA_DEVICE(ssp0, "dev:ssp0", EB_SSP, &ssp0_plat_data);
8ad68bbf CM	195
	196	static struct amba_device *amba_devs[] __initdata = {
	197	&dmac_device,
	198	&uart0_device,
	199	&uart1_device,
	200	&uart2_device,
	201	&uart3_device,
	202	&smc_device,
	203	&clcd_device,
	204	&sctl_device,
	205	&wdog_device,
	206	&gpio0_device,
	207	&gpio1_device,
	208	&gpio2_device,
	209	&rtc_device,
	210	&sci0_device,
	211	&ssp0_device,
	212	&aaci_device,
	213	&mmc0_device,
	214	&kmi0_device,
	215	&kmi1_device,
	216	};
	217
0fc2a161 CM	218	/*
	219	* RealView EB platform devices
	220	*/
a44ddfd5 CM	221	static struct resource realview_eb_flash_resource = {
	222	.start = REALVIEW_EB_FLASH_BASE,
	223	.end = REALVIEW_EB_FLASH_BASE + REALVIEW_EB_FLASH_SIZE - 1,
	224	.flags = IORESOURCE_MEM,
	225	};
0fc2a161	226
be4f3c86	227	static struct resource realview_eb_eth_resources[] = {
0fc2a161	228	[0] = {
393538e6 CM	229	.start = REALVIEW_EB_ETH_BASE,
393538e6 CM	230	.end = REALVIEW_EB_ETH_BASE + SZ_64K - 1,
0fc2a161 CM	231	.flags = IORESOURCE_MEM,
	232	},
	233	[1] = {
	234	.start = IRQ_EB_ETH,
	235	.end = IRQ_EB_ETH,
	236	.flags = IORESOURCE_IRQ,
	237	},
	238	};
	239
be4f3c86 CM	240	/*
	241	* Detect and register the correct Ethernet device. RealView/EB rev D
	242	* platforms use the newer SMSC LAN9118 Ethernet chip
	243	*/
	244	static int eth_device_register(void)
	245	{
393538e6	246	void __iomem *eth_addr = ioremap(REALVIEW_EB_ETH_BASE, SZ_4K);
0a381330	247	const char *name = NULL;
be4f3c86 CM	248	u32 idrev;
	249
	250	if (!eth_addr)
	251	return -ENOMEM;
	252
	253	idrev = readl(eth_addr + 0x50);
0a381330 CM	254	if ((idrev & 0xFFFF0000) != 0x01180000)
	255	/* SMSC LAN9118 not present, use LAN91C111 instead */
	256	name = "smc91x";
be4f3c86 CM	257
be4f3c86 CM	258	iounmap(eth_addr);
0a381330	259	return realview_eth_register(name, realview_eb_eth_resources);
be4f3c86 CM	260	}
be4f3c86 CM	261
7db21712 CM	262	static struct resource realview_eb_isp1761_resources[] = {
	263	[0] = {
	264	.start = REALVIEW_EB_USB_BASE,
	265	.end = REALVIEW_EB_USB_BASE + SZ_128K - 1,
	266	.flags = IORESOURCE_MEM,
	267	},
	268	[1] = {
	269	.start = IRQ_EB_USB,
	270	.end = IRQ_EB_USB,
	271	.flags = IORESOURCE_IRQ,
	272	},
	273	};
	274
f417cbad WD	275	static struct resource pmu_resources[] = {
	276	[0] = {
	277	.start = IRQ_EB11MP_PMU_CPU0,
	278	.end = IRQ_EB11MP_PMU_CPU0,
	279	.flags = IORESOURCE_IRQ,
	280	},
	281	[1] = {
	282	.start = IRQ_EB11MP_PMU_CPU1,
	283	.end = IRQ_EB11MP_PMU_CPU1,
	284	.flags = IORESOURCE_IRQ,
	285	},
	286	[2] = {
	287	.start = IRQ_EB11MP_PMU_CPU2,
	288	.end = IRQ_EB11MP_PMU_CPU2,
	289	.flags = IORESOURCE_IRQ,
	290	},
	291	[3] = {
	292	.start = IRQ_EB11MP_PMU_CPU3,
	293	.end = IRQ_EB11MP_PMU_CPU3,
	294	.flags = IORESOURCE_IRQ,
	295	},
	296	};
	297
	298	static struct platform_device pmu_device = {
	299	.name = "arm-pmu",
	300	.id = ARM_PMU_DEVICE_CPU,
	301	.num_resources = ARRAY_SIZE(pmu_resources),
	302	.resource = pmu_resources,
	303	};
	304
d161edfb LW	305	static struct resource char_lcd_resources[] = {
	306	{
	307	.start = REALVIEW_CHAR_LCD_BASE,
	308	.end = (REALVIEW_CHAR_LCD_BASE + SZ_4K - 1),
	309	.flags = IORESOURCE_MEM,
	310	},
	311	{
	312	.start = IRQ_EB_CHARLCD,
	313	.end = IRQ_EB_CHARLCD,
	314	.flags = IORESOURCE_IRQ,
	315	},
	316	};
	317
	318	static struct platform_device char_lcd_device = {
	319	.name = "arm-charlcd",
	320	.id = -1,
	321	.num_resources = ARRAY_SIZE(char_lcd_resources),
	322	.resource = char_lcd_resources,
	323	};
	324
8ad68bbf CM	325	static void __init gic_init_irq(void)
8ad68bbf CM	326	{
4c3ea371	327	if (core_tile_eb11mp() \|\| core_tile_a9mp()) {
7dd19e75 CM	328	unsigned int pldctrl;
	329
	330	/* new irq mode */
	331	writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
	332	pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
	333	pldctrl \|= 0x00800000;
	334	writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
	335	writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
	336
	337	/* core tile GIC, primary */
b580b899	338	gic_init(0, 29, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE),
ff2e27ae	339	__io_address(REALVIEW_EB11MP_GIC_CPU_BASE));
7dd19e75	340
41579f49	341	#ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB
7dd19e75	342	/* board GIC, secondary */
0efc48ec	343	gic_init(1, 96, __io_address(REALVIEW_EB_GIC_DIST_BASE),
b580b899	344	__io_address(REALVIEW_EB_GIC_CPU_BASE));
7dd19e75	345	gic_cascade_irq(1, IRQ_EB11MP_EB_IRQ1);
3edf22ab	346	#endif
7dd19e75 CM	347	} else {
7dd19e75 CM	348	/* board GIC, primary */
b580b899	349	gic_init(0, 29, __io_address(REALVIEW_EB_GIC_DIST_BASE),
ff2e27ae	350	__io_address(REALVIEW_EB_GIC_CPU_BASE));
7dd19e75	351	}
8ad68bbf CM	352	}
8ad68bbf CM	353
0fc2a161 CM	354	/*
	355	* Fix up the IRQ numbers for the RealView EB/ARM11MPCore tile
	356	*/
	357	static void realview_eb11mp_fixup(void)
	358	{
	359	/* AMBA devices */
	360	dmac_device.irq[0] = IRQ_EB11MP_DMA;
	361	uart0_device.irq[0] = IRQ_EB11MP_UART0;
	362	uart1_device.irq[0] = IRQ_EB11MP_UART1;
	363	uart2_device.irq[0] = IRQ_EB11MP_UART2;
	364	uart3_device.irq[0] = IRQ_EB11MP_UART3;
	365	clcd_device.irq[0] = IRQ_EB11MP_CLCD;
	366	wdog_device.irq[0] = IRQ_EB11MP_WDOG;
	367	gpio0_device.irq[0] = IRQ_EB11MP_GPIO0;
	368	gpio1_device.irq[0] = IRQ_EB11MP_GPIO1;
	369	gpio2_device.irq[0] = IRQ_EB11MP_GPIO2;
	370	rtc_device.irq[0] = IRQ_EB11MP_RTC;
	371	sci0_device.irq[0] = IRQ_EB11MP_SCI;
	372	ssp0_device.irq[0] = IRQ_EB11MP_SSP;
	373	aaci_device.irq[0] = IRQ_EB11MP_AACI;
	374	mmc0_device.irq[0] = IRQ_EB11MP_MMCI0A;
	375	mmc0_device.irq[1] = IRQ_EB11MP_MMCI0B;
	376	kmi0_device.irq[0] = IRQ_EB11MP_KMI0;
	377	kmi1_device.irq[0] = IRQ_EB11MP_KMI1;
	378
	379	/* platform devices */
be4f3c86 CM	380	realview_eb_eth_resources[1].start = IRQ_EB11MP_ETH;
be4f3c86 CM	381	realview_eb_eth_resources[1].end = IRQ_EB11MP_ETH;
7db21712 CM	382	realview_eb_isp1761_resources[1].start = IRQ_EB11MP_USB;
7db21712 CM	383	realview_eb_isp1761_resources[1].end = IRQ_EB11MP_USB;
0fc2a161	384	}
0fc2a161	385
8cc4c548 CM	386	static void __init realview_eb_timer_init(void)
	387	{
	388	unsigned int timer_irq;
	389
80192735 CM	390	timer0_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE);
	391	timer1_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE) + 0x20;
	392	timer2_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE);
	393	timer3_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE) + 0x20;
	394
4c3ea371	395	if (core_tile_eb11mp() \|\| core_tile_a9mp()) {
39e823e3	396	#ifdef CONFIG_LOCAL_TIMERS
ebac6546	397	twd_base = __io_address(REALVIEW_EB11MP_TWD_BASE);
39e823e3	398	#endif
8cc4c548	399	timer_irq = IRQ_EB11MP_TIMER0_1;
39e823e3	400	} else
8cc4c548 CM	401	timer_irq = IRQ_EB_TIMER0_1;
	402
	403	realview_timer_init(timer_irq);
	404	}
	405
	406	static struct sys_timer realview_eb_timer = {
	407	.init = realview_eb_timer_init,
	408	};
	409
47cacdd4	410	static void realview_eb_restart(char mode, const char *cmd)
4c9f8be7 CT	411	{
	412	void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
	413	void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
	414
	415	/*
	416	* To reset, we hit the on-board reset register
	417	* in the system FPGA
	418	*/
	419	__raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
	420	if (core_tile_eb11mp())
	421	__raw_writel(0x0008, reset_ctrl);
47cacdd4	422	dsb();
4c9f8be7 CT	423	}
4c9f8be7 CT	424
8ad68bbf CM	425	static void __init realview_eb_init(void)
	426	{
	427	int i;
	428
4c3ea371	429	if (core_tile_eb11mp() \|\| core_tile_a9mp()) {
7dd19e75 CM	430	realview_eb11mp_fixup();
7dd19e75 CM	431
ba927951	432	#ifdef CONFIG_CACHE_L2X0
7dd19e75 CM	433	/* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
	434	* Bits: .... ...0 0111 1001 0000 .... .... .... */
	435	l2x0_init(__io_address(REALVIEW_EB11MP_L220_BASE), 0x00790000, 0xfe000fff);
ba927951	436	#endif
f417cbad	437	platform_device_register(&pmu_device);
7dd19e75	438	}
0fc2a161	439
a44ddfd5	440	realview_flash_register(&realview_eb_flash_resource, 1);
6b65cd74	441	platform_device_register(&realview_i2c_device);
d161edfb	442	platform_device_register(&char_lcd_device);
be4f3c86	443	eth_device_register();
7db21712	444	realview_usb_register(realview_eb_isp1761_resources);
8ad68bbf CM	445
	446	for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
	447	struct amba_device *d = amba_devs[i];
	448	amba_device_register(d, &iomem_resource);
	449	}
	450
	451	#ifdef CONFIG_LEDS
	452	leds_event = realview_leds_event;
	453	#endif
	454	}
	455
	456	MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
	457	/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
9ddea57e	458	.atag_offset = 0x100,
5b39d154	459	.fixup = realview_fixup,
8ad68bbf	460	.map_io = realview_eb_map_io,
631e55f9	461	.init_early = realview_init_early,
8ad68bbf	462	.init_irq = gic_init_irq,
8cc4c548	463	.timer = &realview_eb_timer,
1b99d9cc	464	.handle_irq = gic_handle_irq,
8ad68bbf	465	.init_machine = realview_eb_init,
00e9125e NP	466	#ifdef CONFIG_ZONE_DMA
	467	.dma_zone_size = SZ_256M,
	468	#endif
47cacdd4	469	.restart = realview_eb_restart,
8ad68bbf	470	MACHINE_END